Page 1
PRODUCT SPECIFICATION
Customer:
□ Tentative Specification
■ Preliminary Specification
□ Approval Specification
MODEL NO.: V420HK1
SUFFIX: LE6
APPROVED BY SIGNATURE
Name / Title
Note
Please return 1 copy for your confirmation with your signature and
comments.
Approved By Checked By Prepared By
Chao-Chun Chung
Carlos Lee
Chia-Wen Chen
Version 1.0 1 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 2
PRODUCT SPECIFICATION
CONTENTS
CONTENTS .....................................................................................................................................................................2
1. GENERAL DESCRIPTION...........................................................................................................................................5
1.1 OVERVIEW.......................................................................................................................................................5
1.2 FEATURES........................................................................................................................................................5
1.3 APPLICATION ...................................................................................................................................................5
1.4 GENERAL SPECIFICATIONS...........................................................................................................................5
1.5 MECHANICAL SPECIFICATIONS ....................................................................................................................6
2. ABSOLUTE MAXIMUM RATINGS ...............................................................................................................................7
2.1 ABSOLUTE RATINGS OF ENVIRONMENT .....................................................................................................7
2.2 PACKAGE STORAGE.......................................................................................................................................8
2.3 ELECTRICAL ABSOLUTE RATINGS................................................................................................................8
2.3.1 TFT LCD MODULE.........................................................................................................................................8
2.3.2 BACKLIGHT CONVERTER UNIT ..................................................................................................................8
3. ELECTRICAL CHARACTERISTICS............................................................................................................................9
3.1 TFT LCD MODULE............................................................................................................................................9
3.2 BACKLIGHT CONVERTER UNIT ...................................................................................................................12
3.2.1 LED LIGHT BAR CHARACTERISTICS ..................................................................................................12
3.2.2 CONVERTER CHARACTERISTICS.......................................................................................................12
3.2.3 CONVERTER INTERFACE CHARACTERISTICS..................................................................................13
4. BLOCK DIAGRAM OF INTERFACE..........................................................................................................................15
4.1 TFT LCD MODULE..........................................................................................................................................15
5. INTERFACE PIN CONNECTION...............................................................................................................................16
5.1 TFT LCD MODULE..........................................................................................................................................16
5.2 CONVERTER UNIT.........................................................................................................................................21
5.3 LVDS INTERFACE..........................................................................................................................................23
5.4COLOR DATA INPUT ASSIGNMENT...............................................................................................................24
6. INTERFACE TIMING.................................................................................................................................................25
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)..........................................................................25
6.2 POWER ON/OFF SEQUENCE .......................................................................................................................28
7.1 TEST CONDITIONS........................................................................................................................................29
7.2 OPTICAL SPECIFICATIONS...........................................................................................................................30
8. PRECAUTIONS.........................................................................................................................................................33
8.1 ASSEMBLY AND HANDLING PRECAUTIONS...............................................................................................33
8.2 SAFETY PRECAUTIONS................................................................................................................................33
Version 1.0 2 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 3
PRODUCT SPECIFICATION
9. DEFINITION OF LABELS..........................................................................................................................................34
9.1 CMI MODULE LABEL .....................................................................................................................................34
10. PACKAGING............................................................................................................................................................35
10.1 PACKAGING SPECIFICATIONS...................................................................................................................35
10.2 PACKAGING METHOD.................................................................................................................................35
11. MECHANICAL CHARACTERISTIC .........................................................................................................................37
Version 1.0 3 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 4
PRODUCT SPECIFICATION
REVISION HISTORY
Version Date Page(New) Section Description
Ver. 1.0 Sep. 25, 2012 All All The preliminary specification was first issued.
Version 1.0 4 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 5
PRODUCT SPECIFICATION
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V420HK1-LE6 is a 42” TFT Liquid Crystal Display module with LED Backlight unit and 4ch-LVDS interface. This
module supports 1920 x 1080 Full HDTV format and can display 1.07G colors (8-bit+FRC). The converter module
for backlight is built-in.
1.2 FEATURES
－ High brightness (350 nits)
－ High contrast ratio (5000:1)
－ Fast response time (Gray to gray average 6.5 ms)
－ High color saturation (NTSC 68%)
－ Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
－ DE (Data Enable) only mode
－ LVDS (Low Voltage Differential Signaling) interface
－ Optimized response time for 120 Hz frame rate
－ Ultra wide viewing angle : Super MVA technology
－ Viewing Angle : 176(H)/176(V) (CR ≥ 20) VA Technology
－ T-con input frame rate: 100Hz/120Hz, output frame rate: 100Hz/120Hz
1.3 APPLICATION
－ Standard Living Room TVs
－ Public Display Application
－ Home Theater Application
－ MFM Application
1.4 GENERAL SPECIFICATIONS
Item Specification Unit Note
Active Area 930.24 (H) x523.26 (V) mm
Bezel Opening Area 938.84 (H) x531.26 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1920 x R.G.B. x 1080 pixel Pixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 1.07G (8-bit+FRC) color Display Operation Mode Transmissive mode / Normally Black - Surface Treatment Anti-Glare coating (Haze 1%) Hardness 3H - (2)
(1)
Rotation Function
Display Orientation
Version 1.0 5 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Unachievable (3)
Signal input with “CMI” (3)
Page 6
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.
Tcon Board
Note (2) The spec. of the surface treatment is temporarily for this phase. CMI reserves the rights to change this feature.
Note (3)
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Back Side
PRODUCT SPECIFICATION
Front Side
CMI
Horizontal (H) 949.84 950.84 951.84 mm
Vertical (V) 546.26 547.26 548.26 mm
Module Size
Depth (D) 20.1 21.1 22.1 mm
Depth (D) 26.7 27.7 28.7 mm
Weight 7,110 8,800 9000 -
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth is between bezel to T-CON cover.
Note (3) Module Depth is between bezel to Converter cover
(1)
(1)
(2)
(3)
Version 1.0 6 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 7
PRODUCT SPECIFICATION
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Value
Item Symbol
Min. Max.
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 50 ºC (1), (2)
Shock (Non-Operating) SNOP - 50 G (3), (5)
Vibration (Non-Operating) VNOP - 1.0 G (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta 40 ºC).≦
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) Thermal management should be considered in final product design to prevent the surface temperature of display
area from being over 65 ºC. The range of operating temperature may degrade in case of improper thermal
management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module
would not be twisted or bent by the fixture.
Unit Note
Version 1.0 7 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 8
PRODUCT SPECIFICATION
2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to
store the module with temperature from 0 to 35 ℃ at normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Value
Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
2.3.2 BACKLIGHT CONVERTER UNIT
Unit Note
(1)
Value
Item Symbol
Min. Max.
Light Bar Voltage VW
Converter Input Voltage VBL 0 30 V (1)
Control Signal Level
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional operation should be
restricted to the conditions described under normal operating conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control and External PWM Control.
－
－
-0.3 6 V (1), (3)
60 VRMS
Unit Note
Version 1.0 8 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 9
PRODUCT SPECIFICATION
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
(Ta = 25 ± 2 ºC)
Value
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Unit Note
Rush Current I
White Pattern P
Power consumption
Black Pattern PT
Heavy Loading
pattern
White Pattern
Power Supply Current
Black Pattern
Heavy Loading
pattern
Differential Input High
Threshold Voltage
Differential Input Low
Threshold Voltage
LVDS
interface
Common Input Voltage VCM 1.0 1.2 1.4 V
Differential input voltage
(single-end)
Terminating Resistor R
RUSH
T
P
T
－ －
－ －
－ －
V
LVTH
-300
V
LVTL
|V
| 200
ID
T
－ －
－ 5
－
－
+100
－
2.4 A (2)
6 W
4.7 5.8 W
11.2 14.4 W
0.42 0.5 A
0.39 0.48 A
0.94 1.2 A
－
－
－
100
+300 mV
-100 mV
600 mV
－
ohm
(3)
(3)
(4)
CMOS
interface
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
0
IL
－
－
3.3 V
0.7 V
Note (1) The module should be always operated within the above ranges. The ripple voltage should be controlled under 10%
of Vcc (Typ.)
Version 1.0 9 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 10
Note (2) Measurement condition:
PRODUCT SPECIFICATION
Version 1.0 10 Date：：：：25 Sep. 2012
Vcc rising time is 470us
0.9Vcc
0.1Vcc
GND
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Vcc
470us
Page 11
PRODUCT SPECIFICATION
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 120 Hz, whereas a
power dissipation check pattern below is displayed.
a. White Pattern
c. Heavy Loading Pattern
Note (4) The LVDS input characteristics are as follows :
Active Area
b. Black Pattern
Active Area
Version 1.0 11 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 12
PRODUCT SPECIFICATION
3.2 BACKLIGHT CONVERTER UNIT
3.2.1 LED LIGHT BAR CHARACTERISTICS
The backlight unit contains 1 pcs light bar. (Ta = 25 ± 2 ºC)
Parameter Symbol
Unit Note
Min. Typ. Max.
Value
One String Current IL
117.5 125 132.5
mA
One String Voltage VW 33.6 - 38.64 VDC IL =125mA
One String Voltage Variation △VW - - 1 V
Life time - 30,000 - - Hrs (1)
Note (1) Dimming Ratio=100%
Note (2) The lifetime is defined as the time which luminance of the LED decays to 50% compared to the initial value, Operating
condition: Continuous operating at Ta = 25±2℃, IL =125 mA
3.2.2 CONVERTER CHARACTERISTICS
Value
Parameter Symbol
Unit
Note
Min. Typ. Max.
Power Consumption PBL - 40.8 47.04 W (1), (2) , IL = 125 mA
Converter Input Voltage VBL 22.8 24.0 25.2 VDC
Converter Input Current IBL - 1.7 1.96 A Non Dimming
Input Inrush Current IR - - 2.65 Apeak
VBL=22.8V,
(IL=typ.) (3)
Dimming Frequency FB 90 160 190 Hz
Dimming Duty Ratio DDR 5 - 100 % (4)
Note (1) The power supply capacity should be higher than the total converter power consumption PBL. Since the pulse width
modulation (PWM) mode was applied for backlight dimming, the driving current changed as PWM duty on and off.
The transient response of power supply should be considered for the changing loading when converter dimming.
Note (2) The measurement condition of Max. value is based on 39" backlight unit under input voltage 24V, average LED
current 132.5 mA
Note (3) For input inrush current measure, the VBL rising time from 10% to 90% is about 30ms.
Note (4) EPWM signal have to input available duty range. 5% minimum duty ratio is only valid for electrical operation.
Version 1.0 12 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 13
3.2.3 CONVERTER INTERFACE CHARACTERISTICS
PRODUCT SPECIFICATION
Parameter Symbol
ON
On/Off Control Voltage
VBLON
OFF
External PWM Control
Voltage
HI
LO
VEPWM
Error Signal ERR
VBL Rising Time Tr1
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time TPWMR
PWM Signal Falling Time TPWMF
Input Impedance Rin
PWM Delay Time TPWM
0
0
Value
－
－
－
－
5.0 V
0.8 V
5.0 V Duty on
0.8 V Duty off
Test
Condition
－
－
－
－
Min. Typ. Max.
2.0
2.0
－ － － － －
－
30
－ － －
－ － －
－ － －
－ － －
－
－
1
100
－ －
100 ms
100 ms
50 us
50 us
－ －
－ －
Unit Note
Abnormal: Open
ms 10%-90%V
M
Ω
ms
(5)
BL
Ton
－
300
－ －
ms
BLON Delay Time
T
on1
BLON Off Time Toff
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to change the external
PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the Fig.1. For a certain reason, the converter has a
possibility to be damaged with wrong power sequence and control signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL → PWM signal → BLON
Turn OFF sequence: BLOFF → PWM signal → VBL
Note (4) When converter protective function is triggered, ERR will output open collector status. (Fig.2)
Note (5) The EPWM interface that inserts a pull up resistor to 5V in Max Duty (100%), please refers to Fig.3.
－
－
300
300
－ －
－ －
ms
ms
Version 1.0 13 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 14
PRODUCT SPECIFICATION
V
V
V
BLON
EPWM
0.9V
Toff
BL
Tf1
0.1V
BL
Tr1
BL
0.1V
0
BL
2.0V
0
0.8V
0.9V
Ton
BL
Ton1
Backlight on duration
Tr
Tf
Ext. Dimming Function
PWMR
T
2.0V
0
0.8V
T
PWM
T
PWMF
Floating
V
W
External
PWM
Period
External
PWM Duty
100%
Fig. 1
Fig. 2 Fig. 3
Version 1.0 14 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 15
4. BLOCK DIAGRAM OF INTERFACE
GND
VCC
4.1 TFT LCD MODULE
CH3_0(+/-)
CH3_1(+/-)
CH3_2(+/-)
CH3_3(+/-)
CH3_4(+/-)
CH3_CLK(+/-)
CH4_0(+/-)
CH4_1(+/-)
CH4_2(+/-)
CH4_3(+/-)
CH4_4(+/-)
CH4_CLK(+/-)
CNF2: 1
2
nd
INPUT CONNECTOR
187060-41221, P-TWO
st
WF23-400-413C, FCN,
CH1_0(+/-)
CH1_1(+/-)
CH1_2(+/-)
CH1_3(+/-)
CH1_4(+/-)
CH1_CLK(+/-)
CH2_0(+/-)
CH2_1(+/-)
CH2_2(+/-)
CH2_3(+/-)
CH2_4(+/-)
CH2_CLK(+/-)
CNF1: 1
2
nd
INPUT CONNECTOR
187059-51221, P-TWO
st
WF23-402-5133, FCN,
DC/DC CONVERTER
PRODUCT SPECIFICATION
TIMING
CONTROLLER
& REFERENCE
VOLTAGE
SCAN DRIVER
TFT LCD PANEL
(1920x3x1080)
DATA DRIVER
SELLVDS
E_PWM
BLON
VBL
GND
ERR
CONVERTER
CONNECTOR
CN1: CI0114M1HR0-LA
(CvilLux) or
JH2-D4-143N(FCN)
CN2 : FF01-430-123A(FCN) or 196388-12041-3 (P-TWO)
BACKLIGHT UNIT
Version 1.0 15 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 16
PRODUCT SPECIFICATION
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
CNF1 Connector pin assignment: (WF23-402-5133 (FCN ) or 187059-51221(P-TWO))
Mating connector: JAE FI-RE51HL
Pin Name Description
1 N.C. No Connection (1)
2 N.C. No Connection (1)
3 N.C. No Connection (1)
4 N.C. No Connection (1)
5 N.C. No Connection (1)
6 N.C. No Connection (1)
7 SELLVDS Input signal for LVDS Data Format Selection (2) (3)
8 N.C. No Connection
Note
9 N.C. No Connection
10 N.C. No Connection
11 GND Ground
12 CH1[0]- First pixel Negative LVDS differential data input. Pair 0
13 CH1[0]+ First pixel Positive LVDS differential data input. Pair 0
14 CH1[1]- First pixel Negative LVDS differential data input. Pair 1
15 CH1[1]+ First pixel Positive LVDS differential data input. Pair 1
16 CH1[2]- First pixel Negative LVDS differential data input. Pair 2
17 CH1[2]+ First pixel Positive LVDS differential data input. Pair 2
18 GND Ground
19 CH1CLK- First pixel Negative LVDS differential clock input.
20 CH1CLK+ First pixel Positive LVDS differential clock input.
21 GND Ground
22 CH1[3]- First pixel Negative LVDS differential data input. Pair 3
(1)
(4)
(4)
23 CH1[3]+ First pixel Positive LVDS differential data input. Pair 3
24 CH1[4]- First pixel Negative LVDS differential data input. Pair 4
25 CH1[4]+ First pixel Positive LVDS differential data input. Pair 4
26 N.C. No Connection (1)
27 N.C. No Connection (1)
28 CH2[0]- Second pixel Negative LVDS differential data input. Pair 0
Version 1.0 16 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
(4)
(4)
Page 17
PRODUCT SPECIFICATION
29 CH2[0]+ Second pixel Positive LVDS differential data input. Pair 0
30 CH2[1]- Second pixel Negative LVDS differential data input. Pair 1
31 CH2[1]+ Second pixel Positive LVDS differential data input. Pair 1
32 CH2[2]- Second pixel Negative LVDS differential data input. Pair 2
33 CH2[2]+ Second pixel Positive LVDS differential data input. Pair 2
34 GND Ground
35 CH2CLK- Second pixel Negative LVDS differential clock input.
36 CH2CLK+ Second pixel Positive LVDS differential clock input.
37 GND Ground
38 CH2[3]- Second pixel Negative LVDS differential data input. Pair 3
39 CH2[3]+ Second pixel Positive LVDS differential data input. Pair 3
40 CH2[4]- Second pixel Negative LVDS differential data input. Pair 4
41 CH2[4]+ Second pixel Positive LVDS differential data input. Pair 4
42 N.C. No Connection (1)
43 N.C. No Connection (1)
44 GND Ground
45 GND Ground
46 GND Ground
47 N.C. No Connection
(4)
(4)
(1)
48 VCC +12V power supply
49 VCC +12V power supply
50 VCC +12V power supply
51 VCC +12V power supply
Version 1.0 17 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 18
PRODUCT SPECIFICATION
CNF2 Connector pin assignment (WF23-400-413C (FCN) or 187060-41221(P-TWO))
Mating connector: JAE FI-RE41HL
Pin Name Description Note
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7 N.C. No Connection
8 N.C. No Connection
9 GND Ground
(1)
10 CH3[0]- Third pixel Negative LVDS differential data input. Pair 0
11 CH3[0]+ Third pixel Positive LVDS differential data input. Pair 0
12 CH3[1]- Third pixel Negative LVDS differential data input. Pair 1
(4)
13 CH3[1]+ Third pixel Positive LVDS differential data input. Pair 1
14 CH3[2]- Third pixel Negative LVDS differential data input. Pair 2
15 CH3[2]+ Third pixel Positive LVDS differential data input. Pair 2
16 GND Ground
17 CH3CLK- Third pixel Negative LVDS differential clock input.
(4)
18 CH3CLK+ Third pixel Positive LVDS differential clock input.
19 GND Ground
20 CH3[3]- Third pixel Negative LVDS differential data input. Pair 3
21 CH3[3]+ Third pixel Positive LVDS differential data input. Pair 3
(4)
22 CH3[4]- Third pixel Negative LVDS differential data input. Pair 4
23 CH3[4]+ Third pixel Positive LVDS differential data input. Pair 4
24 GND Ground
25 GND Ground
26 CH4[0]- Fourth pixel Negative LVDS differential data input. Pair 0
27 CH4[0]+ Fourth pixel Positive LVDS differential data input. Pair 0
28 CH4[1]- Fourth pixel Negative LVDS differential data input. Pair 1
29 CH4[1]+ Fourth pixel Positive LVDS differential data input. Pair 1
Version 1.0 18 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
(4)
Page 19
PRODUCT SPECIFICATION
IC
>16K ohm
1K ohm
Panel Board
System Board
30 CH4[2]- Fourth pixel Negative LVDS differential data input. Pair 2
31 CH4[2]+ Fourth pixel Positive LVDS differential data input. Pair 2
32 GND Ground
33 CH4CLK- Fourth pixel Negative LVDS differential clock input.
(4)
34 CH4CLK+ Fourth pixel Positive LVDS differential clock input.
35 GND Ground
36 CH4[3]- Fourth pixel Negative LVDS differential data input. Pair 3
37 CH4[3]+ Fourth pixel Positive LVDS differential data input. Pair 3
(4)
38 CH4[4]- Fourth pixel Negative LVDS differential data input. Pair 4
39 CH4[4]+ Fourth pixel Positive LVDS differential data input. Pair 4
40 GND Ground
41 GND Ground
Note (1) Reserved for internal use. Please leave it open.
Note (2) LVDS format selection.
L= Connect to GND, H=Connect to +3.3V or Open
SELLVDS Note
L
H or Open
Note (3) Interface optional pin has internal scheme as following diagram. Customer should keep the interface voltage level
requirement which including Panel board loading as below.
JEIDA Format
VESA Format
3.3V
Interface Voltage Level
V
> V
H
IH
VL < V
IL
Version 1.0 19 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 20
Note (4) LVDS 4-port data mapping
Port Channel of LVDS Data Stream
1st Port First Pixel 1, 5, 9, ……1913, 1917
PRODUCT SPECIFICATION
2nd Port Second Pixel
3rd Port Third Pixel 3, 7, 11, ….1915, 1919
4th Port Fourth Pixel 4, 8, 12, ….1916, 1920
Note (5) LVDS connector pin order defined as follows
2, 6, 10, ….1914, 1918
Note (6) LVDS connector mating dimension range request is 0.93mm~1.0mm as below.
Version 1.0 20 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 21
PRODUCT SPECIFICATION
5.2 CONVERTER UNIT
CN1(Header): CI0114M1HR0-LA (CvilLux) or JH2-D4-143N(FCN)
Mating connector: JST PHR-14
Pin No Symbol Feature
1
2
3
4
5
6
7
VBL +24V
8
9
10
11 ERR
12 BLON BL ON/OFF
13 NC NC
14 E_PWM External PWM Control
CN2(Header): FF01-430-123A(FCN) or 196388-12041-3 (P-TWO)
Pin No Symbol Feature
1 VLED-
2 VLED3 VLED4 VLED5 VLED6 VLED7 VLED8 VLED9 NC NC
10 VLED+
11 VLED+
12 VLED+
Note (1) If Pin14 is open, E_PWM is 100% duty.
GND GND
Abnormal (Open collector)
Normal (GND)
Negative of LED String
Positive of LED String
Version 1.0 21 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 22
PRODUCT SPECIFICATION
Pin 1
Pin 14
Note (2) Input connector pin order defined as follows
Converter
Input Connector
Version 1.0 22 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 23
5.3 LVDS INTERFACE
JEIDA Format : SELLVDS = L
VESA Format : SELLVDS = H or Open
PRODUCT SPECIFICATION
AR0~AR9 First Pixel R Data
AG0~AG9 First Pixel G Data
AB0~AB9 First Pixel B Data
Version 1.0 23 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DE Data enable signal
(9; MSB, 0; LSB)
DCLK Data clock signal
(9; MSB, 0; LSB)
RSVD Reserved
(9; MSB, 0; LSB)
Page 24
PRODUCT SPECIFICATION
Red (0) /
Green (0) /
Blue (0) /
5.4COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the
color. The higher the binary input the brighter the color. The table below provides the assignment of color versus
data input.
Data Signal
Red Green Blue
R
R
R
R
R
R
R
R
G
G
G
G
G
G
G
G
G
G
B
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
;
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
B
B
B
B
B
B
8
7
6
5
4
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Basic
Colors
Gray
Scale
Of
Red
Color
Black
Red
Green
Blue
Cyan
Magenta
Yellow
White
Dark
Red (1)
Red (2)
:
:
Red (1021)
Red (1022)
Red (1023)
R
R
9
8
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
B
B
B
2
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
Dark
Green (1)
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage，1: High Level Voltage
Green (2)
:
:
Green
(1021)
Green
(1022)
Green
(1023)
Dark
Blue (1)
Blue (2)
:
:
Blue (1021)
Blue (1022)
Blue (1023)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
Version 1.0 24 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 25
PRODUCT SPECIFICATION
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol
Frequency
Input cycle to
LVDS
cycle jitter
Receiver
Clock
Spread spectrum
modulation range
Spread spectrum
modulation frequency
LVDS
Receiver
Receiver Skew Margin T
Data
6.1.1 Timing spec for Frame Rate = 100Hz
Signal Item Symbol
Frame rate 2D mode Fr5 94 100 106 Hz (6)(7)
Vertical
Total Tv 1090 1350 1395 Th Tv=Tvd+Tvb
Active
Display
2D Mode
Term
Display Tvd 1080 1080 1080 Th
Blank Tvb 10 270 315 Th
Min. Typ. Max. Unit Note
F
clkin
60 74.25 80 MHz
(=1/TC)
- - 200 ps (3)
T
rcl
clkin_mo
F
F
SSM
RSKM
d
F
-2%
clkin
- F
clkin
+2%
- - 200 KHz
-400 - 400 ps (5)
MHz
Min. Typ. Max. Unit Note
(4)
－
－
Horizontal
Active
2D Mode
Display
Term
Total Th 520 550 670 Tc Th=Thd+Thb
Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc
－
－
6.1.2 Timing spec for Frame Rate = 120Hz
Signal Item Symbol
Min. Typ. Max. Unit Note
Frame rate 2D mode Fr6 114 120 126 Hz (6)(7)
Vertical
Active
2D Mode
Display
Term
Horizontal
Active
2D Mode
Display
Term
Total Tv 1090 1125 1395 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th
Blank Tvb 10 45 315 Th
－
－
Total Th 520 550 670 Tc Th=Thd+Thb
Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc
－
－
Version 1.0 25 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 26
PRODUCT SPECIFICATION
Thb
Tc
Note (1) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic level.
Otherwise, this module would operate abnormally.
Thd
Tvb
– TI
1
Note (2) Please make sure the range of pixel clock has follow the below equation:
Fclkin(max) Fr6 Tv Th
Fr5 Tv Th Fclkin(min)
INPUT SIGNAL TIMING DIAGRAM
DE
T
h
Tvd
Tv
DCLK
DE
DATA
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T
Valid display data ( 480 clocks)
Version 1.0 26 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 27
PRODUCT SPECIFICATION
Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
Note (5) The LVDS timing diagram and the receiver skew margin is defined and shown as below.
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
RXCLK+/-
RXn+/-
T
RSKM
Note (6) The frame-to-frame jitter of the input frame rate is defined as the above figures. FRn = FRn-1 ± 1.8%.
Note (7)The setup of the frame rate jitter > 1.8% may result in the cosmetic LED backlight symptom but the electric function
is not affected.
Version 1.0 27 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 28
PRODUCT SPECIFICATION
500ms
≦
T4
6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
0.9Vcc
0.1V
CC
0V
0.5≦T1≦10ms
0≦T2≦200ms
0≦T3
2
T
LVDS Signals
0≦T7≦T2
0≦T8≦T3
Option Signals (SELLVDS)
Backlight (Recommended)
500ms≦T5
100ms≦T6
Vcc Dip
T9≦≦≦≦10ms
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD operation or the
LCD turns off before the backlight turns off, the display may momentarily become abnormal screen.
Note (3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
If T2<0, that maybe cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
Note (6) Vcc must decay smoothly when power-off.
Version 1.0 28 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
0V
Power On
T7
Vcc(typ.) x 0.85
0V
Vcc
50%
5
T
50%
T6
T9
0.9Vcc
0.1Vcc
T3 T1
T4
Power Off
8
T
Page 29
7.1 TEST CONDITIONS
Item Symbol Value Unit
PRODUCT SPECIFICATION
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Current IL
Vertical Frame Rate Fr 60 Hz
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change
during measuring in a windless room.
25
50
12
125
±2
±10
±1.2
±4
o
C
%RH
V
mA
LCD Module
LCD Panel
CS - 2000
Field of View = 1º
500 mm
Light Shield Room
(Ambient Luminance < 2 lux)
Version 1.0 29 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 30
PRODUCT SPECIFICATION
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in 7.1.
Item Symbol
Contrast Ratio CR 4000
Response Time
Center Luminance of White LC 280
White Variation
Cross Talk CT 4 % (5)
Red
Green
Color
Chromaticity
Blue
White
Gray to
gray
δW
Rx
Ry
Gx
Gy
Bx
By
Wx 0.280
Wy
Condition Min. Typ. Max. Unit Note
θx=0°, θy =0°
Viewing angle
at normal direction
-0.03
5000
6.5 13 ms (3)
350 cd/m
1.3 - (6)
0.636
0.328
0.302
Typ.
0.591
0.150
0.055
0.290
- (2)
2
-
-
-
Typ.
+0.03
-
-
-
-
-
(4)
-
Viewing Angle
Correlated color
temperature
Color Gamut C.G.
Horizontal
Vertical
θx+
θx-
θy+
θy-
CR
≥20
- 10000
- 68 - % NTSC
80 88 80 88 -
80 88 80 88 -
- K -
Deg.
(1)
Version 1.0 30 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 31
Note (1) Definition of Viewing Angle (θx, θy) :
T
ime
Viewing angles are measured by Autronic Conoscope Cono-80 (or Eldim EZ-Contrast 160R).
θ
X-
= 90º
x-
6 o’clock
θ
y-
= 90º
y-
Note (2) Definition of Contrast Ratio (CR) :
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) =
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).
Note (3) Definition of Gray-to-Gray Switching Time :
100%
90%
Optical
Response
10%
0%
The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023.
Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636, 764, 892 and
1023 to each other.
Normal
θx = θy = 0º
θy- θ
θx−
Gray to gray
switching time
PRODUCT SPECIFICATION
y+
y+
θx+
L255 of Luminance Surface
L0 of Luminance Surface
12 o’clock
direction
x+
Gray to gray
switching time
θ
X+
= 90º
Version 1.0 31 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 32
Note (4) Definition of Luminance of White (LC, L
Active Area
Active Area
Measure the luminance of gray level 255 at center point and 5 points
LC = L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).
Note (5) Definition of Cross Talk (CT) :
CT = | YB – YA | / YA × 100 (%)
Where:
YA = Luminance of measured location without gray level 255 pattern (cd/m2)
YB = Luminance of measured location with gray level 255 pattern (cd/m2)
(0, 0)
Y
(D/2,W/8)
A,U
Y
(D/8,W/2) Y
A,L
Gray 128
(D/2,7W/8)
Y
A, D
Note (6) Definition of White Variation (δW) :
Measure the luminance of gray level 255 at 5 points
Y
(7D/8,W/2)
A, R
AVE
PRODUCT SPECIFICATION
) :
(0, 0)
Y
(D/2,W/8)
B, U
(D/4,W/4)
Gray 255
(7D/8,W/2)
A, R
(3D/4,3W/4)
(D, W)
(D/8,W/2)
Y
B, L
Y
(D/2,7W/8)
B, D
(D, W)
δ
W =
(5)] L (4), L (3), L (2), L (1), [L Maximum
(5)] L (4), L (3), L (2), L (1), [L Minimum
Version 1.0 32 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 33
PRODUCT SPECIFICATION
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.
[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The dust
and oil may cause electrical short or worsen the polarizer.
[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMIS LSI chips.
[ 5 ] Bezel of Set can not press or touch the panel surface. It will make light leakage or scrape.
[ 6 ] Do not plug in or pull out the I/F connector while the module is in operation.
[ 7 ] Do not disassemble the module.
[ 8 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily
scratched.
[ 9 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.
[ 10 ] When storing modules as spares for a long time, the following precaution is necessary.
[ 10.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly
recommended to store the module with temperature from 0 to 35
condensation.
[ 10.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or
fluorescent light.
[ 11 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the converter. Do not disassemble the module or insert anything into the Backlight unit.
[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of
contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.
℃at normal humidity without
Version 1.0 33 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 34
PRODUCT SPECIFICATION
9. DEFINITION OF LABELS
9.1 CMI MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
(a) Model Name: V420HK1-LE6
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X X X X X X Y M D L N N N N
Serial ID includes the information as below:
(a) Manufactured Date: Year: 0~9, for 2010~2019
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
V420HK1-LE6 Rev. XX
X X X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMI Internal Use
CMI Internal Use
Revision
CMI Internal Use
st
to 31st, exclude I ,O, and U.
MADE IN CHINA
CAPG
RoHS
(d) Product Line: 1 → Line1, 2 → Line 2, …etc.
Version 1.0 34 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 35
10. PACKAGING
10.1 PACKAGING SPECIFICATIONS
(1) 6 LCD TV modules / 1 Box
(2) Box dimensions : 1035(L)x309(W)x625(H)mm
(3) Weight : Approx. 50 Kg (6 modules per carton)
10.2 PACKAGING METHOD
Packaging method is shown as following figures.
PRODUCT SPECIFICATION
Figure.10-1 packing method
Version 1.0 35 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 36
PRODUCT SPECIFICATION
Figure.10-2 packing method
Version 1.0 36 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 37
11. MECHANICAL CHARACTERISTIC
PRODUCT SPECIFICATION
Version 1.0 37 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 38
PRODUCT SPECIFICATION
Version 1.0 38 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 39
PRODUCT SPECIFICATION
Version 1.0 39 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Page 40
PRODUCT SPECIFICATION
Version 1.0 40 Date：：：：25 Sep. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Loading...