CHIMEI INNOLUX V420H1-LN4 Specification

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A

TFT LCD Approval Specification

MODEL NO.: V420H1 – LN4

Customer:

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Issue Date: Dec.2.2009

Model No.: V420H1-LN4

Approval

pproved by:

Note:

Approved By

Reviewed By

Prepared By

TV Head Division.

Chao-Chun Chung

QA Dept. Product Development Div.

Hsin-Nan Chen

LCD TV Marketing and Product Management Div.

Cychang Chris Chu

WT Lin

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- CONTENTS -

1. GENERAL DESCRIPTION -------------------------------------------------- 4

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT INVERTER UNIT

-------------------------------------------------- 6

3. ELECTRICAL CHARACTERISTICS -------------------------------------------------- 8

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

3.2.1 CCFL

3.2.2 INVERTER CHARACTERISTICS

(Cold Cathode Fluorescent Lamp) CHARACTERISTICS

4. BLOCK DIAGRAM -------------------------------------------------- 12

4.1 TFT LCD MODULE

5. INPUT TERMINAL PIN ASSIGNMENT -------------------------------------------------- 13

5.1 TFT LCD MODULE INPUT

5.2 BACKLIGHT UNIT

5.3 BLOCK DIAGRAM OF INTERFACE

5.4 LVDS INTERFACE

5.5 COLOR DATA INPUT ASSIGNMENT

6. INTERFACE TIMING -------------------------------------------------- 22

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS -------------------------------------------------- 26

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS -------------------------------------------------- 29

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

8.2 SAFETY PRECAUTIONS

9.DEFINITION OF LABELS -------------------------------------------------- 30

9.1 CMO MODULE LABEL

10. PACKAGING -------------------------------------------------- 31

10.1 PACKING SPECIFICATION.

10.2 PACKING METHOD

11.MECHANICAL CHARACTERISTICS

-------------------------------------------------- 33

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REVISION HISTORY

Version Date Page Section Description

Ver. 0.0 Sep 11, 2009 All All The tentative specification was first issued.

Ver. 1.0 Nov 24 2009 4 1.2 Delete ό180 degree rotation display optionύ

Ver. 1.0 Nov 24 2009 4 1.4 Change surface treatment from Haze 17% to Haze 11%

Ver. 1.0 Nov 24 2009 27 7.2

Ver .2.0 Dec .2.2009

Change color chromaticity from

“Rx=0.645,Ry=0.332,Gx=0.273,Gy=0.601,Bx=0.151,By=0.065” to “Rx=0.640,Ry=0.330,Gx=0.271,Gy=0.600,Bx=0.150,By=0.064”

The approval specification was built. Nothing changed from tentative specification.

Issue Date: Dec.2.2009

Model No.: V420H1-LN4

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V420H1-LN4 is a 42” TFT Liquid Crystal Display module with 16-CCFL backlight unit and 2ch-LVDS

interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).

1.2 FEATURES

- High brightness (450 nits)

- High contrast ratio (4000:1)

- Fast response timf!)Hsbz!up!hsbz!bwfsbhf!7/6!nt*

- High color saturation (NTSC 72%)

- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

- DE (Data Enable) only mode

- LVDS (Low Voltage Differential Signaling) interface

- Optimized response time for 60/50 Hz frame rate

- Ultra wide viewing angle : Super MVA technology

- RoHS compliance

1.3 APPLICATION

- Standard Living Room TVs.

- Public Display Application.

- Home Theater Application.

- MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note Active Area 930.24(H) x 523.26 (V) (42.02” diagonal) mm Bezel Opening Area 939(H) x 531(V) mm Driver Element a-si TFT active matrix - Pixel Number 1920x R.G.B. x 1080 pixel Pixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 16.7M color -

Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and

back outlines.

Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to

Anti-Glare coating (Haze 11%)

Hard coating (3H)

- (2)

(1)

change this feature.

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1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note Horizontal (H) 982.0 983.0 984.0 mm

Module Size

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth does not include connectors.

Vertical (V) 575.0 576.0 577.0 mm Depth (D) 47.9 48.9 49.9 mm

Weight 11900 g -

Approval

(1), (2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature T Operating Ambient Temperature T Shock (Non-Operating) S Vibration (Non-Operating) V

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of display

ST

OP

NOP

Min. Max.

-20 +60 ºC (1)

Value

0 50 ºC (1), (2)

- 50 G (3), (5)

- 1.0 G (4), (5)

Unit Note

area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber. Thermal

management should be considered in final product design to prevent the surface temperature of display

area from being over 65 ºC. The range of operating temperature may degrade in case of improper thermal

management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

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Issue Date: Dec.2.2009

Model No.: V420H1-LN4

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Item Symbol

Power Supply Voltage V

Logic Input Voltage V

CC

Min. Max.

-0.3 13.5 V

IN

-0.3 3.6 V

Value

Unit Note

(1)

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage V Power Supply Voltage V

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

W

BL

Valu e

Min. Max.

Ё

0 30 V (1)

3000 V

Unit Note

RMS

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE (Ta = 25 ± 2 ºC)

Parameter Symbol Power Supply Voltage V

Rush Current I

White 0.84 1.1 A

Power Supply Current

Differential Input High Threshold Voltage

Differential Input Low

LVDS interface

Common Input Voltage V

Differential input voltage |VID| 200

Terminating Resistor R

CMOS interface

Input High Threshold Voltage V

Input Low Threshold Voltage V

Black 0.83 - A Vertical Stripe

Threshold Voltage

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Value

Min. Typ. Max.

10.8 12 13.2 V (1)

- - 5.0 A (2)

+100

ЁЁ

1.0 1.2 1.4 V

T

Ё

2.7

IL

0

RUSH

V

LVT H

V

LVT L

CC

-

CM

IH

0.48 - A

ЁЁ

-100 mV

Ё

100

Ё

600 mV

Ё

3.3 V

0.7 V

Issue Date: Dec.2.2009

Model No.: V420H1-LN4

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Unit Note

(3)

mV

(4)

ohm

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

+12v

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Model No.: V420H1-LN4

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Vcc rising time is 470us

Vcc

0.9Vcc

0.1Vcc

470us

Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f

whereas a power dissipation check pattern below is displayed.

a. White Pattern

Active Area

b. Black Pattern

Active Area

c. Horizontal Pattern

= 60 Hz,

v

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Note (4) The LVDS input characteristics are as follows:

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3.2 BACKLIGHT UNIT

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (Ta = 25 ± 2 ºC)

Parameter Symbol

Lamp Input Voltage V Lamp Current I

Lamp Turn On Voltage V

Operating Frequency F Lamp Life Time L

L

S

L

BL

Min. Typ. Max.

- 1310 - V

7.5 8 8.5 mA

--

35 - 70 KHz (3)

50,000 60,000 - Hrs (4)

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring master

Value

2230 2060

Unit Note

RMS

V

RMS

V

RMS

(1)

Ta = 0 ºC (2)

Ta = 25 ºC (2)

and slave board.

Note (2) The lamp starting voltage V

should be applied to the lamp for more than 1 second after startup.

S

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the

display input signals, and it may result in line flow on the display. In order to avoid interference, the

lamp frequency should be detached from the horizontal synchronous frequency and its harmonics

as far as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and

the effective discharge length is longer than 80% of its original length (Effective discharge length is

defined as an area that has equal to or more than 70% brightness compared to the brightness at the

center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25 2к

and I

= 7.5~ 8.5mArms.

L

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(

)

q

4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

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Model No.: V420H1-LN4

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ERX0(+/-) ERX1(+/-) ERX2(+/-) ERX3(+/-) ECLK(+/-)

ORX0(+/-) ORX1(+/-) ORX2(+/-) ORX3(+/-) OCLK(+/-)

SELLVDS ODSEL

Vcc

GND

CN1

VB

GND

Status

A_DIM

I_PWM

BLON

FI-RE51S-HF

FRAME

BUFFER

INPUT CONNECTOR

JAE

TIMING

CONTROLLER

or e

uivalent

CN11: 528520870 (Molex) or equivalent

INVERTER

CONNECTOR

CN1:S14B-PH-SM4-

TB(D)(LF) or

equivalent

SCAN DRIVER

TFT LCD PANEL

(1920x3x1080)

DC/DC

CONVERTER

& REFERENCE

CN2-CN7:SM02 (13.0)-BDAS-3-TB(LF)(JST) or equivalent

BACKLIG

H

T UNIT

DATA DRIVER

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

FI-RE51S-HF (JAE) or equivalent

Pin Name Description Note

1 GND Ground 2 N.C. No Connection 3 N.C. No Connection 4 N.C. No Connection 5 N.C. No Connection 6 N.C. No Connection 7 SELLVDS LVDS data format Selection (3)(5)

8 N.C. No Connection (2)

9 ODSEL

10 N.C. No Connection (2) 11 N.C. No Connection 12 ERX0- Even pixel Negative LVDS differential data input. Channel 0 13 ERX0+ Even pixel Positive LVDS differential data input. Channel 0 14 ERX1- Even pixel Negative LVDS differential data input. Channel 1 15 ERX1+ Even pixel Positive LVDS differential data input. Channel 1 16 ERX2- Even pixel Negative LVDS differential data input. Channel 2 17 ERX2+ Even pixel Positive LVDS differential data input. Channel 2 18 GND Ground 19 ECLK- Even pixel Negative LVDS differential clock input 20 ECLK+ Even pixel Positive LVDS differential clock input 21 GND Ground 22 ERX3- Even pixel Negative LVDS differential data input. Channel 3 23 ERX3+ Even pixel Positive LVDS differential data input. Channel 3 24 N.C. No Connection 25 N.C. No Connection 26 N.C. No Connection 27 N.C. No Connection 28 ORX0- Odd pixel Negative LVDS differential data input. Channel 0 29 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0 30 ORX1- Odd pixel Negative LVDS differential data input. Channel 1 31 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1 32 ORX2- Odd pixel Negative LVDS differential data input. Channel 2 33 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2 34 GND Ground 35 OCLK- Odd pixel Negative LVDS differential clock input. 36 OCLK+ Odd pixel Positive LVDS differential clock input. 37 GND Ground 38 ORX3- Odd pixel Negative LVDS differential data input. Channel 3 39 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3 40 N.C. No Connection 41 N.C. No Connection 42 N.C. No Connection 43 N.C. No Connection 44 GND Ground 45 GND Ground

Overdrive Lookup Table Selection

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Model No.: V420H1-LN4

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(2)

(4)(6)

(2)

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46 GND Ground

47 GND Ground

48 VCC +12V power supply 49 VCC +12V power supply 50 VCC +12V power supply 51 VCC +12V power supply

Note (1) LVDS connector pin order defined as follows

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Note (2) Reserved for internal use. Please leave it open.

Note (3) Low = Open or connect to GND: VESA Format, High = Connect to +3.3V: JEIDA Format.

Note (4) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance

with the frame rate to optimize image quality.

Low = Open or connect to GND, High = Connect to +3.3V

ODSEL Note

L or open Lookup table was optimized for 60 Hz frame rate.

H Lookup table was optimized for 50 Hz frame rate.

Note (5) LVDS signal pin connected to the LCM side has the following diagram.

Vcc

TCON

Selector (pin9)

R1

R2

R3

Setting

System side

LCM side

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Note (6) ODSEL signal pin connected to the LCM side has the following diagram.

R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)

R1

Selector (pin9)

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R2

R3

Setting

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TCON

System side

LCM side

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

CN3-CN10: BHR-04VS-1 (JST).

Pin Name Description Wire Color

1 HV High Voltage White 2 HV High Voltage Pink

Note (1) The backlight interface housing for high voltage side is a model BHR-04VS-1, manufactured by JST.

The mating header on inverter part number is SM02(12.0)B-BHS-1-TB(LF).

1 HV(White)

2 HV(Pink)

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1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

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OB0

OG0

G0-EG

0

r

0

p

OB0

OG0

p

O

ORx0

0

G0-EG

5.3 BLOCK DIAGRAM OF INTERFACE

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ER0-ER7

E

EB

-EB7

DE

OR0-OR7

-OG7

-OB7

DCLK

Host

Graphics

Controller

ERx0+

-

TxIN

ERx

ERx1+

7

ERx1-

ERx2+

ERx2-

ERx3+

ERx3-

51Ө

51Ө 51Ө

100pF

51Ө

100pF

100

100pF

RxOUT

ER0-ER7

F

E

EB

7

-EB7

DE

OR0-OR7

-OG7

-OB7

ECLK+

PLL

51Ө

-

100pF

51Ө

PLL

DCLK

Timing

ORx0+

ORx1+

ORx1-

51Ө

100pF

100

F

-

Controlle

LVDS Transmitter

THC63LVDM83A

(LVDF83A)

PLL

ORx2+

Rx2-

ORx3+

ORx3-

OCLK+

51Ө

100pF

51Ө 51Ө

100pF

51Ө

-

100pF

51Ө

LVDS Receiver

17

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ER0~ER7 : Even pixel R data

EG0~EG7 : Even pixel G data

EB0~EB7 : Even pixel B data

OR0~OR7 : Odd pixel R data

OG0~OG7: Odd pixel G data

OB0~OB7 : Odd pixel B data

DE : Data enable signal

DCLK : Data clock signal

Notes: (1) The system must have the transmitter to drive the module.

(2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when

it is used differentially.

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(3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the

second pixel is even pixel.

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5.4 LVDS INTERFACE

VESA LVDS formaΚʻ˦˘˟˟˩˗˦ʳ˼ː˟ʳʳ˸ʼʳ

RXCLK

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Current ˶˶˿˸

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ORX0

ORX1

ORX2

ORX3

ERX0

ERX1

ERX2

ERX3

JEDIA LVDS formaΚʻ˦˘˟˟˩˗˦ʳ˼ː˛ʼʳ

G0

R0R5 R4 R3 R2 R1

B0 G5B1

G6G7B7 B6RSVD

B0 G5B1

G6G7B7 B6RSVD

Current ˶˶˿˸

G1G3 G2G4

B2B4 B3B5VS HSDE

R6R7

R0R5 R4 R3 R2 R1

G1G3 G2G4

B2B4 B3B5VS HSDE

R6R7

RXCLK

ORX0

ORX1

ORX2

ORX3

ERX0

ERX1

ERX2

ERX3

G2

R2R7 R6 R5 R4 R3

B2 G7B3

G0G1B1 B0RSVD

B2 G7B3

G0G1B1 B0RSVD

G3G5 G4G6

B4B6 B5B7VS HSDE

R0R1

R2R7 R6 R5 R4 R3

G3G5 G4G6

B4B6 B5B7VS HSDE

R0R1

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R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

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5.5 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the

color. The higher the binary input, the brighter the color. The table below provides the assignment of the color

versus data input.

Data Signal

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black Red

Green Basic Colors

Gray Scale Of Red

Gray Scale Of Green

Gray Scale Of Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue

Cyan

Magenta

Yellow

White

Red (0) / Dark

Red (1)

Red (2)

:

: Red (253) Red (254) Red (255) Green (0) / Dark Green (1) Green (2)

:

: Green (253) Green (254) Green (255) Blue (0) / Dark Blue (1) Blue (2)

:

: Blue (253) Blue (254) Blue (255)

0

1

0

1

0

:

1

0

:

0

:

0

Red Green Blue

0

1

0

1

0

1

0

1

0

1

0

1

0

:

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

1

0

1

1 0

0 0

0

: :

0

0 0

0 1

0

1

: :

1

0

1

1 0

0 0

0

: :

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

1

0

1

0

:

1

0

1

0

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

F

LVDS

Receiver

Clock

Frequency

Input cycle to cycle jitter Spread spectrum modulation range

clkin

(=1/TC)

T

rcl

clkin_mod

F

60 74.25 80 MHz

ЁЁ

F

-2%

clkin

Ё

200 ps (3)

F

+2% MHz

clkin

Spread spectrum modulation

F

SSM

200 KHz

frequency

LVDS

Setup Time

Tlvsu 600

ЁЁ

Receiver

Data

Hold Time

Tlvhd 600

ЁЁ

Issue Date: Dec.2.2009

Model No.: V420H1-LN4

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(4)

ps

(5)

ps

Vertical

Active

Frame Rate

Total

F

r5

F

r6

Tv 1115 1125 1135 Th

47 50 53 Hz

(6)

57 60 63 Hz

Tv=Tvd+Tvb

Display

Term

Display

Blank

Horizontal

Active

Display

Term

Note (1) ˣ˿˸˴˸ʳ˴˾˸ʳ˸ʳ˻˸ʳ˴˺˸ʳ˹ʳ˼˸˿ʳ˶˿˶˾ʳ˻˴ʳ˹˿˿ʳ˻˸ʳ˵˸˿ʳ˸˴˼Κʳ ʳ ʳ

Note (2) ˧˻˼ʳmodule is operated in DE only mode and please follow the input signal timing diagram beloΚʳ

ʳ

Total

Display

Blank

˙

˶˿˾˼ʻ˴ʼ

˙



ˈ

ʳЊʳ˙

ʳѼʳ˧ʳѼʳ˧˻ʳЊʳ˙

ʳѼʳ˧ʳѼʳ˧˻



ˉ

˶˿˾˼ʻ˼ʼʳ

Tvd 1080 1080 1080 Th

Tvb 35 45 55 Th

Th 1050 1100 1150 Tc

Thd 960 960 960 Tc

Thb 90 140 190 Tc

ʳ

Ё

Th=Thd+Thb

Ё

ʳ

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DE

T

h

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INPUT SIGNAL TIMING DIAGRAM

T

v

T

vd

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Model No.: V420H1-LN4

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vb

T

DCLK

T

c

T

hb

T

hd

DE

DATA

Valid display data ( 960 clocks)

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T

– TI

1

Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

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Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

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RXCLK+

RXn+/-

Tlvsu

Tlvhd

1T‘ 14

LVDS INPUT INTERFACE TIMING DIAGRAM

Tc

3T‘ 14

5T‘ 14

7T‘ 14

9T‘ 14

11T‘

14

13T‘

14

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6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the diagram below.

cc

0.1V

T4

Power Off

0.5ЉT1Љ10ms

2

0

500ms

50ms

T

3

50ms

T

4

T

LVDS Signals

0V

CC

0.1V

Power On

T

3T1

T

2

VA L I D

0ЉT7ЉT2

T

0

8

T3

T

7

8

T

Signal selector

(SELLVDS,OD_SEL)

Backlight (Recommended)

500msЉT

100ms

5

T6

50%

T

5

Power ON/OFF Sequence

Note.

(1) The supply voltage of the external system for the module input should follow the definition of Vcc.

(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD operation

50%

T

6

or the LCD turns off before the backlight turns off, the display may momentarily become abnormal screen.

(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.

(4) T4 should be measured after the module has been fully discharged between power off and on period.

(5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

Ambient Temperature Ta

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25r2

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o

C

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current I

Oscillating Frequency (Inverter) F

Vertical Frame Rate Fr 60 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring. In order to stabilize the luminance, the measurement should be executed after lighting backlight for 1 hour

in a windless room.

L

W

50r10

8r0.5

42r3

%RH

mA

KHz

LCDModule

LCD Panel

Field of View = 1º

500 mm

CS-2000

Light Shield Room

AmbientLuminance < 2lux)

(

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Approval

Contrast Ratio CR

Response Time

Center Luminance of White L

White Variation

Cross Talk CT

Red

Green

Color Chromaticity

Viewing Angle

Blue

White

Color Gamut C.G

Horizontal

Vertical

Gray to

gray

GW

Rx

Ry

Gx

Gy

Bx

By Wx Wy

Tx+

T

x

TY+

T -

Y

3000 4000

- 6.5 12

C

T

=0q, TY =0q

x

Viewing angle at normal direction.

CRt20

380 450

- - 1.3

--4

0.640

0.330

Typ.

-0.03

68 72

80 88 -

80 80 80

0.271

0.600

0.150

0.064

0.280

0.285

88 88 88

- Note (2)

ms Note (3)

2

cd/m

Typ.

+0.03

- % NTSC

Deg. Note (1)

-

Note (4)

- Note (6)

% Note (5)

-

Note (1) Definition of Viewing Angle (Tx, Ty):

Viewing angles are measured by Conoscope Cono-80

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

pixels whiteall withLuminance Surface pixels black all withLuminance Surface

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

Note (3) Definition of Gray-to-Gray Switching Time:

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A

Optical Response

100 %

90 %

10 %

0 %

Gray to Gray

Switching Time

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Time

Gray to Gray

Switching Time

The driving signal means the signal of gray level 0% ,20% ,40%,60%,80%,100%

Gray to gray average time means the average switching time of gray level 0% ,20% ,40%,60%,80%,100%

to each other.

Note (4) Definition of Luminance of White (L

, L

):

C

AVE

Measure the luminance of gray level 255 at center point and 5 points

LC = L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

ʳ

Note (5) Definition of Cross Talk (CT):

CT = | YB – YA | / YA u 100 (%)

Where:

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

(0, 0)

Y

(D/8,W/2)

A, L

(D/2,7W/8)

Y

A, D

Note (6) Definition of White Variation (GW):

ctive Area

Gray 128

Y

A, U

Y

A, R

(D,W)

(D/2,W/8)

(7D/8,W/2)

(D/4,W/4)

Y

(D/8,W/2)

B, L

Y

(D/2,7W/8)

B, D

(0, 0)

ctive Area

Gray 0

Gray

0

Gray 128

Y

B, U

Y

B, R

(3D/4,3W/4)

(D,W)

(D/2,W/8)

(7D/8,W/2)

Measure the luminance of gray level 255 at 5 points

GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) Do not apply rough force such as bending or twisting to the module during assembly.

(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

(5) Do not plug in or pull out the I/F connector while the module is in operation.

(6) Do not disassemble the module.

(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.

(9) When storing modules as spares for a long time, the following precaution is necessary.

(a)Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to

store the module with temperature from 0 to 35кat normal humidity without condensation.

(b)The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case

of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

(3) After the module’s end of life, it is not harmful in case of normal operation and storage.

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9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

CHI MEI

OPTOELECTRONICS

V420H1 -LN4 Rev. XX

X X X X X X X Y M D L N N N N

CHI MEI

OPTOELECTRONICS

(a) Model Name: V420H1-LN4

(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

(c) Serial ID: X X X X X X X Y M D L N N N N

V420H1 -LN4 Rev. XX

X X X X X X X Y M D L N N N N

Serial No.

E207943

MADE IN TAIWAN

GEMN

RoHS

E207943

MADE IN TAIWAN

MADE IN CHINA

LEOO(or CAPG or CANO)

RoHS

Serial ID includes the information as below:

(a) Manufactured Date: Year: 0~9, for 2000~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

(b) Revision Code: Cover all the change

(c) Serial No.: Manufacturing sequence of product

(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.

Product Line

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

st

to 31st, exclude I ,O, and U.

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10. PACKAGING

10.1 PACKING SPECIFICATIONS

(1) 4 LCD TV modules / 1 Box

(2) Box dimensions : 1085(L)x296(W)x653(H)mm

(3) Weight : Approx. 45.3Kg(4 modules per carton)

10.2 PACKING METHOD

Figures 10-1 and 10-2 are the packing method

LCD TV Module

Issue Date: Dec.2.2009

Model No.: V420H1-LN4

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Anti-Static Bag

Cushion(Bottom)

Carton

Cushion(Top)

PP Belt

Carton Label

Figure.10-1 packing method

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Sea / Land Transportation

(40ft Container)

Air Transportation

Figure.10-2 packing method

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11. MECHANICAL CHARACTERISTICS

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࡛ભሽ՗ٝڶૻֆ׹

%*+/'+

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࡛ભሽ՗ٝڶૻֆ׹

%*+/'+

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࡛ભሽ՗ٝڶૻֆ׹

%*+/'+

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