One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 3
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
REVISION HISTORY
VersionDate
Ver 2.0Nov. 19,’09All All Approval Specification was first issued.
Page
(New)
SectionDescription
3
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 4
Global LCD Panel Exchange Center
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V400H1- L08 is a 40” TFT Liquid Crystal Display module with 12-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 FHD format and can display true 16.7M colors (8-bit colors).
The Balance Board module for backlight is built-in.
1.2 FEATURES
- High brightness (500 nits)
- Ultra-high contrast ratio (6500:1)
- Faster response time (Gray to gray average 6.5ms)
- High color saturation NTSC 72%
- Ultra wide viewing angle: 176(H)/176(V) (CR>20) with Super MVA technology
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Color reproduction (nature color)
- Optimized response time for both 50/60Hz Frame rate
- Low color shift function
- RoHS compliance
1.3 APPLICATION
- TFT LCD TVs
- Multi-Media Display
1.4 GENERAL SPECIFICATIONS
Item Specification Unit Note
Active Area 885.6(H) x 498.15 (V) (40” diagonal) mm
Bezel Opening Area 891.7 (H) x 504.8 (V) mm
Driver Element a-si TFT active matrix -
Pixel Number 1920 x R.G.B. x 1080 pixel
Pixel Pitch (Sub Pixel) 0.15375 (H) x 0.46125 (V) mm
Pixel Arrangement RGB vertical stripe -
Display Colors 16.7M color
Display Operation Mode Transmissive mode / Normally black -
Surface Treatment Anti-Glare coating (Haze 11%), Hard coating (3H)-
(1)
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 951 952 953 mm (1)
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 550 551 552 mm (1)
Depth(D) 34 35 36 mm To Rear
Depth(D) 52.8 53.8 54.8 mm To Inv Cover
Weight - 9310 - g
4
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 5
Global LCD Panel Exchange Center
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature T
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Value
Min. Max.
OP
- 50 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
0 +50 ºC (1), (2)
Unit Note
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
5
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
8060-20 400 20-40
Version 2.0
www.panelook.com
Page 6
Global LCD Panel Exchange Center
2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to
store the module with temperature from 0 to 35 ºC at normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 13.5 V
Input Signal Voltage VIN -0.3 3.6 V
www.panelook.com
Value
Min. Max.
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Unit Note
(1)
2.3.2 BACKLIGHT UNIT
Item Symbol
Lamp Vol tageV
Note (1) No moisture condensation or freezing.
Min.Max.
Ё
Value
Unit Note
3000V
6
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 7
Global LCD Panel Exchange Center
3. ELECTRICAL CHARACTERISTICS
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
3.1 TFT LCD MODULE
Ta = 25 ± 2 ºC
Value
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2
Rush Current I
- - 2.4 A (2)
RUSH
White Pattern - 0.8 - A
Power Supply Current
Differential Input High
Threshold Voltage
LVDS
Interface
Differential Input Low
Threshold Voltage
Common Input Voltage V
Differential input voltage |VID| 200
Terminating Resistor R
CMOS
interface
Input High Threshold Voltage VIH 2.7 - 3.3 V
Input Low Threshold Voltage V
Black Pattern - 0.4 - A
Horizontal
Stripe
I
CC
- 1.0 1.3 A
V
+100 - - mV
LVTH
V
- - -100 mV
LVTL
1.0 1.2 1.4 V
CM
Ё
- 100 -
T
0 - 0.7 V
IL
600 ohm
Unit Note
Vrms
(1)
(3)
(4)
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
+12v
7
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 8
Global LCD Panel Exchange Center
Vcc rising time is 470us
0.1Vcc
GND
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
+12V
0.9Vcc
470us
a. White Pattern
Active Area
c. Horizontal Pattern
b. Black Pattern
Active Area
8
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 9
Global LCD Panel Exchange Center
(2)
(2)
Note (4) The LVDS input characteristics are as follows:
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
25 ERX0- Even pixel Negative LVDS differential data input. Channel 0
26 ERX0+ Even pixel Positive LVDS differential data input. Channel 0
27 ERX1- Even pixel Negative LVDS differential data input. Channel 1
28 ERX1+ Even pixel Positive LVDS differential data input. Channel 1
29 ERX2- Even pixel Negative LVDS differential data input. Channel 2
30 ERX2+ Even pixel Positive LVDS differential data input. Channel 2
31 GND Ground
32 ECLK- Even pixel Negative LVDS differential clock input.
33 ECLK+ Even pixel Positive LVDS differential clock input.
13
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
(1)
(1)
Version 2.0
www.panelook.com
Page 14
Global LCD Panel Exchange Center
34 GND Ground
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
35 ERX3- Even pixel Negative LVDS differential data input. Channel 3
36 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
37 N.C. No Connection
38 N.C. No Connection
39 GND Ground
40 SCL EEPROM Serial Clock
41 N.C. No Connection
42 N.C. No Connection
43 WP EEPROM Write Protection
44 SDA EEPROM Serial Data
45 LVDS_SEL High(3.3V) or open for VESA, Low (GND) for JEIDA (4)
46 N.C. No Connection
47 N.C. No Connection
48 N.C. No Connection
49 N.C. No Connection
50 N.C. No Connection
(1)
(3)
(3)
(3)
51 N.C. No Connection
Note (1) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and
the second pixel is even pixel
Note (2) LVDS connector pin order defined as follows
Note (3) Reserved for internal use. Please leave it open.
Note (4) Low: JEIDA LVDS Format (Connect to GND), High or open: VESA Format. (Connect to +3.3V)
Note (5) LVDS signal pin connected to the LCM side has the following diagram.
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
14
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 15
Global LCD Panel Exchange Center
g
y
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Vcc
Selector (pin45
stem side
System side
R1 < 1K
R1
)
R2
Settin
R3
TCON
LCM sideS
15
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 16
Global LCD Panel Exchange Center
5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN201-CN206 (Housing): CP042EP1MFB-LF (Cvilux)
Pin No. Symbol Description Wire Color
1 HV High Voltage Blue
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model CP042ESFA00 (Cvilux), manufactured
by Cvilux. The mating header on inverter part number is CP042EP1MFB-LF (Cvilux).
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
16
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 17
Global LCD Panel Exchange Center
5.3 BALANCE BOARD UNIT
CN127 (Header): 130001WR-02E (YEONHO)
Pin No.Symbol Description
1 HV+(-) High Voltage Input
2 HV+(-) High Voltage Input
CN101-CN106 (Header): CP042EP1MFB-LF (Cvilux)
Pin No.Symbol Description
1
2
CN125 (Header): KN30-7P-1.25H (Hirose)
Pin No. Symbol Description
1 VCC
2
3
4
5
6
7
HV
HV
FBLamp Current Detected Voltage
FBLamp Current Detected Voltage
GNDSignal Ground
GNDSignal Ground
LDCCFL Connector Open & Non-lighting signal
LDCCFL Connector Open & Non-lighting signal
CCFL High Voltage
CCFL High Voltage
Power Supply for Protection Circuit
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
17
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 18
Global LCD Panel Exchange Center
G0-EG
G0-EG
0
r
0
p
ORx0
O
CLK
OB0
K
5.4 BLOCK DIAGRAM OF INTERFACE
CNF1
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
ER0-ER7
E
EB0-EB7
DE
OR0-OR7
OG0-OG7
OB0-OB7
D
Host
Graphics
Controller
ERx0+
TxIN
ERx
ERx1+
7
ERx1-
ERx2+
ERx2-
ERx3+
ERx3-
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
100pF
100
100pF
100pF
F
-
RxOUT
ER0-ER7
E
-EB7
EB
DE
OR0-OR7
OG0-OG7
7
-OB7
ECLK+
PLL
51Ө
-
100pF
51Ө
PLL
DCL
Timing
ORx0+
-
ORx1+
ORx1-
51Ө
100pF
51Ө
51Ө
100pF
Controlle
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
PLL
ORx2+
Rx2-
ORx3+
ORx3-
OCLK+
18
51Ө
-
100pF
51Ө
51Ө
100pF
51Ө
51Ө
100pF
51Ө
LVDS Receiver
PLL
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 19
Global LCD Panel Exchange Center
ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the
second pixel is even pixel.
19
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 20
Global LCD Panel Exchange Center
5.5 LVDS INTERFACE
JEDIA FormatΚSELLVDS=L
RXCLK
RXCLK
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
VESA FormatΚSELLVDS=H or Open
R7G2R6R5R4R3
R7G2R6R5R4R3
B2G7B3
B2G7B3
R7G2R6R5R4R3
R7G2R6R5R4R3
B2G7B3
B2G7B3
Current F\FOH
Current F\FOH
G5G4G6
G5G4G6
G5G4G6
G5G4G6
R2
R2
G3
G3
B4B6B5B7VSHSDE
B4B6B5B7VSHSDE
R0G0R1G1B1B0RSVD
R0G0R1G1B1B0RSVD
R2
R2
G3
G3
B4B6B5B7VSHSDE
B4B6B5B7VSHSDE
R0G0R1G1B1B0RSVD
R0G0R1G1B1B0RSVD
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
R5G0R4R3R2R1
R5G0R4R3R2R1
B0G5B1
B0G5B1
R5G0R4R3R2R1
R5G0R4R3R2R1
B0G5B1
B0G5B1
G3G2G4
G3G2G4
G3G2G4
G3G2G4
R0
R0
G1
G1
B2B4B3B5VSHSDE
B2B4B3B5VSHSDE
R6G6R7G7B7B6RSVD
R6G6R7G7B7B6RSVD
R0
R0
G1
G1
B2B4B3B5VSHSDE
B2B4B3B5VSHSDE
R6G6R7G7B7B6RSVD
R6G6R7G7B7B6RSVD
20
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 21
Global LCD Panel Exchange Center
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE: Data enable signal
DCLK: Data clock signal
Notes (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
21
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 22
Global LCD Panel Exchange Center
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R7 R6 R5 R4 R3 R2 R1 R0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yel lo w
White
Red(0) / Dark
Red(1)
Red(2)
:
:
Red(253)
Red(254)
Red(255)
Green(0) / Dark
Green(1)
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Data Signal
Red Green Blue
G7G6G5G
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
0
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
1
0
0
0
0
0
0
1
1
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
G3 G2 G1 G0
4
0
0
0
0
1
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
:
:
0
0
0
0
0
0
:
:
1
1
1
0
0
0
:
:
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
1
:
:
:
:
1
0
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
B
B6 B5 B4 B3 B2
7
0
0
0
1
0
1
0
1
1
0
0
0
0
0
0
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
B1B
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
22
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 23
Global LCD Panel Exchange Center
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc (60) 74.25 (80) MHZ -
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
LVDS Receiver Clock
LVDS Receiver Data
Vertical Active Display Term
Input cycle to
cycle jitter
Spread
spectrum
modulation
range
Spread
spectrum
modulation
frequency
Setup Time Tlvsu 600 - - ps
Hold Time Tlvhd 600 - - ps
Frame Rate
Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th -
Trcl - - 200 ps (3)
F
clkin_mod
F
F
200 KHz
SSM
Fr6 57 60 63 Hz
Fr5 47 50 53
clkin
-2%
Ё
F
+2%MHz
clkin
(4)
-
(5)
(6)
Blank Tvb 35 45 55 Th -
Total Th 1050 1100 1150 Tc Th=Thd+Thb
Horizontal Active Display Term
Note (1) Please make sure the range of pixel clock has follow the below equationΚ
Fclkin(max)
Fr5
Ѽ
Tv Ѽ Th Њ Fclkin(min)
Note (2) This module is operated in DE only mode and please follow the input signal timing diagram below
Display Thd 960 960 960 Tc -
Blank Thb 90 140 190 Tc -
Њ
Fr6 Ѽ Tv Ѽ Th
Κ
23
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 24
Global LCD Panel Exchange Center
DE
T
h
www.panelook.com
INPUT SIGNAL TIMING DIAGRAM
T
v
T
vd
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
T
vb
DCLK
T
hd
DE
DAT
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
Valid display data (960 clocks)
Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
24
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 25
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T
3T
5T
7T
9T
11T
13T
14
Note (6) (ODSEL) = H/L or open for 50/60Hz frame rate. Please refer to 5.1 for detail information
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
14
14
14
25
14
14
14
Version 2.0
www.panelook.com
Page 26
Global LCD Panel Exchange Center
r
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
0V
0.5ЉЉЉЉT1ЉЉЉЉ10ms
0ЉЉЉЉT
0ЉЉЉЉT
500ms ЉЉЉЉT
LVDS Signals
2
ЉЉЉЉ50ms
3
ЉЉЉЉ50ms
4
0V
0.1V
CC
Power On
www.panelook.com
T
1
T
2
VALID
T
3
0.1V
cc
T
4
Power Off
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Note
0ЉЉЉЉT7ЉЉЉЉT2
0ЉЉЉЉT8ЉЉЉЉT3
T
7
T
8
Signal selecto
(SELLVDS…)
Backlight
50%
50%
(Recommended)
500msЉЉЉЉT
5
T
5
T
6
Power ON/OFF Sequence
Κ
(1) The supply voltage of the external system for the module input should follow the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
(3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance.
(4) T4 should be measured after the module has been fully discharged between power off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.
26
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 27
Global LCD Panel Exchange Center
y
(2)
/
(4)
(7)
(5)
y
y
y
y
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current(HV) I
Oscillating Frequency
(Balance Board)
Frame rate 60 Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should
www.panelook.com
CC
L
F
W
14.5 ± 0.5
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
o
±
2
25
±
10
50
12 V
47±2
C
%RH
mA
KHz
be measured under the test conditions described in 7.1 and stable environment shown in Note (6).
ItemS
Contrast RatioCR46006500
Response Time
Center Luminance of WhiteL
White Variation
Cross TalkCT--4.0%
Red
Green
Color
Chromaticity
Blue
White
Color GamutCG
Viewing
Angle
Horizontal
Ver t ical
mbolConditionMin.Typ.Max.UnitNote
-
Gray to gray
average
δ
W
θ
=0°,
θ
=0
Rx0.630R
Gx0.290G
x
Viewing angle at
Normal direction
°
Y
Bx 0.148B
- 6.5 12 ms(3)
400500
-
--1.3-
0.323-
Typ. –
0.03
0.597-
Typ. +
0.03
0.049-
-
cd
Wx0.280W
0.290
-
-72 -%NTSC
θ
+
θ
-
θ
+
θ
-
CR
≥
20
8088808880888088-
Deg
.
(6)
(1)
27
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
www.panelook.com
Page 28
Global LCD Panel Exchange Center
T
Note (1) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by Autronic Conoscope Cono-80
www.panelook.com
Normal
θ
x = θy = 0º
θy- θy+
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
θ
X-
= 90º
6 o’clock
θ
y-
= 90º
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in
Note (7).
θx−
θx+
y+
12 o’clock direction
θ
y+
= 90º
x+
θ
X+
= 90º
Note (3) Definition of Gray to Gray Switching Time :
100%
90%
Optical
Response
10%
0%
Gray to gray
switching time
28
Gray to gray
switching time
ime
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 29
Global LCD Panel Exchange Center
A
A
(
)
A
(
)
A
(
)
www.panelook.com
The driving signal means the signal of gray level 0, 63, 127, 191, 255.
Gray to gray average time means the average switching time of gray level 0, 63, 127, 191, 255 to each
other .
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point and 5 points
L
= L (5)
C
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / Y
B
×
100 (%)
A
Where:
(a)
Y
= Luminance of measured location without gray level 255 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
ctive Area
Gray 51
Y
A, U
Y
A, R
(D,W)
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(0, 0)
, L
):
C
AVE
(D/2,W/8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
(0, 0)
ctive Area
Gray 0
Gray 255
Gray 51
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D,W
(b)
Y
= Luminance of measured location without gray level 255 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
(0, 0)
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
ctive Area
Gray 0
Y
Y
D,W
A, U
A, R
(D/2,W/8)
(7D/8,W/2)
29
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
(0, 0)
ctive Area
Gray 0
Gray 255
Gray 0
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D,W
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 30
Global LCD Panel Exchange Center
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be
executed after lighting Backlight for 1 hour in a windless room.
LCD Module
LCD Panel
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
CS-2000
Field of View = 1º
500 mm
Note (7) Definition of White Variation (
Measure the luminance of gray level 255 at 5 points
δ
W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
W/4
Light Shield Room
(Ambient Luminance < 2lux)
δ
W):
Horizontal Line
D
D/4D/23D/4
12
: Test Point
W
W/2
5
X
X=1 to 5
Vertical Line
3W/4
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
34
Active Area
30
Version 2.0
www.panelook.com
Page 31
Global LCD Panel Exchange Center
8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
www.panelook.com
Issued Date: Nov. 19, 2009
Model No.: V400H1 - L08
Approval
V400H1 -L08 Rev. XX
CHI MEI
OPTOELECTRONICS
(a) Model Name: V400H1-L08
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Production Locations / Factory ID: IN TAIWAN (GEMN) or IN CHINA (LEOO or CAPG or CANO)
(d) CMO barcode definition:
Serial ID: XX-XX-X-XX-YMD-L-NNNN
Code Meaning Description
XX CMO internal use XX Revision Cover all the change
X-XX CMO internal use -
Year, month, day
YMD
L Product line # Line 1=1, Line 2=2, Line 3=3, …
NNNN Serial number Manufacturing sequence of product
(e) Customer’s barcode definition:
X X X X X X X Y M D L N N N N
CM40H18XXXXXLXXLYMDNNNN
Year: 2001=1, 2002=2, 2003=3, 2004=4…
Month: Jan. ~ Dec.=1, 2, 3, ~, 9, A, B, C
st
Day: 1
to 31st =1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U
MADE IN TAIWAN
RoHS GEMN
Serial ID: CM-40H18-X-X-X-XX-L-XX-L-YMD-NNNN
Code Meaning Description
CM Supplier code CMO=CM
40H18
XX
XX
YMD
NNNN Serial number By LCD supplier
Model number
X Revision code C1=1, C2=2, ……C9=9
Source driver IC code
X
Gate driver IC code
X
Cell location Tainan, Taiwan=TN
L Cell line # 1~12=0~C
Module location Tainan, Taiwan=TN
Module line # 1~12=0~C