CHIMEI INNOLUX V315HH6-LS1 Specification

Global LCD Panel Exchange Center

MODEL NO.: V315HH6

www.panelook.com

PRODUCT SPECIFICATION

ϭʳ Tentative Specification
ϮϮϮϮʳ Preliminary Specification
ϭʳ Approval Specification

SUFFIX: LS1

Customer:

APPROVED BY SIGNATURE

Name / Title

Note

Please return 1 copy for your confirmation with your
signature and comments.

Approved By Checked By Prepared By

Chao-Chun Chung

Version 1.3 1 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Vincent Chou Samuel Huang

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

CONTENTS

1. GENERAL DESCRIPTION...................................................................................................................................................5

1.1 OVERVIEW....................................................................................................................................................5

1.2 FEATURES ....................................................................................................................................................5

1.3 APPLICATION................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ........................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS ..................................................................................................................6

2.1 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................6

2.2 PACKAGE STORAGE ....................................................................................................................................7

2.3 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................7

2.3.1 TFT LCD MODULE...............................................................................................................................7

2.3.2 BACKLIGHT CONVERTER UNIT .........................................................................................................7

3. ELECTRICAL CHARACTERISTICS ................................................................................................................................... 8

3.1 TFT LCD MODULE........................................................................................................................................8

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION..................................................................................... 11

4. BLOCK DIAGRAM OF INTERFACE................................................................................................................................ 15

4.1 TFT LCD MODULE.......................................................................................................................................15

5. INPUT TERMINAL PIN ASSIGNMENT ..........................................................................................................................16

5.1 TFT LCD Module Input .................................................................................................................................16

5.2 BACKLIGHT UNIT........................................................................................................................................ 21

5.3 CONVERTER UNIT......................................................................................................................................21

5.4 BLOCK DIAGRAM OF INTERFACE .............................................................................................................23

5.5 LVDS INTERFACE .......................................................................................................................................25

5.6 COLOR DATA INPUT ASSIGNMENT............................................................................................................26

6. INTERFACE TIMING......................................................................................................................................................... 27

6.1 INPUT SIGNAL TIMING SPECIFICATIONS..................................................................................................27

6.2 POWER ON/OFF SEQUENCE.....................................................................................................................31

7. OPTICAL CHARACTERISTICS ........................................................................................................................................ 33

7.1 TEST CONDITIONS .....................................................................................................................................33

7.2 OPTICAL SPECIFICATIONS ........................................................................................................................34

Version 1.3 2 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

PRECAUTIONS...................................................................................................................................................................... 39

8.1 ASSEMBLY AND HANDLING PRECAUTIONS .............................................................................................39

8.2 SAFETY PRECAUTIONS............................................................................................................................. 39

9. DEFINITION OF LABELS..................................................................................................................................................40

9.1 CMI MODULE LABEL...................................................................................................................................40

10. PACKAGING ....................................................................................................................................................................41

10.1 PACKAGING SPECIFICATIONS.................................................................................................................41

10.2 PACKAGING METHOD .............................................................................................................................. 41

11. MECHANICAL CHARACTERISTIC ..............................................................................................................................43

Version 1.3 3 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

Version Date Page(New) Section Description
Ver. 1.0

1.1

1.2

1.3

17 Nov., 2010
18 Nov., 2010

10 Dec., 2010

11 Feb., 2011

All
11
11

12
6

11

27
28
30
31
34

37
8
11
27
28
37
38

www.panelook.com

PRODUCT SPECIFICATION

REVISION HISTORY

All

3.2.1

3.2.2

1.5

3.2.1

3.2.2

6.1.1

6.1.2

6.1

6.2.2

7.2

7

3.1

3.2.2

6.1.1

6.1.2

7.2

7.2

The preliminary specification was first issued.
Note(1): IL: 120 mA  130 mA
Revise converter 2D mode power consumption:
Typ: 45  (50) Max: 51.8  (57.5)
Revise converter 2D mode input current: 2.08  (2.04)
Revise input inrush current, 3D mode: 9.5  (6.67),
IL: 3*typ  2*typ
Note(3): Specify for 2D mode duration
Revise note(6) test condition drawing
Depth(3) Min 34.925,Typ. 35.926, Max. 36.927;
Add depth(4) item
Weight: TBD  4540 g
One string voltage: Max.: 45.5  47.45
Power consumption: Pbl(3D): Typ.: (21.6)(24.0),
Max: (24.8)(27.6)
Converter input current: Ibl(3D):Typ.: (0.9)(1.0),
Max: (1.03)(1.15)
Add column “Frame rate”
Add column “Frame rate”
Note(6) add 3D horizontal timing requirement
New added
Center Luminance: Min: -  (350)
Add 3D Luminance: Typ : (45)
Modify Color chromaticity R,G,B coordinates
Add column “Transmission direction of up polarizer”
Add note(7) and note(8)
Rush current: (3)  (4)
Update note(3) description
Vertical active display term: 3D, Total : 1524  1400
Vertical active display term: 3D, Total : 1524  1400
Update note(7) TN mode shutter glass reference drawing
Update note(8) 3D mode measurement illustration

Version 1.3 4 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

1. GENERAL DESCRIPTION

1.1 OVERVIEW

V315HH6-LS1 is a 31.5” TFT Liquid Crystal Display module with LED Backlight unit and 4ch-LVDS interface. This

module supports 1920 x 1080 Full HDTV format and can display 16.7M colors (8-bit). The converter module for

backlight is built-in.

1.2 FEATURES

Ё High brightness (400 nits)

Ё High contrast ratio (1000 :1)

Ё Fast response time (3ms)

Ё High color saturation (NTSC 72%)

Ё Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

Ё DE (Data Enable) only mode

www.panelook.com

PRODUCT SPECIFICATION

Ё LVDS (Low Voltage Differential Signaling) interface

Ё Optimized response time for 120 Hz frame rate

Ё Viewing Angle : 160°(H)/150°(V) (CR>10) TN Technology

1.3 APPLICATION

Ё TFT LCD TVs

Ё Optimized Brightness, Multi-Media Displays

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 698.4(H) x 392.85(V) mm

Bezel Opening Area 705.4(H) x 399.8 (V) mm

Driver Element a-si TFT active matrix - -

Pixel Number 1920x R.G.B. x 1080 pixel -

Pixel Pitch(Sub Pixel) 0.12125 (H) x 0.36375 (V) mm -

Pixel Arrangement RGB vertical stripe - -

Power consumption (65) Watt (2)

(1)

Display Colors 16.7M color -

Display Operation Mode

Surface Treatment

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) Please refer sec 3.1 and 3.2 for more information of Power consumption

Note (3) The spec. of the surface treatment is temporarily for this phase. CMI reserves the rights to change this feature.

Transmissive mode / Normally White

Anti-Glare coating (Haze 25%)

Version 1.3 5 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

- -

- (3)

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) 740.4 741.4 742.4 mm (1)

Vertical (V) 434.8 435.8 436.8 mm (1)

www.panelook.com

PRODUCT SPECIFICATION

Module Size

Weight 4540 g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth is between bezel to T-CON cover.

Note (3) Module Depth is between bezel to Converter cover.

Note (4) Module Depth is between bezel to rear boss

2. ABSOLUTE MAXIMUM RATINGS

Depth (D)

Depth (D) 25 26 27 mm (3)

Derth (D) 34.9 35.9 36.9 mm (4)

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

19.55

20.55 21.55

Value

Unit Note

Min. Max.

mm (2)

Shock (Non-Operating) SNOP - 50 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature

of display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 30 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

Љ 40 ºC).

Version 1.3 6 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to

store the module with temperature from 0 to 35

(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

к at normal humidity without condensation.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Value

Item Symbol

Min. Max.

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT CONVERTER UNIT

Unit Note

(1)

Value

Item Symbol

Min. Max.

Light bar Voltage VW

Power Supply Voltage VBL 0 30 V (1)

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control & External PWM Control.

Ё

Ё

-0.3 7 V (1), (3)

60 V

Unit Note

3D Mode

DC

Version 1.3 7 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Value

Parameter Symbol

Min. Typ. Max.

Power Supply Voltage VCC 10.8 12 (13.2) V (1)

Unit Note

Rush Current I

White Pattern

Power Consumption

Horizontal Stripe

Black Pattern

White Pattern

Power Supply Current

Horizontal Stripe

Black Pattern

Differential Input High
Threshold Voltage

Differential Input Low

Threshold Voltage
LVDS
interface

Common Input Voltage VCM 1.0 1.2 1.4 V

Differential input voltage

(single-end)

Terminating Resistor R

CMIS
interface

Input High Threshold Voltage VIH 2.7

Input Low Threshold Voltage V

Ё Ё

RUSH

Ё

Ё Ё

Ё Ё

Ё Ё

Ё Ё

Ё Ё

V

LVT H

V

LVTL

| 200

|V

ID

T

0

IL

+100

Ё

Ё Ё

Ё

(4) A (2)

(6.6) (7.8) W

(15) (17.4) W

(15) (17.4) W

(0.55) (0.65) A

(1.25) (1.45) A

(1.25) (1.45) A

Ё Ё

mV

-100 mV

Ё

100

Ё

Ё

600 mV

Ё

ohm

3.3 V

0.7 V

(3)

(4)

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

Version 1.3 8 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

Note (3) The specified power consumption and power supply current is under the conditions at Vcc = 12 V, Ta =

25 ± 2 ºC, f

= 120 Hz, where as a power dissipation check pattern below is displayed.

v

GND

Vcc rising time is 470us

0.9Vcc

0.1Vcc

470us

Vcc

Version 1.3 9 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

a. White Pattern

c. Horizontal Pattern

Active Area

b. Black Pattern

Active Area

Note (4) The LVDS input characteristics are as follows:

Version 1.3 10 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION

PRODUCT SPECIFICATION

3.2.1 LED LIGHT BAR CHARACTERISTICS (

Ta = 25 ± 2 ºC)

The backlight unit contains 2 pcs of light bars

Value

Parameter Symbol

Unit Note

Min. Typ. Max.

Total Current (8 String) If

I

L(2D)

- 1040 1102.4

- 130 137.8

mA

mA

One String Current

I

L(3D)

One String Voltage VW

One String Voltage Variation

ϦV

Life time -

W

- 260 275.6

mApeak 3D ENA=ON

39 - 47.45

- - 2

30,000 - -

VDC IL =130mA

V

Hrs (1)

Note (1) The lifetime is defined as the time which luminance of the LED decays to 50% compared to the

initial value, Operating condition: Continuous operating at Ta = 25±2 , I

3.2.2 CONVERTER CHARACTERISTICS (

Ta = 25 ± 2 ºC)

к

=130mA.

L

Value

Parameter Symbol

Unit Note

Min. Typ. Max.

(1), (2)

IL = 130 mA

(1), (2)

IL=2*typ.

Power Consumption

P

P

BL(2D)

BL(3D)

-

-

(50) (57.5)

(24.0) (27.6)

W

W

Converter Input Voltage VBL 22.8 24.0 25.2 VDC

I

- (2.08) (2.4) A Non Dimming

BL(2D)

Converter Input Current

- (1.0) (1.15) A

I

BL(3D)

=22.8V,(IL=typ.)

V

BL

(3), (7)

=22.8V,(IL=2*typ.)

V

BL

(3), (6)

Input Inrush Current

I

R(2D)

- - (6.67) Apeak

I

R(3D)

-

- (3.24) Apeak

Dimming Frequency FB 150 160 170 Hz (5)

Minimum Duty Ratio DMIN 5 10 - % (4), (5)

Note (1) The power supply capacity should be higher than the total converter power consumption P

the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current

changed as PWM duty on and off. The transient response of power supply should be considered for

the changing loading when converter dimming.

. Since

BL

Note (2) The measurement condition of Max. value is based on 31.5" backlight unit under input voltage 24V,

average LED current 137.8mA at 2D Mode (LED current 275.6 mA

at 3D Mode) and lighting 1

peak

hour later.

Note (3) For input inrush current measurement, the VBL rising time from 10% to 90% is about 30ms.

Version 1.3 11 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

Note (4) 5% minimum duty ratio is only valid for electrical operation.

Note (5) FB and DMIN are available only at 2D Mode.

Note (6) Below diagram is only for power supply design reference.

Test Condition: VBL=22.8V, IL=130mA at 2D Mode/ IL=(260)mApeak at 3D Mode

Iin(A)

Κ

Κ

Κ

6. 67A

2D Mode

3.24A

2.08A

Current

Current

CurrentΚ2.8A

Current

3D Mode

T1 T2 Time (m)

200 ms

Mode Change

2D ->

3D

T2

Duty 20%

Dimming Freq.

200 ms

Version 1.3 12 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

3.2.3 CONVERTER INTERFACE CHARACTERISTICS

www.panelook.com

PRODUCT SPECIFICATION

Parameter Symbol

ON

On/Off Control Voltage

OFF

External PWM Control
Voltage

Error Signal ERR

VBL Rising Time Tr1

Control Signal Rising Time Tr

Control Signal Falling Time Tf

PWM Signal Rising Time TPWMR

PWM Signal Falling Time TPWMF

HI

LO

VBLON

VEPWM

0

0

30

Value

Ё

Ё

Ё

Ё

Ё Ё

5.0 V

0.8 V

5.25 V Duty on

0.8 V Duty off

100 ms

100 ms

50 us

50 us (6)

Te st

Condition

Ё

Ё

Ё

Ё

Ё Ё Ё Ё Ё

Ё

Ё Ё Ё

Ё Ё Ё

Ё Ё Ё

Ё Ё Ё

Min. Typ. Max.

2.0

2.0

Unit Note

(5) , (6)

Abnormal: Open

collector

Normal: GND

(4)

ms 10%-90%V

(6)

BL

Input Impedance Rin

PWM Delay Time TPWM

Ton

BLON Delay Time

T

on1

BLON Off Time Toff

Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to

change the external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the

converter has a possibility to be damaged with wrong power sequence and control signal timing.

Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:

Turn ON sequence: VBL → PWM signal → BLON

Turn OFF sequence: BLOFF → PWM signal → VBL

Note (4) When converter protective function is triggered, ERR will output open collector status.

Note (5)

Note (6) EPWM is available only at 2D Mode.

The EPWM interface that inserts a pull up resistor to 5V in Max Duty (100%), please refers to Fig.2.

Ё

Ё

Ё

Ё

Ё

1

100

300

300

300

Ё Ё

Ё Ё

Ё Ё

Ё Ё

Ё Ё

Fig.1

MΩ E_PWM, BLON

ms (6)

ms

ms

ms

. For a certain reason, the

Version 1.3 13 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

V

V

BL

V

BLON

EPWM

9

Toff

%/

Tf1

9

%/

Tr1

%/

9

9

%/

2.0V

0.8V

2.0V

0.8V

Ton

PWM

T

Backlight on duration

Tr

Ext. Dimming Function

PWMR

T

T

Ton1

Tf

PWMF

Floating

0

0

0

V

W

External

PWM

Period

External

PWM Duty

100%

Fig. 1

5V +/- 5%

10kӨ

Ө

ӨӨ

10k

EPWM

>1MӨ

Ө

ӨӨ

ӨӨӨӨ

Dimming

Circuit

Fig. 2

Version 1.3 14 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

www.panelook.com

PRODUCT SPECIFICATION

CH3_0(+/-)
CH3_1(+/-)
CH3_2(+/-)
CH3_3(+/-)
CH3_CLK(+/-)

CH4_0(+/-)
CH4_1(+/-)
CH4_2(+/-)
CH4_3(+/-)
CH4_CLK(+/-)

CH1_0(+/-)
CH1_1(+/-)
CH1_2(+/-)
CH1_3(+/-)
CH1_CLK(+/-)

CH2_0(+/-)
CH2_1(+/-)
CH2_2(+/-)
CH2_3(+/-)
CH2_CLK(+/-)

L/R_O

SELLVDS

SELLVDS

2D/3D

2D/3D

LR

LR

LD_EN

LD_EN

VCC

VCC

GND

GND

INPUT CONNECTOR

CNF2: 187060-41221 (P-Two),

or equivalent

SCAN DRIVER

TIMING

TFT LCD PANEL

(1920x3x1080)

CONTROLLER

INPUT CONNECTOR

CNF1: 187059-51221 (P-Two),

or equivalent

DC/DC CONVERTER

& REFERENCE

VOLTAGE

DATA DRIVER

E_PWM

E_PWM

L/R_O

L/R_O
GND

GND

VBL

GND

GND

ERR

BLON

BLON

OUTPUT CONNECTOR

CN6: LM123S010HTF13Y

(UNE) or equivalent

CN2-CN3: Molex (51281-1094) or equivalent

CN2-CN3: Molex (51281-1094) or equivalent

CONVERTER

CONVERTER

CONNECTOR

CONNECTOR

CN1: CI0114M1HR0-LF

CN1:

(CvilLux) or

CI0114M1HR0-LA

equivalent

(CvilLux) or

equivalent

BACKLIGHT

BACKLIGHT

UNIT

UNIT

Version 1.3 15 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

CNF1 Connector Pin Assignment: (187059-51221 (P-Two) or equivalent)

Pin Name Description Note

1 N.C. No Connection

2 N.C. No Connection

3 N.C. No Connection

4 N.C. No Connection

www.panelook.com

PRODUCT SPECIFICATION

(1)

5 L/R_O Output signal for Left Right Glasses control

6 N.C. No Connection (1)

7 SELLVDS LVDS Data Format Selection (2)(6)

8 N.C. No Connection

9 N.C. No Connection

10 N.C. No Connection

11 GND Ground

12 CH1[0]- First pixel Negative LVDS differential data input. Pair 0

13 CH1[0]+ First pixel Positive LVDS differential data input. Pair 0

14 CH1[1]- First pixel Negative LVDS differential data input. Pair 1

15 CH1[1]+ First pixel Positive LVDS differential data input. Pair 1

16 CH1[2]- First pixel Negative LVDS differential data input. Pair 2

17 CH1[2]+ First pixel Positive LVDS differential data input. Pair 2

18 GND Ground

(8)

(1)

19 CH1CLK- First pixel Negative LVDS differential clock input.

20 CH1CLK+ First pixel Positive LVDS differential clock input.

21 GND Ground

22 CH1[3]- First pixel Negative LVDS differential data input. Pair 3

23 CH1[3]+ First pixel Positive LVDS differential data input. Pair 3

24 N.C. No Connection

25 N.C. No Connection

26 2D/3D Input signal for 2D/3D Mode Selection (3)(6)

27 L/R Input signal for Left Right eye frame synchronous (4)(6)

28 CH2[0]- Second pixel Negative LVDS differential data input. Pair 0

Version 1.3 16 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

(1)

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

29 CH2[0]+ Second pixel Positive LVDS differential data input. Pair 0

30 CH2[1]- Second pixel Negative LVDS differential data input. Pair 1

31 CH2[1]+ Second pixel Positive LVDS differential data input. Pair 1

32 CH2[2]- Second pixel Negative LVDS differential data input. Pair 2

33 CH2[2]+ Second pixel Positive LVDS differential data input. Pair 2

34 GND Ground

35 CH2CLK- Second pixel Negative LVDS differential clock input.

36 CH2CLK+ Second pixel Positive LVDS differential clock input.

37 GND Ground

38 CH2[3]- Second pixel Negative LVDS differential data input. Pair 3

www.panelook.com

PRODUCT SPECIFICATION

39 CH2[3]+ Second pixel Positive LVDS differential data input. Pair 3

40 N.C. No Connection

(1)

41 N.C. No Connection

42 LD_EN Local Dimming Enable (5)(6)

43 N.C. No Connection (1)

44 GND Ground

45 GND Ground

46 GND Ground

47 N.C. No Connection (1)

48 VCC +12V power supply

49 VCC +12V power supply

50 VCC +12V power supply

51 VCC +12V power supply

Version 1.3 17 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

CNF2 Connector Pin Assignment (187060-41221 (P-Two) or equivalent)

Pin Name Description

1 N.C. No Connection

2 N.C. No Connection

3 N.C. No Connection

4 N.C. No Connection

5 N.C. No Connection

6 N.C. No Connection

7 N.C. No Connection

8 N.C. No Connection

9 GND Ground

10 CH3[0]- Third pixel Negative LVDS differential data input. Pair 0

11 CH3[0]+ Third pixel Positive LVDS differential data input. Pair 0

12 CH3[1]- Third pixel Negative LVDS differential data input. Pair 1

13 CH3[1]+ Third pixel Positive LVDS differential data input. Pair 1

ˡ˸ʳ

ʻ˄ʼʳ

ʳ

ʳ

ʳ

ʳ

ʳ

14 CH3[2]- Third pixel Negative LVDS differential data input. Pair 2

15 CH3[2]+ Third pixel Positive LVDS differential data input. Pair 2

16 GND Ground

17 CH3CLK- Third pixel Negative LVDS differential clock input.

18 CH3CLK+ Third pixel Positive LVDS differential clock input.

19 GND Ground

20 CH3[3]- Third pixel Negative LVDS differential data input. Pair 3

21 CH3[3]+ Third pixel Positive LVDS differential data input. Pair 3

22 N.C. No Connection

23 N.C. No Connection

24 GND Ground

25 GND Ground

26 CH4[0]- Fourth pixel Negative LVDS differential data input. Pair 0

27 CH4[0]+ Fourth pixel Positive LVDS differential data input. Pair 0

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

28 CH4[1]- Fourth pixel Negative LVDS differential data input. Pair 1

29 CH4[1]+ Fourth pixel Positive LVDS differential data input. Pair 1

Version 1.3 18 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ʳ

ʳ

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

30 CH4[2]- Fourth pixel Negative LVDS differential data input. Pair 2

31 CH4[2]+ Fourth pixel Positive LVDS differential data input. Pair 2

32 GND Ground

33 CH4CLK- Fourth pixel Negative LVDS differential clock input.

34 CH4CLK+ Fourth pixel Positive LVDS differential clock input.

35 GND Ground

36 CH4[3]- Fourth pixel Negative LVDS differential data input. Pair 3

37 CH4[3]+ Fourth pixel Positive LVDS differential data input. Pair 3

38 N.C. No Connection

39 N.C. No Connection

40 GND Ground

41 GND Ground

CN6 Connector Pin Assignment (LM123S010HTF13Y (UNE) or equivalent)

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

ʳ

1 N.C. No Connection

2 N.C. No Connection

3 N.C. No Connection

4 GND Ground

5 N.C. No Connection

6 L/R_O Output signal for Left Right Glasses control

7 N.C. No Connection

8 N.C. No Connection

9 N.C. No Connection

10 N.C. No Connection

Note (1) Reserved for internal use. Please leave it open.

Note (2) LVDS format selection.

L= Connect to GND

SELLVDS Note

L JEDIA Format

H or Open VESA Format

ʿʳH=Connect to +3.3˩

ʻ˄ʼ

ʻ˄ʼ

ʻˋʼ

ʻ˄ʼ

Note (3) 2D/3D mode selection.

L= Connect to GN

2D/3D Note

˗ʳʳˢ˸ʿʳH=Connect to +3.3˩

Version 1.3 19 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

L or Open 2D Mode

H 3D Mode

Note (4) Left Right synchronous signal for glasses.

www.panelook.com

PRODUCT SPECIFICATION

V

Note (5) Local dimming enable selection.

Note (6) SELLVDS, 2D/3D, LR and LD_EN signal pin connected to the LCM side has the following diagram.

=0~0.8, VIH=2.0~3.3

IL

LR Note

L Right synchronous signal
H Left synchronous signal

L= Connect to GN

LD_EN Note

L or Open Local Dimming Disable

H Local Dimming Enable

R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)

˗ʳʳˢ˸ʿʳH=Connect to +3.3˩

Note (7) LVDS 4-port Data Mapping

Port Channel of LVDS Data Stream

1st Port First Pixel 1, 5, 9, ……1913, 1917

2nd Port Second Pixel 2, 6, 10, ….1914, 1918

3rd Port Third Pixel 3, 7, 11, ….1915, 1919

4th Port Fourth Pixel 4, 8, 12, ….1916, 1920

Note (8) The definition of L/R_O signal as follows

ʳʿʳH= +3.3˩ʳ

L= 0V

L/R_O Note

L Right glass turn on
H Left glass turn on

Version 1.3 20 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

N2-CN3 (Housing): 51281-1094 (Molex) or equivalent

Pin № Symbol Feature

www.panelook.com

PRODUCT SPECIFICATION

1 VLED+

2 VLED+

3 NC

4 NC

5 NC

6 NC

7 VLED-

8 VLED-

9 VLED-

10 VLED-

5.3 CONVERTER UNIT

CN1(Header): CI0114M1HR0-LA (CVILUX) or equivalent

Pin № Symbol Feature

1

2

Positive of LED String

NC

Negative of LED String

3

4

5

6

7

8

9

10

11 ERR

12 BLON BL ON/OFF

13 NC NC

14 E_PWM

VBL +24V

GND GND

Normal (GND)

Abnormal(Open

collector)

External PWM

Control

Version 1.3 21 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

Notice

1. If Pin14 is open, E_PWM is 100% duty.

CN2 ~ CN3 : 51281-1094 (Molex) or equivalent

Pin № Symbol Feature

www.panelook.com

PRODUCT SPECIFICATION

1 VLED+

2 VLED+

3 NC

4 NC

5 NC

6 NC

7 VLED-

8 VLED-

9 VLED-

10 VLED-

Positive of LED String

NC

Negative of LED String

Version 1.3 22 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

5.4 BLOCK DIAGRAM OF INTERFACE

ARx0-

ARx0+

ARx1-

ARx1+

www.panelook.com

PRODUCT SPECIFICATION

100Ө

100

Ө

AR0-AR7

-

ARx2-

ARx2+

ARx3-

ARx3+

ACLK-

ACLK+

BRx0-

BRx0+

BRx1-

BRx1+

BRx2-

BRx3-

BRx3+

AB0-AB7

Ө

100

100

Ө

DE

BR0-BR7

BG0-BG7

100

Ө

100Ө

BB0-BB7

DCLK

100

Ө

100

Ө

100

Ө

BCLK-

BCLK+

100

Ө

PLL

Timing

Controller

Version 1.3 23 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

AR0~AR7 First pixel R data BR0~BR7 Second pixel R data
AG0~AG7 First pixel G data BG0~BG7 Second pixel G data
AB0~AB7 First pixel B data BB0~BB7 Second pixel B data

DE Data enable signal
DCLK Data clock signal

The third and fourth pixel are followed the same rules.
CR0~CR7 Third pixel R data DR0~DR7 Fourth pixel R data
CG0~CG7 Third pixel G data DG0~DG7 Fourth pixel G data

CB0~CB7 Third pixel B data DB0~DB7 Fourth pixel B data

DE Data enable signal
DCLK Data clock signal

www.panelook.com

PRODUCT SPECIFICATION

Note (1) A ~ D channel are first, second, third and fourth pixel respectively.

Note (2) The system must have the transmitter to drive the module.

Note (3) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is

used differentially.

Version 1.3 24 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

5.5 LVDS INTERFACE

JEIDA Format : SELLVDS = L

VESA Format : SELLVDS = H or Open

JEDIA Format



RXCLK

RXCLK



www.panelook.com

PRODUCT SPECIFICATION

ORX0



ORX0



ORX1



ORX1



ORX2



ORX2



ORX3



ORX3



ERX0

ERX0





ERX1



ERX1



ERX2



ERX2



ERX3



ERX3



VESA Format

R7G2 R6 R5 R4 R3

R7G2 R6 R5 R4 R3

B2 G7B3

B2 G7B3

R7G2 R6 R5 R4 R3

R7G2 R6 R5 R4 R3

B2 G7B3

B2 G7B3

Current F\FOH

Current F\FOH

G5 G4G6

G5 G4G6

G5 G4G6

G5 G4G6

R2

R2

G3

G3

B4B6 B5B7VS HSDE

B4B6 B5B7VS HSDE

R0G0 R1G1B1 B0RSVD

R0G0 R1G1B1 B0RSVD

R2

R2

G3

G3

B4B6 B5B7VS HSDE

B4B6 B5B7VS HSDE

R0G0 R1G1B1 B0RSVD

R0G0 R1G1B1 B0RSVD



RXCLK

RXCLK

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)



ORX0

ORX0

ORX1

ORX1

ORX2

ORX2

ORX3

ORX3

ERX0

ERX0

ERX1

ERX1

ERX2

ERX2

ERX3

ERX3

R5G0 R4 R3 R2 R1

R5G0 R4 R3 R2 R1

B0 G5B1

B0 G5B1

R5G0 R4 R3 R2 R1





R5G0 R4 R3 R2 R1

B0 G5B1

B0 G5B1

G3 G2G4

G3 G2G4

G3 G2G4

G3 G2G4

R0

R0

G1

G1

B2B4 B3B5VS HSDE

B2B4 B3B5VS HSDE

R6G6 R7G7B7 B6RSVD

R6G6 R7G7B7 B6RSVD

R0

R0

G1

G1

B2B4 B3B5VS HSDE

B2B4 B3B5VS HSDE

R6G6 R7G7B7 B6RSVD

R6G6 R7G7B7 B6RSVD

Version 1.3 25 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

Notes (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.

The higher the binary input, the brighter the color. The table below provides the assignment of the color versus

data input.

www.panelook.com

PRODUCT SPECIFICATION

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black
Red

Green
Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue

Cyan

Magenta

Yellow

White

Red (0) / Dark

Red (1)

Red (2)

:

:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)

:

:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)

:

:
Blue (253)
Blue (254)
Blue (255)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Red Green Blue

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Data Signal

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

1

0

1

0

0

0

0

0

0

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

1

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

1

1

1

1

1

1

0

1

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0
0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0
0

0
0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

:

:

:

:

:

:

1

0

1
0

1

1

1

1

1

Version 1.3 26 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

Frequency

Input cycle to

LVDS

Receiver

Clock

cycle jitter
Spread spectrum

modulation range

Spread spectrum
modulation frequency

www.panelook.com

PRODUCT SPECIFICATION

F

clkin

(=1/TC)

T

- - 200 ps (3)

rcl

clkin_mo

F

d

- - 200 KHz

F

SSM

60 74.25 96.012 MHz

F

-2% - F

clkin

+2% MHz

clkin

(4)

LVDS

Setup Time Tlvsu 600 - - ps

Receiver

Data

Hold Time Tlvhd 600 - - ps

6.1.1 Timing spec for Frame Rate (Fr5 = 100Hz)

Signal Item Symbol Min. Typ. Max. Unit Note

2D mode Fr5 94 100 106 Hz

Frame rate

3D mode F

Total Tv 1090 1125 1480 Th

2D Mode

Vertical

Active

Display

Ter m

3D Mode

Display Tvd 1080 1080 1080 Th

Blank Tvb 10 45 400 Th

Total Tv 1400 Th

Display Tvd 1080 Th

Blank Tvb 444 Th

(5)

100 100 100 Hz

r5

Tv=Tvd+Tv

b

Ё

Ё

(6)

Total Th 520 550 670 Tc

2D Mode

Horizontal

Active

Display

Ter m

3D Mode

Display Thd 480 480 480 Tc

Blank Thb 40 70 190 Tc

Total Th 525 Tc

Display Thd 480 Tc

Blank Thb 45 Tc

Version 1.3 27 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Th=Thd+T

hb

Ё

Ё

(6)

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

6.1.2 Timing spec for Frame Rate (Fr6 = 120Hz)

Signal Item Symbol Min. Typ. Max. Unit Note

2D mode Fr6 114 120 126 Hz

Frame rate

3D mode F

Total Tv 1090 1125 1480 Th

www.panelook.com

PRODUCT SPECIFICATION

120 120 120 Hz

r6

Tv=Tvd+Tv

b

2D Mode

Vertical

Active

Display

Ter m

3D Mode

2D Mode

Horizontal

Active

Display

Ter m

3D Mode

Display Tvd 1080 1080 1080 Th

Blank Tvb 10 45 400 Th

Total Tv 1400

Display Tvd 1080

Blank Tvb 444

Total Th 520 550 670 Tc

Display Thd 480 480 480 Tc

Blank Thb 40 70 190 Tc

Total Th 525

Display Thd 480

Blank Thb 45

Ё

Ё

(6)

Th=Thd+T

hb

Ё

Ё

(6)

Note (1) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low

logic level. Otherwise, this module would operate abnormally.

Version 1.3 28 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

Note (2) Please make sure the range of pixel clock has follow the below equation:

F

clkin(max)

F

r

5

Ѽ Tv Ѽ Th Њ F

ʳ

Њ F

r

6

Ѽ Tv Ѽ Th

clkin(min)

www.panelook.com

PRODUCT SPECIFICATION

INPUT SIGNAL TIMING DIAGRAM

DE

Th

DCLK

DE

DATA

Tvd

Tv

Tvb

Thd

Valid display data ( 480 clocks)

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T

– TI

1

Version 1.3 29 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

1T

14

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

3T

14

5T

14

7T

14

9T

14

11T

14

13T

14

Note (6) Please fix the Vertical timing (Vertical Total =1524 / Display =1080 / Blank = 444) in 3D mode.

Please fix the Horizontal timing (Horizontal Total =525 / Display =480 / Blank = 45) in 3D mode.

Version 1.3 30 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

P

6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

6.2.1 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram

below.

www.panelook.com

PRODUCT SPECIFICATION

10ms

50ms

50ms

ЉЉЉЉ

T4

0V

0.5

ЉЉЉЉ

T

1

ЉЉЉЉ

ЉЉЉЉ

T

2

0

ЉЉЉЉ

ЉЉЉЉ

T

3

ЉЉЉЉ

0

500ms

0.1V

CC

3

T1

T

T

2

0.1V

T4

cc

LVDS Signals

0V

Power On

0

ЉЉЉЉ

T

7

ЉЉЉЉ

ЉЉЉЉ

T2

T

8

ЉЉЉЉ

T3

T7

8

T

0

Option Signals

(SELLVDS,2D/3D

LR, ,LD_EN)

Backlight (Recommended)

ЉЉЉЉ

ЉЉЉЉ

T5

T

6

500ms

100ms

50%

5

T

50%

T

6

Power ON/OFF Sequence

Version 1.3 31 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

6.2.2 2D to 3D SIGNAL SEQUENCE WITHOUT VCC TURN OFF AND TURN ON

LVDS Signals

VCC

0.5

ЉЉЉЉ

T

1

0

ЉЉЉЉ

T

2

0

ЉЉЉЉ

10 ms

2D/3D

ЉЉЉЉ

ЉЉЉЉ

T

10ms

50ms

7

ЉЉЉЉ

ЉЉЉЉ

T2

T

0V

0V

10

www.panelook.com

CC

0.9V

CC

0.1V

Power On

T7

PRODUCT SPECIFICATION

1

T

T2

Scalar send
Black Pattern

T10

0

10

ЉЉЉЉ

ЉЉЉЉ

T

9

ЉЉЉЉ

T

10 ms

12

ЉЉЉЉ

20 ms

9

T

T12

Scalar Black Pattern
Insertion

Backlight ON/OFF

500ms

500ms

ЉЉЉЉ
ЉЉЉЉ

T

5

T11

T

5

T11

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.

Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become

abnormal screen.

Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If

T2<0,that maybe cause electrical overstress failure.

Note (4) T4 should be measured after the module has been fully discharged between power off and on period.

Note (5) Interface signal shall not be kept at high impedance when the power is on.

Version 1.3 32 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

www.panelook.com

PRODUCT SPECIFICATION

Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

LED Current IL

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring in a windless room.

25

50

130

±

±

±

10

7.8

2

oC

%RH

mA

Version 1.3 33 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR (1000) - - (2)

www.panelook.com

PRODUCT SPECIFICATION

Response Time (TN)

Center Luminance of White

White Variation

Cross Talk

Red

Green

Color
Chromaticity

Blue

TR -

- (3.2)

T

F

2D LC (350) (400) -

- (45) -

3D L

C

δ

W

2D - - 4 (5)

3D_W (4) (8)

θ

x=0°, θy =0°

3D_D (11)

Rx (0.647) -

Ry (0.328) -

Gx (0.279) -

Gy (0.633) -

Bx (0.154) -

By (0.058) -

Viewing angle

at normal direction

- - 1.3 - (6)

Typ.

-0.03

(1.1) -

-

Typ.

+0.03

ms

ms

cd/m

2

%

(3)

(4)

(8)

-

Wx (0.280) -

White

Color Gamut C.G

Horizontal

Viewing
Angle

Vertical

Transmission direction of
up polarizer

Wy

θ

x+

θ

x-

θ

Y+

θ

Y-

ӿ

≥

10 (TN)

CR

up

90 Deg (7)

(0.290)

- (72) - % NTSC

(80) -

(80) -

(80) -

(70) -

Version 1.3 34 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

-

Deg. (1)

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

T

Note (1) Definition of Viewing Angle (θx, θy) :

Viewing angles are measured by Conoscope Cono-80 ( or Eldim EZ-Contrast 160R )

www.panelook.com

PRODUCT SPECIFICATION

Normal

θ

x =θy = 0º

θ

x- = 90º

x-

6 o’clock

θ

y- = 90º

y-

Note (2) Definition of Contrast Ratio (CR) :

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

L255: Luminance of gray level 255

L 0: Luminance of gray level 0

θy-

θx−

θ

y

θx+

+

12 o’clock direction

θ

y + = 90º

x

+

θ

x+ = 90º

L255 of Luminance Surface

L0 of Luminance Surface

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note

(6).

Note (3) Definition of Response Time (T

, TF):

R

Gray Level 255

Gray Level 255

100%

90%

Optical

Response

10%

0%

Gray Level 0

T

R

T

F

Version 1.3 35 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

ime

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

(

)

www.panelook.com

PRODUCT SPECIFICATION

Note (4) Definition of Luminance of White (L

Measure the luminance of gray level 255 at center point and 5 points

= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

L

C

Note (5) Definition of Cross Talk (CT):

CT = | Y

– YA | / YA × 100 (%)

B

Where:

= Luminance of measured location without gray level 0 pattern (cd/m2)

Y

A

= Luminance of measured location with gray level 0 pattern (cd/m2)

Y

B

(0, 0)

Active Area

Y

(D/2,W/8)

A, U

Y

(D/8,W/2)

A, L

Gray 128

Y

Y

(D/2,7W/8)

A, D

):

C

(7D/8,W/2)

A, R

(D, W)

(0, 0)

(D/8,W/2)

Y

B, L

(D/4,W/4)

Active Area

Y

Gray 0

Y

(D/2,W/8)

B, U

Y

(3D/4,3W/4)

(D/2,7W/8)

B, D

(7D/8,W/2)

B, R

D, W

Note (6) Definition of White Variation (

Measure the luminance of gray level 255 at 5 points

δ

W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

W

W/4

W/2

Vertical Line

δ

W):

Horizontal Line

D

D/4 D/2 3D/4

1 2

5

3 4

Active Area

: Test Point

X=1 to 5

Version 1.3 36 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

Note (7) This is a reference for designing the shutter glasses of 3D application(TN case).

Definition of the transmission direction of the up polarizer:

6 o’clock

y-

x-

www.panelook.com

PRODUCT SPECIFICATION

12 o’clock direction

y+

ӥ

up

ӥ

=0o, x+

The absorption axis of the front polarizer of the shutter glasses should be parallel to this panel absorption

direction to get a maximum 3D mode luminance.

Note (8) Definition of the 3D mode performance(measured under 3D mode, using CMI’s shutter glass):

a. Test pattern

Left eye image and right eye image are displayed alternated

Version 1.3 37 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

J

J

www.panelook.com

PRODUCT SPECIFICATION

WW

Left eye image: W255; Right eye image: W255

WB

Left eye image: W255; Right eye image: W0

BW

Left eye image: W0; Right eye image: W255

BB

Left eye image: W0; Right eye image: W0

b. Measurement Setup

5LJKWH\H

5LJKWH\H

5LJKWH\H5LJKWH\H

ODVV

VKXWWHU

VKXWWHU

VKXWWHU

Shutter glasses are well controlled under suitable timing, and measure the luminance of the center

point of the panel through the right eye glass. "The transmittance of the glass should be larger than 40.0%

under 3D mode operation."

The luminance of the test pattern “WW”, denoted L(WW); the luminance of the test pattern ”WB”,

ODVV

ODVVVKXWWHU

ODVV

denoted L(WB); the luminance of the test pattern “BW”, denoted L(BW); the luminance of the test pattern “BB”,

denoted “L(BB)

c. Definition of the Center Luminance of White, Lc (3D) : L(WW)

d. Definition of the 3D mode white crosstalk, CT (3D-W)

e. Definition of the 3D mode dark crosstalk, CT (3D-D)

Version 1.3 38 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMIS LSI chips.

[ 5 ] Bezel of Set can not press or touch the panel surface. It will make light leakage or scrape.

[ 6 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 7 ] Do not disassemble the module.

[ 8 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 9 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 10 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 10.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

к

recommended to store the module with temperature from 0 to 35

condensation.

[ 10.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 11 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

at normal humidity without

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

Version 1.3 39 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

9. DEFINITION OF LABELS

9.1 CMI MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

www.panelook.com

PRODUCT SPECIFICATION

Model Name: V315HH6-LS1

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

CHI MEI

OPTOELECTRONICS

CHI MEI

OPTOELECTRONICS

V315HH6 –LS1 Rev. XX

X X X X X X X Y M D L N N N N

V315HH6 –LS1 Rev. XX

X X X X X X X Y M D L N N N N

Serial No.

Product Line

E207943

MADE IN TAIWAN

GEMN

RoHS

MADE IN CHINA

LEOO(or CAPG or CANO)

RoHS

Serial ID includes the information as below:

Manufactured Date:

Year : 2001=1, 2002=2, 2003=3, 2004=4…2010=0, 2011=1, 2012=2…

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Revision Code : Cover all the change

Serial No. : Manufacturing sequence of product

→

Product Line : 1

Line1, 2 → Line 2, …etc.

Year, Month, Date

CMI Internal Use

CMI Internal Use

Revision

CMI Internal Use

Version 1.3 40 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

10. PACKAGING

10.1 PACKAGING SPECIFICATIONS

(1) 7 LCD TV modules / 1 Box

(2) Box dimensions : 826(L)x376(W)x540(H)mm

(3) Weight : Approx. 34Kg (7 modules per carton)

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method

www.panelook.com

PRODUCT SPECIFICATION

Figure 10-1 packing method

Version 1.3 41 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

ΚΚΚΚ

11 Feb., 2011

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

Figure 10-2 packing method

Version 1.3 42 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

11. MECHANICAL CHARACTERISTIC

www.panelook.com

PRODUCT SPECIFICATION

Version 1.3 43 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

Version 1.3 44 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

PRODUCT SPECIFICATION

Version 1.3 45 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

ΚΚΚΚ

11 Feb., 2011

www.panelook.com