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MODEL NO.: V315H3
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PRODUCT SPECIFICATION
ϭʳ Tentative Specification
Ϯʳ Preliminary Specification
ϭʳ Approval Specification
SUFFIX: PE2
Customer:
APPROVED BY SIGNATURE
Name / Title
Note
Please return 1 copy for your confirmation with your
signature and comments.
Approved By Checked By Prepared By
Chao-Chun Chung Vincent Chou Samuel Huang
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PRODUCT SPECIFICATION
CONTENTS -
1. GENERAL DESCRIPTION...................................................................................................................................................4
1.1 OVERVIEW................................................................................................................................................... 4
1.2 CHARACTERISTICS..................................................................................................................................... 4
1.3 MECHANICAL SPECIFICATIONS................................................................................................................4
2. ABSOLUTE MAXIMUM RATINGS....................................................................................................................................5
2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMI MODULE V315H3-LE2)......................... 5
2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL).................................................................... 6
2.3 ELECTRICAL ABSOLUTE RATINGS (OPEN CELL)................................................................................ 6
3. ELECTRICAL CHARACTERISTICS ................................................................................................................................... 7
3.1 TFT LCD MODULE...................................................................................................................................... 7
4. BLOCK DIAGRAM............................................................................................................................................................. 10
4.1 TFT LCD OPEN CELL................................................................................................................................10
5. INTERFACE PIN CONNECTION..................................................................................................................................... 11
5.1 TFT LCD OPEN CELL................................................................................................................................11
5.2 BLOCK DIAGRAM OF INTERFACE........................................................................................................ 13
5.3 LVDS INTERFACE..................................................................................................................................... 15
6. INTERFACE TIMING......................................................................................................................................................... 17
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)................................................................ 17
6.2 POWER ON/OFF SEQUENCE ................................................................................................................. 20
7. OPTICAL CHARACTERISTICS ........................................................................................................................................ 21
7.1 TEST CONDITIONS (Based on CMI module V315H3-LE2).................................................................... 21
7.2 OPTICAL SPECIFICATIONS .................................................................................................................... 21
8. PRECAUTIONS ..................................................................................................................................................................25
8.1 ASSEMBLY AND HANDLING PRECAUTIONS ....................................................................................25
9. MECHANICAL CHARACTERISTIC ................................................................................................................................26
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Version Date Page(New) Section Description
Ver. 1.0
Ver. 1.1
Apr. 21, 2010
Aug. 13, 2010
All
4
11
19
20
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PRODUCT SPECIFICATION
REVISION HISTORY
All
1.2/1.3
5.1
5.1
6.1
6.2
Preliminary specification was first issued.
Weight 1180 g
Modify color chromaticity R:(0.639, 0.327) (0.654,0.324)
G:(0.288, 0.603) (0.293,0.599); B:(0.148, 0.048) (0.312,
0.364); W: (0.280, 0.290) (0.312, 0.364)
Update pin 9 definition
Remove notes for ODSEL pin
Remove note6 for ODSEL pin
Remove ODSEL from optional signal in power on/off
diagram
!
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V315H3- PE3 is a 31.5” TFT Liquid Crystal Display module with 2ch-LVDS interface. This module supports
1920 x 1080 Full HDTV format and can display true 16.7M colors (8-bit/color).
1.2 CHARACTERISTICS
CHARACTERISTICS ITEMS SPECIFICATIONS
Screen Diagonal [in] 31.51
Pixels [lines] 1920*1080
Active Area [mm] 698.4 (H) x 392.85 (V) (31.51” diagonal)
Sub -Pixel Pitch [mm] 0.12125 (H) x 0.36375 (V)
Pixel Arrangement RGB vertical stripe
Weight [g] (1180)
Physical Size [mm] 716.1(W) x 410(H) x 1.79(D) Typ.
Display Mode Transmissive mode / Normally Black
Contrast Ratio 6000:1 Typ.
Glass thickness (Array/CF) [mm] 0.7 / 0.7
Viewing Angle (CR>20) +88/-88(H),+88/-88(V) Typ.
Color Chromaticity R=(0.654, 0.324)
Cell Transparency [
Polarizer (CF side) Glare coating, Hard coating (3H) 709.7(H) x 405(W)..
и] 4.6%Typ.
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PRODUCT SPECIFICATION
(Typical value measured at CMI’s module)
(Typical value measured at CMI’s module)
G=(0.293, 0.599)
B=(0.130, 0.115)
W=(0.312, 0.364)
(Typical value measured with C source)
(Typical value measured at CMI’s module)
Polarizer (TFT side) Super Wide View, 709.7(H) x 405(W)..
1.3 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Weight - (1180) - g I/F connector mounting
position
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
(2) Connector mounting position
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The mounting inclination of the connector makes
the screen center within ±0.5mm as the horizontal.
+/- 0.5mm
(2)
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2. ABSOLUTE MAXIMUM RATINGS
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PRODUCT SPECIFICATION
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1), (3)
Operating Ambient Temperature TOP 0 50 ºC (1), (2), (3)
Altitude Operating A OP 0 5000 M (3)
Altitude Storage A ST 0 12000 M (3)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Relative Humidity (%RH)
Љ 40 ºC).
100
90
80
60
Operating Range
(BASED ON CMI MODULE V315H3-LE2)
Value
Min. Max.
Unit Note
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in your product design to prevent the
surface temperature of display area from being over 65 ºC. The range of operating temperature
may degrade in case of improper thermal management in your product design.
Note (3) The rating of environment is base on LCD module. Leave LCD cell alone, this environment condition
can’t be guaranteed. Except LCD cell, the customer has to consider the ability of other parts of LCD
module and LCD module process.
40
20
10
Storage Range
80 60 -20 40 0 20 -40
Temperature (ºC)
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PRODUCT SPECIFICATION
2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)
Storage Condition : With shipping package.
Storage temperature range : 25±5
Storage humidity range : 50±10%RH
Shelf life : a month
к
2.3 ELECTRICAL ABSOLUTE RATINGS (OPEN CELL)
2.3.1 TFT LCD OPEN CELL
Item Symbol
Power Supply Voltage Vcc -0.3 13.5 V
Input Signal Voltage VIN -0.3 3.6 V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Min. Max.
Value
Unit Note
(1)
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
(Ta = 25 ± 2 ºC)
Parameter Symbol
Power Supply Voltage VCC 10.8 12 13.2 V (1)
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PRODUCT SPECIFICATION
Value
Unit Note
Min. Typ. Max.
Rush Current I
White Pattern
Power Supply Current
Black Pattern
Horizontal Stripe
Differential Input High
Threshold Voltage
Differential Input Low
Threshold Voltage
LVDS
interface
Common Input Voltage VCM 1.0 1.2 1.4 V
Differential input voltage
( single-end )
Terminating Resistor R
CMOS
interface
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
RUSH
Ё Ё
Ё Ё
Ё Ё
V
LVTH
V
LVTL
| 200
|V
ID
T
0
IL
+100
Ё Ё
0.58
0.44
0.58 0.62 A
Ё Ё
Ё Ё
Ё
Ё
100
Ё
Ё
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:
2.7 A (2)
Ё
Ё
A
A
(3)
mV
-100 mV
(4)
600 mV
Ё
ohm
3.3 V
0.7 V
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PRODUCT SPECIFICATION
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f
whereas a power dissipation check pattern below is displayed.
a. White Pattern
GND
Vcc rising time is 470us
0.9Vcc
0.1Vcc
470us
b. Black Pattern
Vcc
= 60 Hz,
v
c. Horizontal Pattern
Active Area
Active Area
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PRODUCT SPECIFICATION
Note (4) The LVDS input characteristics are as follows:
/9'6
_9,'_
/9'6
9&0
*1'
_9,'_
9
/9'6
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4. BLOCK DIAGRAM
4.1 TFT LCD OPEN CELL
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PRODUCT SPECIFICATION
(Starconn,107C51-0000RA-G4 or Equivalent)
TFT LCD PANEL
(1920x3x1080)
X(L) BoardX(R) Board
INPUT CONNECTOR
ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ECLK(+/-)
ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
OCLK(+/-)
SELLVDS
VCC
GND
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5. INTERFACE PIN CONNECTION
5.1 TFT LCD OPEN CELL
CNF1 Connector Pin Assignment
Pin Name Description Note
GND Ground
1
N.C.
2
N.C.
3
N.C. No Connection
4
N.C. No Connection
5
N.C. No Connection
6
SELLVDS LVDS data format Selection
7
N.C. No Connection
8
N.C. No Connection
9
N.C. No Connection (2)
10
GND Ground
11
ERX0- Even pixel Negative LVDS differential data input. Channel 0
12
ERX0+ Even pixel Positive LVDS differential data input. Channel 0
13
ERX1- Even pixel Negative LVDS differential data input. Channel 1
14
ERX1+ Even pixel Positive LVDS differential data input. Channel 1
15
ERX2- Even pixel Negative LVDS differential data input. Channel 2
16
ERX2+ Even pixel Positive LVDS differential data input. Channel 2
17
GND Ground
18
ECLK- Even pixel Negative LVDS differential clock input.
19
ECLK+ Even pixel Positive LVDS differential clock input.
20
GND Ground
21
ERX3- Even pixel Negative LVDS differential data input. Channel 3
22
ERX3+ Even pixel Positive LVDS differential data input. Channel 3
23
N.C. No Connection
24
N.C. No Connection
25
GND Ground
26
GND Ground
27
ORX0- Odd pixel Negative LVDS differential data input. Channel 0
28
ORX0+ Odd pixel Positive LVDS differential data input. Channel 0
29
ORX1- Odd pixel Negative LVDS differential data input. Channel 1
30
ORX1+ Odd pixel Positive LVDS differential data input. Channel 1
31
ORX2- Odd pixel Negative LVDS differential data input. Channel 2
32
ORX2+ Odd pixel Positive LVDS differential data input. Channel 2
33
GND Ground
34
OCLK- Odd pixel Negative LVDS differential clock input
35
OCLK+ Odd pixel Positive LVDS differential clock input
36
GND Ground
37
ORX3- Odd pixel Negative LVDS differential data input. Channel 3
38
ORX3+ Odd pixel Positive LVDS differential data input. Channel 3
39
N.C.
40
N.C. No Connection
41
GND Ground
42
GND Ground
43
GND Ground
44
GND Ground
45
GND Ground
46
N.C. No Connection
47
VCC Power input (+12V)
48
VCC Power input (+12V)
49
VCC Power input (+12V)
50
VCC Power input (+12V)
51
No Connection
No Connection
No Connection
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PRODUCT SPECIFICATION
(2)
(3)(4)
(2)
(5)
(5)
(5)
(2)
(5)
(5)
(5)
(2)
(2)
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Note (1) LVDS connector pin order defined as follows
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PRODUCT SPECIFICATION
Note (2) Reserved for internal use. Please leave it open.
Note (3) Low = Open or connect to GND: VESA Format, High = Connect to +3.3V: JEIDA Format.
Note (4) LVDS signal pin connected to the LCM side has the following diagram. R1 in the system side should
be less than 1K Ohm. (R1 < 1K Ohm)
TCON
TCON
R2
R2
R3
R3
Setting
Setting
Selector (pin7)
R1
R1
System side
Note (5) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and
the second pixel is even pixel
LCM side
LCM sideSystem side
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p
OR0
5.2 BLOCK DIAGRAM OF INTERFACE
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PRODUCT SPECIFICATION
CNF1
TxIN
ER0-ER7
EG0-EG7
-
OR0-OR7
-
-
Host
Graphics
Controller
ERx0+
ERx0-
ERx1+
ERx1-
ERx2+
-
ERx3+
ERx3-
ECLK+
-
ORx0+
ORx0-
ORx1+
ORx1-
ORx2+
-
ORx3+
ORx3-
100
Ө
100pF
100
Ө
100Ө
100
100
Ө
100
Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
100Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
RxOUT
ER0-ER7
F
EG0-EG7
-
DE
-OR7
-
-
Timing
Controller
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
OCLK+
OCLK-
100
Ө
100pF
100
Ө
LVDS Re ceiver
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PRODUCT SPECIFICATION
ER0~ER7: Even pixel R data
EG0~EG7: Even pixel G data
EB0~EB7: Even pixel B data
OR0~OR7: Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7: Odd pixel B data
DE: Data enable signal
DCLK: Data clock signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the
second pixel is even pixel.
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5.3 LVDS INTERFACE
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PRODUCT SPECIFICATION
VESA LVDS formatΚ(SELLVDS pin=L or open)
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
JEDIA LVDS format
Κ(SELLVDS pin=H)
Current F\FOH
Current F\FOH
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
G3 G2G4
G3 G2G4
G3 G2G4
G3 G2G4
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
Current F\FOH
Current F\FOH
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
G5 G4G6
G5 G4G6
G5 G4G6
G5 G4G6
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
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PRODUCT SPECIFICATION
5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.
The higher the binary input, the brighter the color. The table below provides the assignment of the color versus
data input.
Data Signal
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Blue
Cyan
Magenta
Yellow
White
Red(0) / Dark
Red(1)
Red(2)
:
:
Red(253)
Red(254)
Red(255)
Green(0) / Dark
Green(1)
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
Note (1) 0: Low Level Voltage, 1: High Level Voltage
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
1
0
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
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:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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:
:
:
:
1
1
1
1
1
1
0
0
0
0
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:
:
:
:
0
0
0
0
0
0
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:
:
:
:
0
1
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1
1
0
0
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:
:
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:
0
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0
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0
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0
1
0
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1
1
1
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1
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1
0
0
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:
:
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:
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:
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:
:
:
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1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
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0
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1
0
0
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:
:
:
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:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
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0
0
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
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0
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:
:
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:
1
1
1
1
1
1
0
0
0
0
0
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1
1
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1
1
1
1
1
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PRODUCT SPECIFICATION
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
F
clkin
(=1/TC)
T
rcl
clkin_mod
F
F
SSM
60 74.25 80 MHz
Ё Ё
F
-2%
clkin
Ё Ё
LVDS
Receiver
Clock
Frequency
Input cycle to
cycle jitter
Spread spectrum
modulation range
Spread spectrum
modulation frequency
Ё
200 ps (3)
F
+2% MHz
clkin
(4)
200 KHz
LVDS
Setup Time Tlvsu 600
Ё Ё
Receiver
Data
Hold Time Tlvhd 600
Ё Ё
Fr5 47 50 53 Hz
Frame Rate
57 60 63 Hz
F
Vertical
Active
Display
Term
Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th
r6
Blank Tvb 35 45 55 Th
Horizontal
Active
Display
Term
Total Th 1050 1100 1150 Tc Th=Thd+Thb
Display Thd 960 960 960 Tc
Blank Thb 90 140 190 Tc
Note (1) Please make sure the range of pixel clock has follow the below equationΚ
Fclkin(max)
Fr5
Ѽ Tv Ѽ Th Њ Fclkin(min)
Њ Fr6 Ѽ Tv Ѽ Th
ps
(5)
ps
(6)
Ё
Ё
Ё
Ё
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PRODUCT SPECIFICATION
Note (2) This module is operated in DE only mode and please follow the input signal timing diagram
below
Κ
INPUT SIGNAL TIMING DIAGRAM
DE
Th
DCLK
DE
DATA
Tvd
Tv
Tvb
Thd
Valid Display Data (960 clocks)
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
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PRODUCT SPECIFICATION
Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
RXCLK+/-
RXn+/-
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
Tlvsu
Tlvhd
1T
14
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
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6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
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PRODUCT SPECIFICATION
0.9V
CC
0.9V
CC
10ms
50ms
50ms
ЉЉЉЉ
T4
0V
0.5
ЉЉЉЉ
T
1
ЉЉЉЉ
ЉЉЉЉ
T
2
ЉЉЉЉ
ЉЉЉЉ
T
3
ЉЉЉЉ
0
0
500ms
0.1V
CC
3
T1
T
T
2
0.1V
T4
cc
LVDS Signals
0V
Power On
VALI D
Power Off
0
ЉЉЉЉ
T
7
ЉЉЉЉ
ЉЉЉЉ
T2
T
8
ЉЉЉЉ
T3
T7
8
T
0
Option Signals
(SELLVDS)
Backlight (Recommended)
ЉЉЉЉ
ЉЉЉЉ
T5
T
6
500ms
100ms
50%
5
T
50%
T
6
Power ON/OFF Sequence
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If T2<0,
that may cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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PRODUCT SPECIFICATION
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS (Based on CMI module V315H3-LE2)
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 12V V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Current IL
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should
be measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ. Max. Unit Note
Red
Color
Chromaticity
Green
Blue
White
Center Transmittance T%
Contrast Ratio CR
Response Time
White Variation
Crosstalk CT
Horizonta
Viewing Angle
l
Vertical
Rx
Ry (0.324)
Gx
Gy (0.599)
Bx
By (0.115)
=0°, θY =0°
θ
x
Viewing angle at
normal direction
With C Source
Wx
Wy
=0°, θY =0°
θ
x
With CMI Module
=0°, θY =0°
Gray to
gray
average
δW
θ
x
With CMI
Module@60Hz
θ
=0°, θY =0°
x
With CMI Module
θx+
-
θ
x
θY+
θ
Y
-
CR≥20
With CMI Module
o
25±2
50±10
120±7.2
(0.654)
C
%RH
mA
-
-
-
-
-
Typ.-0.03
(0.293)
(0.130)
Typ+0.03
-
(0.312)
(0.364)
-
-
- 4.6 % (1), (7)
4000 6000 - (1), (3)
(8.5) 17
ms (4)
1.3 - (1), (6)
4.0 % (1), (8)
80 88 80
80
80
88 88 88 -
Deg. (1), (2)
(1),(5)
Note (1) Light source is C source and driving voltages are based on suitable gamma voltages.
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T
Note (2) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by Autronic Conoscope Cono-80
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PRODUCT SPECIFICATION
θX- = 90º
x-
6 o’clock
θ
y-
= 90º
y-
Note (3) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
Normal
θx = θy = 0º
θy- θy+
θx−
θx+
12 o’clock direction
y+
θ
y+
= 90º
x+
θX+ = 90º
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(6)
Note (4) Definition of Response Time (Gray to Gray switching time):
100%
90%
Optical
Response
10%
0%
TR
T
F
ime
The driving signal means the signal of Gray 0, 31, 63, 95, 127,159, 191, 223, 255. Gray to gray average time means the
average switching time of gray 0, 31, 63, 95, 127,159, 191, 223, 255 to each other.
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W
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement should
be executed after lighting backlight for 1 hour in a windless room.
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PRODUCT SPECIFICATION
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δ
= Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
where L (X) is corresponding to the luminance of the point X at the figure below.
W/4
Horizontal Line
D
D/4 D/2 3D/4
1 2
Vertical Line
W
W/2
3W /4
5
3 4
Active Area
: Test Point
X
X=1 to 5
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(
)
(
)
Note (7) Definition of Transmittance (T%):
Module with suitable gamma voltage signal input.
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PRODUCT SPECIFICATION
Transmittance =
Note (8) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA × 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 255 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
(0, 0)
Active Area
Gray 0
Y
(D/8,W/2)
A, L
Gray 128
Y
(D/2,7W/8)
A, D
Luminance of LCD module
Luminance of backlight
Y
(D/2,W /8)
A, U
(D/4,W/4)
Y
(D/8,W/2)
Y
D, W
A, R
(7D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
Ϡ 100%
Active Area
Gray 255
Gray 128
Y
(D/2,W /8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
(D, W)
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PRODUCT SPECIFICATION
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the product during assembly.
(2) To assemble backlight or install module into user’s system can be only in clean working areas. The dust
and oil may cause electrical short or worsen the polarizer.
(3) It’s not permitted to have pressure or impulse on the module because the LCD panel will be damaged.
(4) Always follow the correct power sequence when the product is connecting and operating. This can
prevent damage to the CMOS LSI chips during latch-up.
(5) Do not pull the I/F connector in or out while the module is operating.
(6) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(7) It is dangerous that moisture come into or contacted the product, because moisture may damage the
product when it is operating.
(8) High temperature or humidity may reduce the performance of module. Please store this product within
the specified storage conditions.
(9) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the
response time will become slowly.
8.2 SAFETY PRECAUTIONS
(1) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(2) After the product’s end of life, it is not harmful in case of normal operation and storage.
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9. MECHANICAL CHARACTERISTIC
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PRODUCT SPECIFICATION
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PRODUCT SPECIFICATION
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