Page 1
Global LCD Panel Exchange Center
MODEL NO.: V315H3
www.panelook.com
PRODUCT SPECIFICATION
ϭʳ Tentative Specification
ϭʳ Preliminary Specification
Ϯʳ Approval Specification
SUFFIX: LS5
Customer:
APPROVED BY SIGNATURE
Name / Title
Note
Please return 1 copy for your confirmation with your
signature and comments.
Approved By Checked By Prepared By
Chao-Chun Chung Vincent Chou
Perry Lin
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
1
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 2
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
CONTENTS
1. GENERAL DESCRIPTION .....................................................................................................................................5
1.1 OVERVIEW .................................................................................................................................................. 5
1.2 FEATURES .................................................................................................................................................. 5
1.3 APPLICATION.............................................................................................................................................. 5
1.4 GENERAL SPECIFICATIONS ...................................................................................................................... 5
1.5 MECHANICAL SPECIFICATIONS................................................................................................................ 6
2. ABSOLUTE MAXIMUM RATINGS..........................................................................................................................7
2.1 ABSOLUTE RATINGS OF ENVIRONMENT .................................................................................................7
2.2 PACKAGE STORAGE..................................................................................................................................8
2.3 ELECTRICAL ABSOLUTE RATINGS........................................................................................................... 8
2.3.1 TFT LCD MODULE ...........................................................................................................................8
2.3.2 BACKLIGHT UNIT ............................................................................................................................8
3. ELECTRICAL CHARACTERISTICS .......................................................................................................................9
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC...................................................................................................... 9
3.2 BACKLIGHT CONVERTER UNIT............................................................................................................... 12
3.2.1 LED LIGHT BAR CHARACTERISTICS (Ta = 25 ± 2 ºC) .................................................................12
3.2.2 CONVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC) ......................................................................12
3.2.3 CONVERTER INTERFACE CHARACTERISTICS ...........................................................................14
4. BLOCK DIAGRAM OF INTERFACE.....................................................................................................................16
4.1 TFT LCD MODULE ................................................................................................................................... 16
5. INTERFACE PIN CONNECTION ..........................................................................................................................17
5.1 TFT LCD MODULE .................................................................................................................................... 17
5.2 BACKLIGHT UNIT ..................................................................................................................................... 22
5.3 CONVERTER UNIT .................................................................................................................................... 22
5.4 BLOCK DIAGRAM OF INTERFACE........................................................................................................... 24
5.5 LVDS INTERFACE ..................................................................................................................................... 27
5.6 COLOR DATA INPUT ASSIGNMENT ......................................................................................................... 28
6. INTERFACE TIMING ............................................................................................................................................30
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)................................................................ 30
6.1.1 Timing spec for Frame Rate = 100Hz ............................................................................................30
6.1.2 Timing spec for Frame Rate = 120Hz ............................................................................................31
6.2 POWER ON/OFF SEQUENCE............................................................................................................................34
6.2.1 POWER ON/OFF SEQUENCE(Ta = 25 ± 2 ºC)................................................................................34
6.2.2 2D/3D MODE CHANGE SIGNAL SEQUENCE WITHOUT VCC TURN OFF AND TURN ON...........35
7. OPTICAL CHARACTERISTICS............................................................................................................................35
7. OPTICAL CHARACTERISTICS............................................................................................................................36
7.1 TEST CONDITIONS ................................................................................................................................... 36
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
2
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 3
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
7.2 OPTICAL SPECIFICATIONS...................................................................................................................... 37
8. DEFINITION OF LABELS.....................................................................................................................................43
8.1 CMI MODULE LABEL ................................................................................................................................ 43
9. PACKAGING ........................................................................................................................................................44
9.1 PACKING SPECIFICATIONS ..................................................................................................................... 44
9.2 PACKING METHOD ................................................................................................................................... 44
10. International Standard ......................................................................................................................................46
10.1 Safety ...................................................................................................................................................... 46
10.2 EMC......................................................................................................................................................... 46
11. PRECAUTIONS ..................................................................................................................................................47
11.1 ASSEMBLY AND HANDLING PRECAUTIONS ........................................................................................ 47
11.2 SAFETY PRECAUTIONS......................................................................................................................... 47
12. MECHANICAL CHARACTERISTICS..................................................................................................................48
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
3
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 4
Global LCD Panel Exchange Center
Version Date Page(New) Section Description
www.panelook.com
PRODUCT SPECIFICATION
REVISION HISTORY
Ver. 2.0 July. 5, 2011 All
All
The approval specification was first issued.
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
4
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 5
Global LCD Panel Exchange Center
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V315H3- LS5 is a 31.5” TFT Liquid Crystal Display module with LED Backlight and 4ch-LVDS interface. This
module supports 1920 x 1080 Full HDTV format and can display 1.07G colors ( 8-bit + FRC). The converter
module for backlight is built-in.
1.2 FEATURES
- High brightness (400 nits)
- Ultra-high contrast ratio (5000:1)
- Faster response time (gray to gray average 6 ms)
- High color saturation NTSC 72% (72%)
- Ultra wide viewing angle: 176(H)/176(V) (CR≥20) with Super MVA technology
www.panelook.com
PRODUCT SPECIFICATION
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Low color shift function
- RoHs compliance
1.3 APPLICATION
- TFT LCD TVs
- Multi-Media Display
1.4 GENERAL SPECIFICATIONS
Item Specification Unit Note
Active Area 698.4 (H) x 392.85 (V) mm
Bezel Opening Area 705.4 (H) x 400 (V) mm
Driver Element a-si TFT active matrix -
Pixel Number 1920 x R.G.B. x 1080 pixel
Pixel Pitch (Sub Pixel) 0.12125 (H) x 0.36375 (V) mm
Pixel Arrangement RGB vertical stripe -
(49.2 W)
Power Consumption
Display Colors 1.07G color
Display Operation Mode Transmissive mode / Normally Black -
Surface Treatment
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.
(LVDS input Power 13.2W + LED Backlight Power
36W)
Anti-Glare Coating (Haze 11%)
Hard Coating (3H)
Watt (2)
- (3)
(1)
Note (2) Please refer sec 3.1 and 3.2 for more information of Power consumption
Note (3) The spec. of the surface treatment is temporarily for this phase. CMI reserves the rights to change this feature.
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
5
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 6
Global LCD Panel Exchange Center
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 724.2 725.2 726.2 mm (1)
Vertical(V) 420.9 421.9 422.9 mm (1)
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Depth(D) 14.1 15.1 16.1 mm
Depth(D) 22.6 23.6 24.6 mm
Weight 4220 g
www.panelook.com
PRODUCT SPECIFICATION
To converter
cover
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
6
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 7
Global LCD Panel Exchange Center
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of display area is
less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber. Thermal management
www.panelook.com
PRODUCT SPECIFICATION
Val ue
Min. Max.
- 50 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Unit Note
should be considered in final product design to prevent the surface temperature of display area from being over 65 ºC.
The range of operating temperature may degrade in case of improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module
would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
7
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
80 60 -20 40 0 20 -40
www.panelook.com
Page 8
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to
store the module with temperature from 0 to 35 at normal humidity without condensation.к
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 13.5 V
Input Signal Voltage VIN -0.3 3.6 V
Min. Max.
Val ue
Unit Note
2.3.2 BACKLIGHT UNIT
Item Symbol
Light Bar Voltage VW Ta = 25 к - - 60 V
Converter Input Voltage VBL - 0 - 30 V
Control Signal Level - - -0.3
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional operation should be
Te st
Condition
Min. Type Max. Unit
RMS
- 7 V
Note
3D Mode
restricted to the conditions described under normal operating conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control and External PWM Control.
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
8
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 9
Global LCD Panel Exchange Center
3. ELECTRICAL CHARACTERISTICS
www.panelook.com
PRODUCT SPECIFICATION
3.1 TFT LCD MODULE
Ta = 25 ± 2 ºC
Val ue
Parameter Symbol
Unit Note
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Rush Current I
- - 1.96 A (2)
RUSH
White Pattern - 6.0 6.5 W
Power
Horizontal
- 10.9 13.2 W
Consumption
Stripe
Black Pattern - 5.9 6.3 W
(3)
White Pattern - - 0.50 0.54 A
Power
Horizontal
Supply
- - 0.91 1.1 A
Stripe
Current
Black Pattern - - 0.49 0.53 A
Differential
Input High
Threshold
+100 - - mV
V
LVT H
Voltage
Differential
LVDS
interface
Input Low
Threshold
Voltage
Common Input
Voltage
Differential
input voltage
- - -100 mV
V
LVTL
1.0 1.2 1.4 V
V
CM
| 200 - 600 mV
|V
ID
(4)
Terminating
- 100 - ohm
R
Resistor
T
Input High
2.7 - 3.3 V
V
IH
0 - 0.7 V
V
IL
CMOS
interface
Threshold
Voltage
Input Low
Threshold
Voltage
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
Version 2.0
9
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 10
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
GND
Vcc rising time is 470us
0.9Vcc
0.1Vcc
470us
Vcc
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
10
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 11
Global LCD Panel Exchange Center
Note (3) The specified power consumption and power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv =
120 Hz, whereas a power dissipation check pattern below is displayed.
www.panelook.com
PRODUCT SPECIFICATION
a. White Pattern
b. Black Pattern
Active Area
Active Area
c. Horizontal Stripe Pattern
Note (4) The LVDS input characteristics are as follows:
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
11
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 12
Global LCD Panel Exchange Center
3.2 BACKLIGHT CONVERTER UNIT
3.2.1 LED LIGHT BAR CHARACTERISTICS (Ta = 25 ± 2 ºC)
The backlight unit contains 2 pcs light bar.
www.panelook.com
PRODUCT SPECIFICATION
Val ue
Parameter Symbol
Unit Note
Min. Typ. Max.
Total Current (12 String) If
I
L(2D)
- 1200.0 1272.0
- 100.0 106.0
mA
mA
One String Current
I
L(3D)
One String Voltage VW
- - 2
One String Voltage Variation
ϦV
W
Life time -
Note (1) The lifetime is defined as the tim e which luminance of the LED decays to 50% compared to the initial value,
Operating condition: Continuous operating at Ta = 252к, IL =100mA
- 300.0 318.0
mApeak 3D ENA=ON
24.3 - 30.6
30,000 - -
VDC IL =100mA
V
Hrs (1)
3.2.2 CONVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC)
Val ue
Parameter Symbol
Power Consumption
P
P
BL(2D)
BL(3D)
Min. Typ. Max.
-
-
36.0 41.4
27.0 32.0
Unit
W
W
Note
(1), (2)
IL = 100 mA
(1), (2)
IL=3*typ.
Converter Input Voltage VBL 22.8 24.0 25.2 VDC
I
1.2 1.5 1.73 A Non Dimming
BL(2D)
Converter Input Current
0.9 1.13 1.33 A
I
BL(3D)
VBL=22.8V,(IL=typ.)
I
-
R(2D)
- 2.33
Apeak
(3), (6)
Input Inrush Current
VBL=22.8V,(IL=3*typ.)
I
- - 4.2 Apeak
R(3D)
Dimming Frequency
Minimum Duty Ratio
Note (1) The power supply capacity should be higher than the total converter power consumption PBL. Since the pulse width
modulation (PWM) mode was applied for backlight dimming, the driving current changed as PWM duty on and off.
The transient response of power supply should be considered for the changing loading when converter dimming.
Note (2) The measurement condition of Max. value is based on 31.5" backlight unit under input voltage 24V, average LED
current 106 mA at 2D Mode (LED current 318 mApeak at 3D Mode) and lighting 1 hour later.
Note (3) For input inrush current measure, the VBL rising time from 10% to 90% is about 30ms.
FB 150 160 170 Hz
DMIN 5 10 - %
(3), (6)
(5)
(4), (5)
Version 2.0
12
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 13
Global LCD Panel Exchange Center
Note (4) 5% minimum duty ratio is only valid for electrical operation.
Note (5) FB and DMIN are available only at 2D Mode.
Note (6) Below diagram is only for power supply design reference.
Test Condition: VBL=22.8V, IL=100mA at 2D Mode/ IL=(300)mApeak at 3D Mode
Iin(A)
CurrentΚ4.2 A
2D Mode
CurrentΚ2.33A
www.panelook.com
PRODUCT SPECIFICATION
3D Mode
CurrentΚ2.3 A
CurrentΚ1.73 A
T1 T2 Time (m)
200 ms
Mode Change
2D ->
3D
T2
Duty 20%
Dimming Freq.
200 ms
!
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
13
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 14
Global LCD Panel Exchange Center
www.panelook.com
3.2.3 CONVERTER INTERFACE CHARACTERISTICS
PRODUCT SPECIFICATION
Parameter Symbol
ON
On/Off Control Voltage
OFF
External PWM Control
Voltage
Error Signal ERR
VBL Rising Time Tr1
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time TPWMR
PWM Signal Falling Time TPWMF
HI
LO
VBLON
VEPWM
0
0
30
Val ue
Ё
Ё
Ё
Ё
Ё Ё
5.0 V
0.8 V
5.25
0.8 V Duty off
100 ms
100 ms
50 us
50 us
Te st
Condition
Ё
Ё
Ё
Ё
Ё Ё Ё Ё Ё
Ё
Ё Ё Ё
Ё Ё Ё
Ё Ё Ё
Ё Ё Ё
Min. Typ. Max.
2.0
2.0
Unit Note
V Duty on
(5), (6)
Abnormal: Open
collector
Normal: GND
(4)
ms 10%-90%VBL
(6)
Input Impedance Rin
PWM Delay Time TPWM
Ton
BLON Delay Time
T
on1
BLON Off Time Toff
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to change the external
PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the Fig.1. For a certain reason, the converter has a
possibility to be damaged with wrong power sequence and control signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL → PWM signal → BLON
Turn OFF sequence: BLOFF → PWM signal → VBL
Note (4) When converter protective function is triggered, ERR will output open collector status.
Note (5) The EPWM interface that inserts a pull up resistor to 5V in Max Duty (100%), please refers to Fig.2.
Note (6) EPWM is available only at 2D Mode.
Ё
Ё
Ё
Ё
Ё
1
100
300
300
300
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
MΩ
ms (6)
ms
ms
ms
EPWM, BLON
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
14
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 15
Global LCD Panel Exchange Center
Ө
Ө
Ө
www.panelook.com
PRODUCT SPECIFICATION
V
V
BL
V
BLON
EPWM
Tr1
%/
9
9
%/
2.0V
0.8V
2.0V
0.8V
Ton
T
Backlight on duration
Tr
Ext. Dimming Function
PWMR
T
PWM
T
Ton1
Tf
PWMF
Floating
0
0
0
Toff
V
W
External
PWM
Period
External
PWM Duty
100%
Fig. 1
5V +/- 5%
100k
EPWM
>1M
10k
Dimming
Circuit
Fig. 2
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
15
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 16
Global LCD Panel Exchange Center
INPUT CONNECTOR
DATA DRIVER
SCAN DRIVER
INPUT CONNECTOR
GND VCC
4. BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
www.panelook.com
PRODUCT SPECIFICATION
CH3_0(+ /-)
CH3_1(+ /-)
CH3_2(+ /-)
CH3_3(+ /-)
CH3_4(+ /-)
CH3_CLK(+/-)
CH4_0(+ /-)
CH4_1(+ /-)
CH4_2(+ /-)
CH4_3(+ /-)
CH4_4(+ /-)
CH1_0(+ /-)
CH1_1(+ /-)
CH1_2(+ /-)
CH1_3(+ /-)
CH1_4(+ /-)
CH1_CLK(+/-)
CH2_0(+ /-)
CH2_1(+ /-)
CH2_2(+ /-)
CH2_3(+ /-)
CH2_4(+ /-)
CH2_CLK(+/-)
CNF2: 187060-41221,P-TWO,
or equivalent
TIMING
CONTROLLER
CNF1: 187059-51221,P-TWO,
DC/DC CONVERTER
& REFERENCE
or equivalent
VOLTAGE
TFT LCD PANEL
(1920x3x1080)
2D/3D
L/R
L/R_O
STV
L/R_O
VB
GND
ERR
E_PWM
BLON
OUTPUT CONNECTOR
CN6:LM123S-010-H-TF1-3 or
equivalent
CONVERTER
CONNECTOR
CN1: CI0114M1HR0-LA
(CviLux)
CN2-CN3: 196388-12041-3 (P-TWO)
BACKLIGHT UNIT
Version 2.0
16
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 17
Global LCD Panel Exchange Center
5. INTERFACE PIN CONNECTION
www.panelook.com
PRODUCT SPECIFICATION
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment: (187059-51221, P-TWO or equivalent)
Pin
1 Vin Power input (+12V)
2 Vin Power input (+12V)
3 Vin Power input (+12V)
4 Vin Power input (+12V)
5 Vin Power input (+12V)
6 N.C. No Connection (1)
7 GND Ground
8 GND Ground
9 GND Ground
10
11
12
13
14
15
16 GND Ground
17
18
19 GND Ground
20
Name Description Note
CH2[0]- Second pixel Negative LVDS differential data input. Pair 0
CH2[0]+ Second pixel Positive LVDS differential data input. Pair 0
CH2[1]- Second pixel Negative LVDS differential data input. Pair 1
CH2[1]+ Second pixel Positive LVDS differential data input. Pair 1
CH2[2]- Second pixel Negative LVDS differential data input. Pair 2
CH2[2]+ Second pixel Positive LVDS differential data input. Pair 2
CH2CLK- Second pixel Negative LVDS differential clock input.
CH2CLK+ Second pixel Positive LVDS differential clock input.
CH2[3]- Second pixel Negative LVDS differential data input. Pair 3
(6)
(6)
21
22
23
24 GND Ground
25
26
27
28
29
30
31 GND Ground
32
33
34 GND Ground
35
Version 2.0
CH2[3]+ Second pixel Positive LVDS differential data input. Pair 3
CH2[4]- Second pixel Negative LVDS differential data input. Pair 4
CH2[4]+ Second pixel Positive LVDS differential data input. Pair 4
CH4[0]- Fourth pixel Negative LVDS differential data input. Pair 0
CH4[0]+ Fourth pixel Positive LVDS differential data input. Pair 0
CH4[1]- Fourth pixel Negative LVDS differential data input. Pair 1
CH4[1]+ Fourth pixel Positive LVDS differential data input. Pair 1
CH4[2]- Fourth pixel Negative LVDS differential data input. Pair 2
CH4[2]+ Fourth pixel Positive LVDS differential data input. Pair 2
CH4CLK- Fourth pixel Negative LVDS differential clock input.
CH4CLK+ Fourth pixel Positive LVDS differential clock input.
CH4[3]- Fourth pixel Negative LVDS differential data input. Pair 3
17
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
(6)
(6)
(6)
(6)
DateΚΚ5 July. 2011
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 18
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
CH4[3]+ Fourth pixel Positive LVDS differential data input. Pair 3
36
CH4[4]- Fourth pixel Negative LVDS differential data input. Pair 4
37
CH4[4]+ Fourth pixel Positive LVDS differential data input. Pair 4
38
39 GND Ground
N.C. No Connection
40
N.C. No Connection
41
42 2D/3D Input signal for 2D/3D Mode Selection (3)(5)
N.C. No Connection
43
44 NC
45 STV Output signal from Tcon! Real Vertical out for panel
N.C. No Connection
46
N.C. No Connection
47
48 L/R Input signal for Left Right eye frame synchronous (4) (5)
49 L/R_O Output signal for Left Right Glasses control (7)
N.C. No Connection
50
N.C. No Connection
51
No Connection
(6)
(1)
(1)
(1)
(1)
(1)
CNF2 Connector Pin Assignment (187060-41221(P-TWO) or equivalent)
Pin
1 Vin Power input (+12V)
2 Vin Power input (+12V)
3 Vin Power input (+12V)
4 Vin Power input (+12V)
5 Vin Power input (+12V)
6 N.C. No Connection (1)
7 GND Ground
8 GND Ground
9 GND Ground
10
11
12
13
14
15
16
Name Description Note
CH1[0]- First pixel Negative LVDS differential data input. Pair 0
CH1[0]+ First pixel Positive LVDS differential data input. Pair 0
CH1[1]- First pixel Negative LVDS differential data input. Pair 1
CH1[1]+ First pixel Positive LVDS differential data input. Pair 1
CH1[2]- First pixel Negative LVDS differential data input. Pair 2
CH1[2]+ First pixel Positive LVDS differential data input. Pair 2
GND Ground
(6)
CH1CLK- First pixel Negative LVDS differential clock input.
17
CH1CLK+ First pixel Positive LVDS differential clock input.
18
GND Ground
19
CH1[3]- First pixel Negative LVDS differential data input. Pair 3
20
CH1[3]+ First pixel Positive LVDS differential data input. Pair 3
21
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
18
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
(6)
(6)
www.panelook.com
Page 19
Global LCD Panel Exchange Center
CH1[4]- First pixel Negative LVDS differential data input. Pair 4
22
CH1[4]+ First pixel Positive LVDS differential data input. Pair 4
23
24 GND Ground
CH3[0]- Third pixel Negative LVDS differential data input. Pair 0
25
CH3[0]+ Third pixel Positive LVDS differential data input. Pair 0
26
CH3[1]- Third pixel Negative LVDS differential data input. Pair 1
27
CH3[1]+ Third pixel Positive LVDS differential data input. Pair 1
28
CH3[2]- Third pixel Negative LVDS differential data input. Pair 2
29
CH3[2]+ Third pixel Positive LVDS differential data input. Pair 2
30
GND Ground
31
CH3CLK- Third pixel Negative LVDS differential clock input.
32
CH3CLK+ Third pixel Positive LVDS differential clock input.
33
www.panelook.com
PRODUCT SPECIFICATION
(6)
(6)
(6)
GND Ground
34
CH3[3]- Third pixel Negative LVDS differential data input. Pair 3
35
CH3[3]+ Third pixel Positive LVDS differential data input. Pair 3
36
CH3[4]- Third pixel Negative LVDS differential data input. Pair 4
37
CH3[4]+ Third pixel Positive LVDS differential data input. Pair 4
38
39 GND Ground
40 N.C. No Connection
41 N.C. No Connection
CN6 Connector Pin Assignment (LM123S-010-H-TF1-3 (UNE) or equivalent)
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 GND Ground
5 N.C. No Connection
6 L/R_O Output signal for Left Right Glasses control
(6)
(1)
(1)
(1)
(7)
7 N.C. No Connection
8 N.C. No Connection
9 N.C. No Connection
10 N.C. No Connection
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
19
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
(1)
www.panelook.com
Page 20
Global LCD Panel Exchange Center
SELLVDS
Note
L
or Open JEDIA Format
H
VESA Format
2D/3D
Note
L or Open 2D Mode
H 3D Mode
L/R Note
L
Right synchronous signal
H Left synchronous signal
Note (1) Reserved for internal use. Please leave it open.
Note (2) LVDS format selection.
L= Connect to GND or OpenʿʳH=Connect to +3.3˩
Note (3) 2D/3D mode selection.
L= Connect to GN˗ʳʳˢ˸ʿʳH=Connect to +3.3˩
www.panelook.com
PRODUCT SPECIFICATION
Note (4) Input signal for Left Right eye frame synchronous
VIL=0~0.8 V, VIH=2.0~3.3 V
Note (5) 2D/3D, L/R signal pin connected to the LCM side has the following diagram.
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
Note (6) LVDS 4-port Data Mapping
Port Channel of LVDS
1st Port Second Pixel
2nd Port Fourth Pixel
3rd Port First Pixel 1, 5, 9, ……1913, 1917
4th Port Third Pixel 3, 7, 11, ….1915, 1919
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
20
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Data Stream
2, 6, 10, ….1914, 1918
4, 8, 12, ….1916, 1920
DateΚΚ5 July. 2011
www.panelook.com
Page 21
Global LCD Panel Exchange Center
L R
ight glass turn on
H Left glass turn on
Note (7) The definition of L/R_O signal as follows
L= 0VʳʿʳH= +3.3˩ʳ
L/R_O Note
Note (8) LVDS connector mating dimension range request is 0.93mm~1.0mm as follow
www.panelook.com
PRODUCT SPECIFICATION
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
21
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 22
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN2-CN3 (Housing): 196388-12041-3 (P-TWO) or equivalent
Pin № Symbol Feature
5.3 CONVERTER UNIT
CN1(Header): CI0114M1HR0-LA (CviLux)
1
2 VLED-
3 VLED-
4 VLED-
5 VLED-
6 VLED-
7 NC
8 NC
9 NC
10 NC
11 VLED+
12 VLED+
VLED-
Negative of LED String
No Connection
Positive of LED String
Pin № Symbol Feature
1
2
3
4
5
6
7
8
9
10
11
12 BLON BL ON/OFF
13 NC NC
14
VBL +24V
GND GND
ERR
E_PWM External PWM Control
Normal (GND)
Abnormal (Open collector)
Notice (1) If Pin14 is open, E_PWM is 100% duty.
Version 2.0
22
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 23
Global LCD Panel Exchange Center
CN2 ~ CN3 : 196388-12041-3 (P-TWO)
Pin № Symbol Feature
www.panelook.com
PRODUCT SPECIFICATION
1
2 VLED-
3 VLED-
4 VLED-
5 VLED-
6 VLED-
7 NC
8 NC
9 NC
10 NC
11 VLED+
12 VLED+
VLED-
Negative of LED String
No Connection
Positive of LED String
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
23
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 24
Global LCD Panel Exchange Center
5.4 BLOCK DIAGRAM OF INTERFACE
www.panelook.com
PRODUCT SPECIFICATION
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
24
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 25
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
25
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 26
Global LCD Panel Exchange Center
BR0~BR9 Second Pixel R Data DR0~DR9 Fourth Pixel R data
BG0~BG9 Second Pixel G Data DG0~DG9 Fourth Pixel G data
BB0~BB9 Second Pixel B Data DB0~OB9 Fourth Pixel B data
DE Data enable signal
DCLK Data clock signal
The third and fourth pixel are followed the same rules.
AR0~AR9 First Pixel R Data CR0~CR9 Third Pixel R data
AG0~AG9 First Pixel G Data CG0~CG9 Third Pixel G data
AB0~AB9 First Pixel B Data CB0~CB9 Third Pixel B data
Note (1) A ~ D channel are first, second, third and fourth pixel respectively.
Note (2) The system must have the transmitter to drive the module.
www.panelook.com
PRODUCT SPECIFICATION
Note (3) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is used
differentially.
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
26
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 27
Global LCD Panel Exchange Center
5.5 LVDS INTERFACE
JEIDA Format : SELLVDS = L or Open
VESA Format : SELLVDS = H
www.panelook.com
PRODUCT SPECIFICATION
AR0~AR9 First Pixel R Data
(9; MSB, 0; LSB)
AG0~AG9 First Pixel G Data
(9; MSB, 0; LSB)
AB0~AB9 First Pixel B Data
(9; MSB, 0; LSB)
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
27
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DE Data enable signal
DCLK Data clock signal
RSVD Reserved
DateΚΚ5 July. 2011
www.panelook.com
Page 28
Global LCD Panel Exchange Center
R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
1
1 1
1
1 1
1
1 1
1
1 1
1
1 1
1
1 1
1
1 1
1
1 1
1
1 1
1
1 1
0
0 1
0
0 1
0
0 1
0
0 1
0
0 1
0
0 1
0
0 1
0
0 1
0
0 1
0
0 1
0
1 0
0
1 0
0
1 0
0
1 0
0
1 0
0
1 0
0
1 0
0
1 0
0
1 0
0
1 0
0
1 1
0
1 1
0
1 1
0
1 1
0
1 1
0
1 1
0
1 1
0
1 1
1
0 1
0
1 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 1
0 0
: 1
0 0
: 1
0 0
: 1
0 0
: 1
0 0
: 1
0 0
: 1
0 0
: 1
0 1
: 0
1 0
: 1
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
0 0
: 0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the
color. The higher the binary input, the brighter the color. The table below provides the assignment of the color
versus data input.
www.panelook.com
PRODUCT SPECIFICATION
Data Signal
Basic
Colors
Gray
Scale
Of
Red
Color
Black
Red
Green
Blue
Cyan
Magenta
Yel lo w
White
Red (0) / Dark
Red (1)
Red (2)
:
:
Red (1021)
Red (1022)
R9
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
;
:
:
:
:
:
:
:
:
:
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Red (1023)
Green (0) / Dark
Green (1)
Green (2)
:
:
Green (1021)
Green (1022)
Green (1023)
Blue (0) / Dark
Blue (1)
Blue (2)
:
:
Blue (1021)
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
Version 2.0
28
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 29
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
Blue (1022)
Blue (1023)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Note (1) 0: Low Level Voltage, 1: High Level Voltage
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
Version 2.0
29
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 30
Global LCD Panel Exchange Center
6. INTERFACE TIMING
www.panelook.com
PRODUCT SPECIFICATION
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
(Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol
F
Frequency
clkin
Min. Typ. Max. Unit Note
60 74.25 80 MHz
(=1/TC)
Input cycle to
LVDS
cycle jitter
- - 200 ps (3)
T
rcl
Receiver
Clock
Spread spectrum
modulation range
clkin_mo
F
-2%
F
d
clkin
- F
Spread spectrum
LVDS
F
modulation frequency
SSM
Setup Time Tlvsu
- - 200 KHz
600 - - ps
Receiver
Data
Hold Time Tlvhd
600 - - ps
6.1.1 Timing spec for Frame Rate = 100Hz
clkin
+2%
MHz
(4)
(5)
Signal Item Symbol
2D mode Fr5 94 100 106 Hz
Frame rate
3D mode F
Total Tv 1090 1350 1395 Th
Vertical
Active
Display
2D Mode
Display Tvd 1080 1080 1080 Th
Blank Tvb 10 270 315 Th
Total Tv 1350 Th
Term
3D Mdoe
Display Tvd 1080 Th
Blank Tvb 270 Th
Total Th 520 550 670 Tc
Horizontal
Active
Display
Term
2D Mode
3D Mdoe
Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc
Total Th 520 550 670 Tc
Display Thd 480 480 480 Tc
Min. Typ. Max. Unit Note
100 100 100 Hz
r5
(7)
Tv=Tvd+T vb
Ё
Ё
(6) (8)
Th=Thd+Thb
Ё
Ё
Th=Thd+Thb
Ё
Blank Thb 40 70 190 Tc
Version 2.0
30
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Ё
www.panelook.com
Page 31
Global LCD Panel Exchange Center
6.1.2 Timing spec for Frame Rate = 120Hz
www.panelook.com
PRODUCT SPECIFICATION
Signal Item Symbol
2D mode Fr6 114 120 126 Hz
Frame rate
3D mode F
Total Tv 1090 1125 1395 Th
Vertical
Active
Display
Term
Horizontal
Active
2D Mode
3D Mdoe
2D Mode
Display Tvd 1080 1080 1080 Th
Blank Tvb 10 45 315 Th
Total Tv 1125
Display Tvd 1080
Blank Tvb 45
Total Th 520 550 670 Tc
Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc
Min. Typ. Max. Unit Note
120 120 120 Hz (7)
r6
Tv=Tvd+Tv
b
Ё
Ё
(6)(8)
Th=Thd+T
hb
Ё
Ё
Display
Term
3D Mdoe
Note (1) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic level.
Otherwise, this module would operate abnormally.
Note (2) Please make sure the range of pixel clock has follow the below equation:
Fclkin(max) Fr6 Tv ThЊѼѼ
Fr5 Tv Th Fclkin(min)ѼѼЊ
ʳ
Total Th 520 550 670 Tc
Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc
Th=Thd+T
hb
Ё
Ё
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
31
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 32
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
INPUT SIGNAL TIMING DIAGRAM
Tvd
Tv
Tvb
DE
Th
DCLK
DE
Thd
DAT
Valid display data ( 480 clocks)
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
32
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 33
Global LCD Panel Exchange Center
14
14
14
14
14
14
14
Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
www.panelook.com
PRODUCT SPECIFICATION
Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T
3T
5T
7T
9T
11T
13T
Note (6)
Note (7) In 3D mode, the set up Fr5 and Fr6 in Typ. 3 HZ .In order to ensure that the electric function performance to avoid no
Note (8) In 3D mode, the set up Tv and Tvb in Typ. 30.In order to ensure that the electric function performance to avoid no
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Please fix the Vertical timing (Vertical Total =1350 / Display =1080 / Blank = 270) in 100Hz 3D mode
and Vertical timing (Vertical Total =1125 / Display =1080 / Blank = 45) in 120Hz 3D mode.
display symptom.(Except picture quality symptom.)
display symptom.(Except picture quality symptom.)
33
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 34
Global LCD Panel Exchange Center
Љ
Љ
Љ
P
Љ
100ms
Љ
T
Љ
(2D/3D,
L/R)
6.2 POWER ON/OFF SEQUENCE
POWER ON/OFF SEQUENCE(Ta = 25 ± 2 ºC)
6.2.1
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
www.panelook.com
PRODUCT SPECIFICATION
0.5ЉT1Љ
0
T2Љ
0
T3Љ
500ms
10ms
0V
50ms
50ms
T4
0.1V
CC
T
3
T
2
0.1V
cc
T1
T4
LVDS Signals
0V
Power On
0ЉT7Љ
0
T8Љ
T2
T3
T7
T
8
Option Signals
Backlight (Recommended)
500ms
T5
6
50%
T
5
50%
T
6
Version 2.0
Power ON/OFF Sequence
34
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 35
Global LCD Panel Exchange Center
Љ
Љ
2D/3D
Љ
Љ
6.2.2 2D/3D MODE CHANGE SIGNAL SEQUENCE WITHOUT VCC TURN OFF AND TURN ON
0.5ЉT1Љ
0
LVDS Signals
0ЉT7ЉT2
0
VCC
10ms
T2Љ
50ms
T10Љ10m
0V
0V
www.panelook.com
PRODUCT SPECIFICATION
0.9V
CC
CC
0.1V
1
T
T2
Power On
T7
Black Pattern
T10
Scalar send
0ЉT9Љ10ms
T12Љ20ms
10
Scalar Black Pattern
Insertion
9
T
T12
Backlight ON/OFF
T
500ms
500msЉT11
5
5
T
T11
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD operation or the
LCD turns off before the backlight turns off, the display may momentarily become abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If T2<0,that maybe
cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
Version 2.0
35
DateΚΚ5 July. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 36
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 12 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Current IL 100 mA
Vertical Frame Rate Fr 120 Hz
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during
measuring. In order to stabilize the luminance, the measurement should be executed after lighting backlight for 1
hour in a windless room.
25±2
50±10
oC
%RH
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
36
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 37
Global LCD Panel Exchange Center
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in 7.1.
www.panelook.com
PRODUCT SPECIFICATION
Item Symbol Condition Min. Typ. Max.
Contrast Ratio CR 3500 5000 - - (2)
Response Time (VA) Gray to gray - 6 12 ms (3)
Center Luminance of
White
White Variation
Cross Talk CT
Red
Green
Color
Chromaticity
Blue
L
C
2D 320 400 - cd/m
3D - 60 - cd/m
δW
2D - - 4 % (5)
3D-W - 4 - % (8)
3D-D - 11 - % (8)
Rx 0.636
Ry 0.334
Gx 0.296
Gy 0.601
Bx 0.152
By 0.054
θx=0°, θy =0°
Viewing angle
at normal direction
- - 1.3 - (6)
Typ.
-0.03
Typ.
+0.03
Unit Note
2
(4)
2
(8)
-
-
-
-
-
-
-
White
Correlated color temperature
Color
Gamut
Horizontal
Viewing
Angle
Vertical
Transmission direction of
the up polarizer
Wx 0.280
Wy
C.G.
θx+
θx-
CR≥20
θy+
θy-
- - 90 - Deg. (7)
Φ
up
80 88 -
80 88 -
80 88 -
80 88 -
0.290
- 10000
- 72 - % NTSC
- K -
-
-
Deg.
(1)
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
37
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 38
Global LCD Panel Exchange Center
T
ime
Note (1) Definition of Viewing Angle (θx, θy) :
Viewing angles are measured by Autronic Conoscope Cono-80
www.panelook.com
PRODUCT SPECIFICATION
Normal
θx =θy = 0º
Note (2) Definition of Contrast Ratio (CR) :
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) =
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
θx- = 90º
x-
6 o’clock
y-
θy- = 90º
θy-
θx−
θy+
θx+
L0 of Luminance Surface
12 o’clock
direction
x+
θx+ = 90º
L255 of Luminance Surface
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).
Note (3) Definition of Gray-to-Gray Switching Time:
The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023.
Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636,
764, 892 and 1023 to each other.
100%
90%
Optical
Response
10%
0%
Gray to gray
switching time
Gray to gray
switching time
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
38
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 39
Global LCD Panel Exchange Center
Active
Active
(0, 0)
(D, W)
Active
Active
(D, W)
Note (4) Definition of Luminance of White (LC):
Measure the luminance of gray level 255 at center point and 5 points
= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).
L
C
Note (5) Definition of Cross Talk (CT):
www.panelook.com
PRODUCT SPECIFICATION
CT = | Y
– YA | / YA × 100 (%)
B
Where:
= Luminance of measured location without gray level 0 pattern (cd/m2)
Y
A
= Luminance of measured location with gray level 0 pattern (cd/m2)
Y
B
(0, 0)
(0, 0)
Y
(D/2,W/8)
A, U
(D/4,W/4
(D/8,W/2)
Y
A, L
Gray 128
(7D/8,W/2)
Y
A, R
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
A, D
(D, W)
= Luminance of measured location without gray level 255 pattern (cd/m2)
Y
A
= Luminance of measured location with gray level 255 pattern (cd/m2)
Y
B
Y
Gray 0
(D/2,W/8)
B, U
(3D/4,3W/4)
Y
(D/2,7W/8)
B, D
Y
(7D/8,W/2)
B, R
Version 2.0
(0, 0)
Y
(D/2,W/8)
A, U
(D/4,W/4)
(D/8,W/2)
Y
A, L
Gray 128
Y
Y
(D/2,7W/8)
A, D
(7D/8,W/2)
A, R
(D, W)
Y
(D/8,W/2)
B, L
Gray 255
39
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
Y
(D/2,7W/8)
B, D
DateΚΚ5 July. 2011
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 40
Global LCD Panel Exchange Center
W
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
www.panelook.com
PRODUCT SPECIFICATION
Vertical Line
W/4
W/2
Horizontal Line
D
D/4 D/2 3D/4
1 2
5
3 4
Active Area
X
: Test Point
X=1 to 5
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
40
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 41
Global LCD Panel Exchange Center
Note (7) This is a reference for designing the shutter glasses of 3D application. (VA)
Definition of the transmission direction of the up polarizer:
www.panelook.com
PRODUCT SPECIFICATION
x-
12 o’clock
direction
ӥup
6 o’clock
y-
ӥ=0o, x+
The transmission axis of the front polarizer of the shutter glasses should be parallel to this panel transmission
direction to get a maximum 3D mode luminance.
o
o
o
0
0
0
o
o
o
90
90
90
Version 2.0
Bottom
Bottom
Bottom
POL
POL
POL
Cell
Cell
Cell
LCD module
LCD module
LCD module
Up
Up
Up
POL
POL
POL
o
o
o
90
90
90
Front
Front
Front
POL
POL
POL
Cell
Cell
Cell
back
back
back
POL
POL
POL
o
o
o
90
90
90
Shutter glasses
Shutter glasses
41
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Front
Front
Front
POL
POL
POL
Cell
Cell
Cell
back
back
back
POL
POL
POL
DateΚΚ5 July. 2011
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 42
Global LCD Panel Exchange Center
5LJKWH\H
VKXWWHUJODVV
Note (8) Definition of the 3D mode performance (measured under 3D mode, use CMI’s shutter glass):
a. Test pattern
Left eye image and right eye image are displayed alternated
www.panelook.com
PRODUCT SPECIFICATION
Left eye image: W255; Right eye image: W255
WB
Left eye image: W255; Right eye image: W0
BW
Left eye image: W0; Right eye image: W255
BB
Left eye image: W0; Right eye image: W0
b. Measurement setup
WW
Shutter glasses are well controlled under suitable timing, and measure the luminance of the center point of the panel
through the right eye glass. The transmittance of the glass should be larger than 40.0% under 3D mode operation.
The luminance of the test pattern “WW”, denoted L(WW); the luminance of the test pattern ”WB”, denoted L(WB); the
luminance of the test pattern “BW”, denoted L(BW); the luminance of the test pattern “BB”, denoted “L(BB)
c. Definition of the Center Luminance of White, Lc (3D) : L(WW)
−
BBLWBL
)()(
d. Definition of the 3D mode white crosstalk, CT (3D-W) :
WDCT
≡−
)3(
−
BWLWWL
e. Definition of the 3D mode dark crosstalk, CT (3D-D) :
)3(
DDCT
≡−
−
−
BBLWWL
)()(
)()(
)()(
BBLWWL
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
42
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 43
Global LCD Panel Exchange Center
X X X X X X X Y M D L N N N N
V315H3
–
LS5
Rev.
XX
X X X X X X X Y M D L N N N N
V315H3
–
LS5
Rev.
XX
8. DEFINITION OF LABELS
8.1 CMI MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
www.panelook.com
PRODUCT SPECIFICATION
CHI MEI
OPTOELECTRONICS
MADE IN TAIWAN
GEMN
RoHS
CHI MEI
OPTOELECTRONICS
MADE IN CHINA
LEOO(or CAPG or CANO)
(a) Model Name: V315H3-LS5
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X
X X X X X Y M D L N N N N
Serial No.
Product Line
Serial ID includes the information as below:
(a) Manufactured Date: Year: 2001=1, 2002=2, 2003=3, 2004=4….2010=0, 2011=1, 2012=2....
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
Version 2.0
43
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Year, Month, Date
CMO Internal Use
CMO Internal Use
Revision
CMO Internal Use
st
to 31st, exclude I ,O, and U.
DateΚΚ5 July. 2011
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 44
Global LCD Panel Exchange Center
9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 6 LCD TV modules / 1 Box
(2) Box dimensions : 826(L)x376(W)x540(H)mm
(3) Weight : Approx. 30 Kg(6 modules per carton)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
www.panelook.com
PRODUCT SPECIFICATION
Version 2.0
Figure.9-1 packing method
44
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Page 45
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
Figure.9-2 packing method
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
45
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 46
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
10. International Standard
10.1 Safety
(1) UL 60950-1, UL 60065: Standard for Safety of Information Technology Equipment Including electrical
Business Equipment.
(2) IEC 60950-1:2005, IEC 60065:2001+ A1:2005 ; Standard for Safety of International Electrotechnical
Commission.
(3) EN 60950-1:2006+ A11:2009, EN60065:2002 + A1:2006 + A11:2008; European Committee for
Electrotechnical Standardization (CENELEC), EUROPEAN STANDARD for Safety of Information Technology
Equipment Including Electrical Business Equipment.
10.2 EMC
(1) ANSI C63.4 Measurement of Radio-Noise Emissions from Low-Voltage Electrical and Electrical Equipment in
the Range of 9kHZ to 40GHZ. Ϙ American National standards Institute(ANSI)
(2) C.I.S.P.R Ϙ Limits and Methods of Measurement of Radio Interface Characteristics of Information
Technology Equipment. Ϙ International Special committee on Radio Interference.
(3) EN 55022 Ϙ Limits and Methods of Measurement of Radio Interface Characteristics of Information
Technology Equipment. ϘEuropean Committee for Electortechnical Standardization.(CENELEC)
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
46
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 47
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
11. PRECAUTIONS
11.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The dust
and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily
scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD modules in
the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of LED light bar will be higher than that of room
temperature.
11.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling with
the converter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of
contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
47
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 48
Global LCD Panel Exchange Center
12. MECHANICAL CHARACTERISTICS
www.panelook.com
PRODUCT SPECIFICATION
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
48
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Page 49
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
Version 2.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
49
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
DateΚΚ5 July. 2011
www.panelook.com
Loading...