CHIMEI INNOLUX V315H3-LE3 Specification

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Issued Date: 19, Apr 2010 Model No.: V315H3
Ω LE3
Preliminary
TFT LCD Preliminary Specification
MODEL NO.: V315H3- LE3
TV Product Marketing & Management Div
Approved By
Chao-Chun Chung
Reviewed By
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Prepared By
LCD TV Marketing and Product Management Div.
QA Dept. Product Development Div.
Hsin-nan Chen WT Lin
Vincent Chou David Kuo
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Issued Date: 19, Apr 2010 Model No.: V315H3
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Preliminary
CONTENTS -
1. GENERAL DESCRIPTION...................................................................................................................................... 5
1.1 OVERVIEW.................................................................................................................................................. 5
1.2 FEATURES .................................................................................................................................................. 5
1.3 APPLICATION.............................................................................................................................................. 5
1.4 GENERAL SPECIFICATI0NS ....................................................................................................................... 5
1.5 MECHANICAL SPECIFICATIONS ................................................................................................................ 5
2. ABSOLUTE MAXIMUM RATINGS........................................................................................................................... 6
2.1 ABSOLUTE RATINGS OF ENVIRONMENT.................................................................................................. 6
2.2 PACKAGE STORAGE .................................................................................................................................. 6
2.3 ELECTRICAL ABSOLUTE RATINGS............................................................................................................ 7
3. ELECTRICAL CHARACTERISTICS........................................................................................................................ 8
3.1 TFT LCD MODULE....................................................................................................................................... 8
3.2 BACKLIGHT UNIT...................................................................................................................................... 10
4. BLOCK DIAGRAM OF INTERFACE...................................................................................................................... 13
4.1 TFT LCD MODULE..................................................................................................................................... 13
5. INTERFACE PIN CONNECTION .......................................................................................................................... 14
5.1 TFT LCD MODULE..................................................................................................................................... 14
5.2 BACKLIGHT UNIT...................................................................................................................................... 17
5.3 CONVERTER UNIT.................................................................................................................................... 17
5.4 BLOCK DIAGRAM OF INTERFACE ........................................................................................................... 19
5.5 LVDS INTERFACE ..................................................................................................................................... 21
5.6 COLOR DATA INPUT ASSIGNMENT.......................................................................................................... 22
6. INTERFACE TIMING ............................................................................................................................................ 23
6.1 INPUT SIGNAL TIMING SPECIFICATIONS................................................................................................ 23
6.2 POWER ON/OFF SEQUENCE................................................................................................................... 26
7. OPTICAL CHARACTERISTICS ............................................................................................................................ 27
7.1 TEST CONDITIONS................................................................................................................................... 27
7.2 OPTICAL SPECIFICATIONS ...................................................................................................................... 27
8. DEFINITION OF LABELS ..................................................................................................................................... 31
8.1 CMI MODULE LABEL................................................................................................................................. 31
9. PACKAGING......................................................................................................................................................... 32
9.1 PACKING SPECIFICATIONS...................................................................................................................... 32
9.2 PACKING METHOD ................................................................................................................................... 32
10. PRECAUTIONS.................................................................................................................................................. 34
10.1 ASSEMBLY AND HANDLING PRECAUTIONS ......................................................................................... 34
10.2 SAFETY PRECAUTIONS ......................................................................................................................... 34
10.3 STORAGE PRECAUTIONS...................................................................................................................... 34
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Preliminary
11. REGULATORY STANDARDS.............................................................................................................................. 35
11.1 SAFETY ................................................................................................................................................... 35
12. MECHANICAL CHARACTERISTIC ..................................................................................................................... 36
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Version Date
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All All Preliminary Specification was first issued.
Page
(New)
REVISION HISTORY
Section Description
Preliminary
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Preliminary
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V315H3- LE3 is a TFT Liquid Crystal Display module with LED Backlight unit and 2ch-LVDS interface. The
display diagonal is 31.5”. This module supports 1920 x 1080 Full HDTV format and can display true 16.7M
colors (8-bit/color).
1.2 FEATURES
- Optimized Brightness 450nits
- Contrast Ratio (6000:1)
- Fast Response Time (8ms)
- Color Saturation NTSC 72%
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) Only Mode
- LVDS (Low Voltage Differential Signaling) Interface
- Viewing Angle: 176(H)/176(V) (CR>20) MVA Technology
- Color Reproduction (Nature Color)
1.3 APPLICATION
-TFT LCD TVs
-Optimized Brightness, Multi-Media Displays
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 698.4(H) x 392.85(V) mm Bezel Opening Area 705.4(H) x 399.8 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1920x R.G.B. x 1080 pixel ­Pixel Pitch(Sub Pixel) 0.12125 (H) x 0.36375 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 16.7M color ­Display Operation Mode Transmissive mode / Normally Black - -
Surface Treatment
Anti-Glare coating (Haze 11%)
Hard Coating (3H)
- (2)
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 740.4 741.4 742.4 mm Module Size
Module Size Weight
Note (1)Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical (V) 434.8 435.8 436.8 mm
Depth (D)
Weight 4310 g
14.2 15.2 16.2 mm To Rear
34.9 35.9 36.9 mm To Boss
(1)
Note (2) Module Depth does not include connectors.
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
Љ
- 50 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Min. Max.
Value
Unit Note
improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 30 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so
that the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
40
Operating Range
20
10
Storage Range
2.2 ELECTRICAL ABSOLUTE RATINGS Temperature (ºC)
2.2.1 TFT LCD MODULE
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80 60 -20 40 0 20 -40
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Preliminary
2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to
store the module with temperature from 0 to 35
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or
fluorescent light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 13.5 V Input Signal Voltage VIN -0.3 3.6 V
2.3.2 BACKLIGHT CONVERTER UNIT
Item Symbol
Light Bar Voltage VW Ta = 25 к - - 60 V
Converter Input Voltage VBL - 0 - 30 V
Control Signal Level - - -0.3 - 7 V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function
кat normal humidity without condensation.
Value
Min. Max.
Te st
Condition
Min. Type Max. Unit Note
Unit Note
(1)
operation should be restricted to the conditions described under Normal Operating Conditions.
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Preliminary
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
( Ta = 25 ± 2 ºC )
Value
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Rush Current I
White Pattern
Power Supply Current
Black Pattern
Horizontal Stripe
Differential Input High Threshold Voltage
Differential Input Low
Threshold Voltage LVDS interface
Common Input Voltage VCM 1.0 1.2 1.4 V
Differential input voltage
( single-end )
RUSH
Ё Ё
Ё Ё
Ё Ё
V
V
|V
LVT H
LVTL
ID
+100
| 200
Ё Ё
0.58
0.44
0.58 0.62 A
Ё Ё
Ё Ё
Ё
2.7 A (2)
Ё
Ё
-100 mV
600 mV
Unit Note
A
A
mV
(3)
(4)
T
0
IL
CMOS interface
Terminating Resistor R
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
Ё
100
Ё
Ё
Ё
ohm
3.3 V
0.7 V
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Vcc rising time is 470us
Vcc
0.9Vcc
0.1Vcc
GND
470us
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
b. Black Pattern
Active Area
Active Area
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c. Horizontal Pattern
Note (4) The LVDS input characteristics are as follows:
/9'6
_9,'_
Preliminary
/9'6
9&0
_9,'_
/9'6
3.2 BACKLIGHT UNIT
3.2.1 LED LIGHT BARCHARACTERISTICS (
Parameter Symbol
Light Bar Voltage VW
Forward Voltage Vf
LED Current IL
Min. Typ. Max.
- -
3.0 - 3.4
75.2 80 84.8
3.2.2 CONVERTER CHARACTERISTICS (
Parameter Symbol
Power Consumption PBL - 48.0 52.8 W
Converter Input Voltage VBL Converter Input Current IBL - 2.0
Dimming Frequency FB 150 160 170 Hz Minimum Duty Ratio D
5 10 -
MIN
Min. Typ. Max.
22.8 24 25.2
Ta = 25 ± 2 ºC)
Value
Ta = 25 ± 2 ºC)
Value
Note (1) 5% minimum duty ratio is only valid for electrical operation.
47.6
2.2
*1'
9
Unit Note
V I V IL =80mA
mA
Unit Note
VDC
A
%
=80mA
L
(1)
10
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3.2.3 CONVERTER INTERFACE CHARACTERISTICS
Parameter Symbol
ON
On/Off Control Voltage
VBLON
OFF
Internal PWM Control Voltage
External PWM Control Voltage
MAX
MIN
HI
LO
VIPWM
VEPWM
Error Signal ERR
VBL Rising Time Tr1
VBL Falling Time Tf1
Te st
Condition
Ё
Ё
Ё
Ё Ё
Ё
Ё
Ё Ё Ё Ё Ё
Ё
Ё
Min. Typ. Max.
2.0
0
3.0 3.15 3.3
2.0
0
30
30
Value
Ё
Ё
0
Ё
Ё
Ё Ё
Ё Ё
Preliminary
Unit Note
5.0 V
0.8 V
V maximum duty ratio
Ё
5.0 V Duty on
0.8 V Duty off
V minimum duty ratio
Abnormal: Open
collector
Normal: GND
(4)
ms
10%-90%V
BL
ms
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time TPWMR
PWM Signal Falling Time TPWMF
Input Impedance Rin
PWM Delay Time TPWM
Ton
Ё Ё Ё
Ё Ё Ё
Ё Ё Ё
Ё Ё Ё
Ё
Ё
Ё
1
100
300
Ё Ё
Ё Ё
Ё Ё
100 ms
100 ms
50 us
50 us
M
ms
ms
BLON Delay Time
T
on1
BLON Off Time Toff
Ё
Ё
300
300
Ё Ё
Ё Ё
ms
ms
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to
change the internal/external PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure. For a certain
reason, the converter has a possibility to be damaged with wrong power sequence and control
signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL → PWM signal → BLON
Turn OFF sequence: BLOFF → PWM signal → VBL
Note (4) When converter protective function is triggered, ERR will output open collector status.
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V
V
V
BL
V
BLON
EPWM
IPWM
Preliminary
9
Toff
%/
Tf1
9
%/
Tr1
9
%/
9
%/
2.0V
0.8V
2.0V
0.8V
Ton
T
Backlight on duration
Tr
Ext. Dimming Function
T
PWMR
PWM
Floating
T
Ton1
Tf
PWMF
Floating
Int. Dimming Function
0
0
0
3.15V
0
V
W
External
PWM
Period
External
PWM Duty
100%
Minimun
Duty
12
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4. BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
ERX0(+/-) ERX1(+/-) ERX2(+/-) ERX3(+/-) ECLK(+/-)
ORX0(+/-) ORX1(+/-) ORX2(+/-) ORX3(+/-) OCLK(+/-)
SELLVDS
ODSE L
Vcc
GND
(107C51-0000RA-G4 Starconn) or
INPUT CONNECTOR
CONTROLLER
DC/DC CONVERTER &
equivalent
REFERENCE VOLTAGE
TIMING
Preliminary
SCAN DRIVER IC
TFT LCD PANEL
(1920x3x1080)
DATA DRIVER IC
VBL
GND
ERR
BLON
I_PWM
E_PWM
CONVERTER
CONNECTOR
CN1: Cvilux CI0114M1HR0-LA or
Equivalent
CN2: 51281-1094 (Molex) or
Equivalent
LED
BACKLIGHT
UNIT
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5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment
Pin Name Description Note
GND Ground
1
N.C.
2
N.C.
3
N.C. No Connection
4
N.C. No Connection
5
N.C. No Connection
6
SELLVDS LVDS data format Selection
7
N.C. No Connection
8
ODSEL Overdrive Lookup Table Selection
9
N.C. No Connection (2)
10
GND Ground
11
ERX0- Even pixel Negative LVDS differential data input. Channel 0
12
ERX0+ Even pixel Positive LVDS differential data input. Channel 0
13
ERX1- Even pixel Negative LVDS differential data input. Channel 1
14
ERX1+ Even pixel Positive LVDS differential data input. Channel 1
15
ERX2- Even pixel Negative LVDS differential data input. Channel 2
16
ERX2+ Even pixel Positive LVDS differential data input. Channel 2
17
GND Ground
18
ECLK- Even pixel Negative LVDS differential clock input.
19
ECLK+ Even pixel Positive LVDS differential clock input.
20
GND Ground
21
ERX3- Even pixel Negative LVDS differential data input. Channel 3
22
ERX3+ Even pixel Positive LVDS differential data input. Channel 3
23
N.C. No Connection
24
N.C. No Connection
25
GND Ground
26
GND Ground
27
ORX0- Odd pixel Negative LVDS differential data input. Channel 0
28
ORX0+ Odd pixel Positive LVDS differential data input. Channel 0
29
ORX1- Odd pixel Negative LVDS differential data input. Channel 1
30
ORX1+ Odd pixel Positive LVDS differential data input. Channel 1
31
ORX2- Odd pixel Negative LVDS differential data input. Channel 2
32
ORX2+ Odd pixel Positive LVDS differential data input. Channel 2
33
GND Ground
34
OCLK- Odd pixel Negative LVDS differential clock input
35
OCLK+ Odd pixel Positive LVDS differential clock input
36
GND Ground
37
ORX3- Odd pixel Negative LVDS differential data input. Channel 3
38
ORX3+ Odd pixel Positive LVDS differential data input. Channel 3
39
N.C.
40
N.C. No Connection
41
GND Ground
42
GND Ground
43
GND Ground
44
GND Ground
45
GND Ground
46
N.C. No Connection
47
VCC Power input (+12V)
48
VCC Power input (+12V)
49
VCC Power input (+12V)
50
VCC Power input (+12V)
51
No Connection No Connection
No Connection
Preliminary
(2)
(3)(5)
(2)
(4)(6)
(7)
(7)
(7)
(2)
(7)
(7)
(7)
(2)
(2)
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Note (1) LVDS connector pin order defined as follows
Note (2) Reserved for internal use. Please leave it open.
Note (3) Low = Open or connect to GND: VESA Format, High = Connect to +3.3V: JEIDA Format.
Note (4) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with
the frame rate to optimize image quality.
Low = Open or connect to GND, High = Connect to +3.3V
ODSEL Note
L or open Lookup table was optimized for 60 Hz frame rate.
H Lookup table was optimized for 50 Hz frame rate.
Note (5) LVDS signal pin connected to the LCM side has the following diagram. R1 in the system side should
be less than 1K Ohm. (R1 < 1K Ohm)
TCON
TCON
R2
R2
R3
R3
Setting
Setting
Selector (pin7)
R1
R1
System side
Note (6) ODSEL signal pin connected to the LCM side has the following diagram. R1 in the system side
should be less than 1K Ohm. (R1 < 1K Ohm)
15
LCM side
LCM sideSystem side
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Preliminary
TCON
TCON
R2R1
R2R1
Selector (pin9)
Selector (pin9)
System side
System side
Note (7) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and
the second pixel is even pixel
R3
R3
Setting
Setting
LCM side
LCM side
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5.2 BACKLIGHT UNIT
The pin configuration for the housing and the leader wire is shown in the table below.
CN: 51281-1094 (Molex)
or Equivalent
Pin Symbol Feature
1 2 3 4 5 N1 6 N2 7 N3 8 N4 9 N5 10 N6
5.3 CONVERTER UNIT
CN1(Header): Cvilux CI0114M1HR0-LA or Equivalent
VLED+ Positive of LED String
NC NC
Negative of LED String
Preliminary
Pin Symbol Feature
1
2
3
4
5
6
7
8
9
10
11 ERR
12 BLON BL ON/OFF
13 I_PWM
14 E_PWM
VBL +24V
GND GND
Normal (GND)
Abnormal (Open
collector)
Internal PWM
Control
External PWM
Control
Note (1) PIN 13:Internal PWM Control (Use Pin 13): Pin 14 must open. Note (2) PIN 14:External PWM Control (Use Pin 14): Pin 13 must open.
Note (3) Pin 13(I_PWM) and Pin 14(E_PWM) can’t open in same period.
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CN2(Header): 51281-1094 (Molex)
Pin Symbol Feature
1 2 3 4 5 N1 6 N2 7 N3 8 N4 9 N5 10 N6
or Equivalent
VLED+ Positive of LED String
NC NC
Negative of LED String
Preliminary
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5.4 BLOCK DIAGRAM OF INTERFACE
TxIN
ER0-ER7
-
-
OR0-OR7
-
-
Host
Graphics
Controller
CNF1
ERx0+
ERx0-
ERx1+
ERx1-
ERx2+
-
ERx3+
ERx3-
ECLK+
ORx0+
ORx0-
ORx1+
ORx1-
ORx2+
ORx3+
ORx3-
-
-
Preliminary
100
Ө
100pF
100
Ө
100Ө
100
F
Ө
100
100
Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
100
Ө
100pF
100
Ө
100Ө
100
100
100
100 100
100
F
Ө
Ө
100pF
Ө Ө
100pF
Ө
ER0-ER7
-
-
OR0-OR7
-
-
Timing
Controller
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
OCLK+
100
-
100
LVDS R ec e iv e r
Ө
100pF
Ө
ER0~ER7: Even pixel R data
19
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EG0~EG7: Even pixel G data
EB0~EB7: Even pixel B data
OR0~OR7: Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7: Odd pixel B data
DE: Data enable signal
DCLK: Data clock signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the
second pixel is even pixel.
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Ω LE3
5.5 LVDS INTERFACE
VESA LVDS formatΚ(SELLVDS pin=L or open)
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
Current F\FOH
Current F\FOH
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
G3 G2G4
G3 G2G4
G3 G2G4
G3 G2G4
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
Preliminary
ERX3
ERX3
JEDIA LVDS format
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
Κ(SELLVDS pin=H)
Current F\FOH
Current F\FOH
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R2
R2
G5 G4G6
G5 G4G6
G5 G4G6
G5 G4G6
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
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Preliminary
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.
The higher the binary input, the brighter the color. The table below provides the assignment of the color versus data
input.
Data Signal
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Blue
Cyan
Magenta
Yellow
White
Red(0) / Dark
Red(1)
Red(2)
:
:
Red(253)
Red(254)
Red(255)
Green(0) / Dark
Green(1)
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
Note (1) 0: Low Level Voltage, 1: High Level Voltage
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
1
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
0
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
1
0
0
1
1
1
1
0
0
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
1
0
0
:
:
:
:
0
1
0
0
0
1
0
0
0
0
0
0
:
:
:
:
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
:
:
:
:
:
:
1
0
1
0
1
1
1
1
1
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
(Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
F
clkin
(=1/TC)
T
rcl
clkin_mod
F
F
SSM
Fr5 47 50 53 Hz
57 60 63 Hz
F
r6
60 74.25 80 MHz
Ё Ё
F
-2%
clkin
Ё Ё
Ё
Ё Ё
Ё Ё
200 ps (3)
F
+2% MHz
clkin
200 KHz
LVDS
Receiver
Clock
LVDS
Receiver
Data
Vertical
Active
Display
Term
Frequency
Input cycle to cycle jitter Spread spectrum modulation range
Spread spectrum modulation frequency
Setup Time Tlvsu 600
Hold Time Tlvhd 600
Frame Rate
Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th
Preliminary
ps
ps
(4)
(5)
(6)
Ё
Blank Tvb 35 45 55 Th
Horizontal
Active
Display
Term
Note (1) Please make sure the range of pixel clock has follow the below equationΚ
Note (2) This module is operated in DE only mode and please follow the input signal timing diagram below
Total Th 1050 1100 1150 Tc Th=Thd+Thb
Display Thd 960 960 960 Tc
Blank Thb 90 140 190 Tc
Fclkin(max) Fr6 Tv Th
Fr5 Tv Th Fclkin(min)
ѼѼЊ
ЊѼѼ
Ё
Ё
Ё
Κ
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Preliminary
INPUT SIGNAL TIMING DIAGRAM
DE
Th
DCLK
DE
DATA
Tvd
Tv
Tvb
Thd
Valid Display Data (960 clocks)
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
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Preliminary
Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T
14
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
Note (6) (ODSEL) = H/L or open for 50/60Hz frame rate. Please refer to 5.1 for detail information
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Preliminary
6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
0.9V
CC
50ms
50ms
ЉЉЉЉ
T4
0V
0.5
ЉЉЉЉ
T
1
ЉЉЉЉ
ЉЉЉЉ
T
2
ЉЉЉЉ
ЉЉЉЉ
T
3
ЉЉЉЉ
0
0
500ms
10ms
0.1V
CC
2
T
LVDS Signals
0V
Power On
VALI D
0
ЉЉЉЉ
T
7
ЉЉЉЉ
ЉЉЉЉ
T2
T
8
ЉЉЉЉ
T3
T7
0
Option Signals
(SELLVDS, ODSEL)
0.9V
3
T1
T
CC
0.1V
T4
Power Off
8
T
cc
Backlight (Recommended)
ЉЉЉЉ
500ms
100ms
T5
ЉЉЉЉ
T
6
50%
5
T
50%
T
6
Power ON/OFF Sequence
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If
T2<0,that maybe cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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y
(
)
(
)
(2)
(
)
(
)
(4)
k
(5)
y
y
y
(
)
y
(
)
(72)
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Model No.: V315H3
Ω LE3
Preliminary
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12V V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" LED Current IL
25±2
50±10
80±4.8
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item S
Contrast Ratio CR
Response Time
Center Luminance of White L White Variation Cross Tal
Red
Green Color Chromaticity
Viewing Angle
Blue
White
Color Gamut CG
Horizontal
Vertical
mbol Condition Min. Typ. Max. Unit Note
4200
Gray to gray
average
C
δW CT - - 4.0 %
=0°, θY =0°
Rx
R Gx G
Bx
B Wx W
θ
θ
θ
θ
+
­+
-
θ
x
Viewing Angle at Normal Direction
CR20
360
Typ
-0.03
6000
- (8) - ms (3)
450
- - 1.3 - (7)
(0.624) (0.326) (0.316) (0.626) (0.153) (0.050)
0.280
0.290
88 ­88 ­88 ­88 -
Typ
+0.03
o
C
%RH
mA
-
2
cd/m
-
-
-
-
-
-
-
-
%NTSC
Deg. (1)
(6)
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Note (1) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by Autronic Conoscope Cono-80
θX- = 90º
x-
6 o’clock
θ
y-
= 90º
y-
Normal
θx = θy = 0º
θy- θy+
θx
θx+
y+
12 o’clock direction
θ
y+
= 90º
x+
θX+ = 90º
Preliminary
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(7)
Note (3) Definition of Response Time (Gray to Gray switching time):
100%
90%
Optical
Response
10%
0%
T
R
T
F
ime
The driving signal means the signal of Gray 0, 31, 63, 95, 127,159, 191, 223, 255. Gray to gray average time means
the average switching time of gray 0, 31, 63, 95, 127,159, 191, 223, 255 to each other.
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Note (4) Definition of Luminance of White (LC):
Measure the luminance of gray level 255 at center point.
LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA × 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
(0, 0)
Active Area
Gray 0
Y
(D/8,W/2)
A, L
Gray 128
Y
(D/2,7W/8)
A, D
Y
A, U
Y
A, R
(D, W)
(D/2,W /8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
Active Area
Gray 0
Preliminary
Y
(D/2,W /8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D, W
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting backlight for 1 hour in a windless room.
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Note (7) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Vertical Line
W
W/4
W/2
3W /4
Horizontal Line
D
D/4 D/2 3D/4
1 2
: Test Point
5
3 4
X
X=1 to 5
Preliminary
Active Area
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Preliminary
8. DEFINITION OF LABELS
8.1 CMI MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
V315H3 -LE3 Rev. XX
CHI MEI
OPTOELECTRONICS
X X X X X X X Y M D L N N N N
V315H3 -LE3 Rev. XX
CHI MEI
OPTOELECTRONICS
X X X X X X X Y M D L N N N N
E207943
MADE IN TAIWAN
GEMN
E207943
MADE IN TAIWAN
MADE IN CHINA
LEOO(or CAPG or CANO)
RoHS
(a) Model Name: V315H3-LE3
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X
Serial ID includes the information as below:
Day: 1~9, A~Y, for 1
X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMI Internal Use
CMI Internal Use
Revision
CMI Internal Use
(a) Manufactured Date: Year: 0~9, for 2010~2019
Month: 1~9, A~C, for Jan. ~ Dec.
st
to 31st, exclude I ,O, and U.
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 7 LCD TV modules / 1 Box
(2) Box dimensions : 826(L)x376(W)x540(H)mm
(3)
Weight : approximately 31 Kg (7 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
Anti-static Bag
LCD TV Mod ule
Preliminary
Cushion
Carton Label
Cart on
Figure.9-1 packing method
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Sea / Land Transportation (40ft Container)
Corner Protector
PE Sheet
PP Belt
Film
(L1350*50*50mm t=3)
(L1150*W850*140mm)
Air Transportation
Corner Protector
PP Belt
Film
(L1150*W850*140mm)
PE Sheet
(L1080*50*50mm t=5)
Preliminary
(40ft HQ Container)
Corner Protector
Film
Film
(L1150*W850*140mm)
(L700*50*50mm t=5)
PP Belt
PE Sheet
PE Sheet
(L700*50*50mm t=5)
(L1055*50*50mm t=5)
Figure. 9-2 Packing method
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Preliminary
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
10.3 STORAGE PRECAUTIONS
When storing modules as spares for a long time, the following precaution is necessary.
(1) Do not leave the module in high temperature, and high humidity for a long time.
It is highly recommended to store the module with temperature from 0 to 35
condensation.
(
2) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
кat normal humidity without
light.
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11. REGULATORY STANDARDS
11.1 SAFETY
The LCD module should be certified with safety regulations as follows:
Requirement Standard Remark
UL
cUL/CSA
CB
UL60950-1:2006 or Ed.2:2007 UL60065 Ed.7:2007 CAN/CSA C22.2 No.60950-1-03 or 60950-1-07 CAN/CSA C22.2 No.60065-03:2006 + A1:2006 IEC60950-1:2005 / EN60950-1:2006+ A11:2009 IEC60065:2001+ A1:2005 / EN60065:2002 + A1:2006 + A11:2008
Preliminary
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12. MECHANICAL CHARACTERISTIC
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