Cherry Semiconductor CS8161YTVA5, CS8161YTHA5, CS8161YT5, CS8161YDWFR16, CS8161YDWF16 Datasheet
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Features
■ Two regulated outputs
12V ±5.0%; 400mA
5V ±2.0%; 200mA
■ Very low SLEEP mode cur-
rent drain 200nA
■ Fault Protection
Reverse Battery (-15V)
74V Load Dump
-100V Reverse Transient
Short Circuit
Thermal Shutdown
Package Options
TO-220 5 Lead
16 Lead SO Wide
(internally fused leads)
Tab (Gnd)
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CS8161
CS8161
Description
V
IN
V
OUT
2
Gnd
V
OUT
1
ENABLE
+
-
Bandgap
Reference
+
-
+
-
Thermal
Shutdown
Over Voltage
Shutdown
Anti-saturation
and
Current Limit
Anti-saturation
and
Current Limit
Pre-Regulator
Block Diagram
Absolute Maximum Ratings
Input Voltage
Operating Range .....................................................................Ð15V to 26V
Overvoltage Protection.........................................................................74V
Internal Power Dissipation..................................................Internally Limited
Junction Temperature Range.......................................................Ð40¡C +150¡C
Storage Temperature Range....................................................Ð65¡C to +150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only)..........10 sec. max, 260¡C peak
Reflow (SMD styles only)...........60 sec. max above 183¡C, 230¡C peak
ESD (Human Body Model)...........................................................................2kV
The CS8161 is a 12V/5V dual output linear regulator. The 12V ± 5%
output sources 400mA and the 5V
±2.0% output sources 200mA.
The on board ENABLE function
controls the regulatorÕs two outputs. When the ENABLE pin is
low, the regulator is placed in
SLEEP mode. Both outputs are disabled and the regulator draws only
200nA of quiescent current.
The primary output, V
OUT
1
is protected against overvoltage conditions. Both outputs are protected
against short circuit and thermal
runaway conditions.
The CS8161 is packaged in a 5 lead
TOÐ220 with copper tab. The copper tab can be connected to a heat
sink if necessary. It is also available
in a 16 lead SO wide package.
1V
IN
2V
OUT
1
3 Gnd
4 ENABLE
5V
OUT
2
V
IN
V
OUT(1)
NC
V
OUT(2)
SENSE
1
SENSE
1
NC
NC
NC
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
ENABLE
12V, 5V Low Dropout Dual Regulator
with ENABLE
A Company
¨
Rev. 4/5/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
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2
CS8161
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Electrical Characteristics for V
OUT
: 6V ² VIN² 26V, I
OUT
1
= 5mA, I
OUT
2
= 5mA, -40¡C ² TJ² +150ûC,
-40¡C ² TA² +125ûC; unless otherwise specified.
■ Primary Output Stage(V
OUT
1
)
Output Voltage, V
OUT
1
13V²VIN²26V, I
OUT
1
²400mA 11.4 12.0 12.6 V
Dropout Voltage I
OUT
1
=400mA 0.35 0.6 V
Line Regulation 13V²VIN²20V,5mA² I
OUT
<400mA 80 mV
Load Regulation 5mA² I
OUT
1
²400mA, VIN=14V 80 mV
Quiescent Current I
OUT
1
=100mA, No Load on V
OUT
2
812mA
I
OUT
1
=400mA, No Load on V
OUT
2
50 75 mA
Ripple Rejection f=120Hz, I
OUT
=300µA, 42 dB
VIN=15.0VDC, 2V
RMS
Current Limit 0.40 1.0 A
Reverse Polarity V
OUT
1
³-0.6V, 10½ Load -30 -18 V
Input Voltage, DC
Reverse Polarity Input 1% Duty Cycle, t=100ms, V
OUT
³-6V, -80 -50 V
Voltage, Transient 10½ Load
Over-voltage Shutdown 28 34 45 V
Short Circuit Current 700 mA
■ Secondary Output (V
OUT
2
)
Output Voltage, (V
OUT
2
) 6V²VIN²26V, I
OUT
2
²200mA 4.90 5.10 V
Dropout Voltage I
OUT
2
²200mA 0.35 0.60 V
Line Regulation 6V²VIN²26V, 1mA²I
OUT
²200mA 50 mV
Load Regulation 1mA²I
OUT
2
²200mA, 9VIN=14V 50 mV
Quiescent Current I
OUT
2
=50mA 5 10 mA
I
OUT
2
=200mA 20 35 mA
Ripple Rejection f=120Hz; I
OUT
=10mA, 42 dB
VIN=15V, 2V
RMS
Current Limit 200 600 mA
Short Circuit Current 400 mA
■ ENABLE Function (ENABLE)
Input ENABLE Threshold V
OUT
1
Off 1.30 0.80 V
V
OUT
1
On 2.00 1.30 V
Input ENABLE Current V
ENABLE
=5.5V 80 500 µA
V
ENABLE
<0.8V -10 10 µA
■ Other Features
Sleep Mode V
ENABLE
<0.4V 0.2 50 µA
Thermal Shutdown 150 210 ¡C
Quiescent Current in Dropout I
OUT
1
=100mA, I
OUT
2
=50mA 60 mA
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PACKAGE PIN # PIN SYMBOL FUNCTION
Typical Performance Characteristics
Package Pin Description
CS8161
-40 -20 0 20
40
60 80
100
120 140 160
11.750
11.790
11.830
11.870
11.910
11.950
11.990
12.030
12.070
12.110
12.150
Temperature (Deg. C)
Volt 1
VIN = 14V
I
OUT
1
= 5A
Output Voltage vs. Temperature for V
OUT
1
0 50 100 150
200
250 300
350
400 450 500
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
Output Current (mA)
Line Regulation (mV)
-40°C
125°C
25°C
VIN = 13 - 26V
Line Regulation vs. Output Current for V
OUT
1
0 50 100 150
200
250 300
350
400 450 500
-40
-35
-30
-20
-15
-10
-5
0
5
10
15
Output Current (mA)
Load Regulation (mV)
VIN = 14.0V
125°C
25°C
-40°C
Load Regulation vs. Output Current for V
OUT
1
0 50 100 150
200
250 300
350
400 450 500
0
10
20
30
40
50
60
70
80
90
100
Output Current (mA)
Quiescent Current (mA)
-40°C
125°C
25°C
VIN = 14.0V
No Load on V
OUT
2
Quiescent Current vs. Output Current for V
OUT
1
5 L TO-220 16L SO Wide
13V
IN
Supply voltage, usually direct from battery.
26V
OUT
1
Regulated output 12V, 400mA (typ)
3 4,5,12,13,15,16 Gnd Ground connection.
4 8 ENABLE CMOS compatible input pin; switches outputs on and off. When
ENABLE is high V
OUT
1
and V
OUT
2
are active.
510V
OUT
2
Output 5V, 200mA (typ).
N/A 7 Sense
1
Kelvin connection that allows remote sensing of V
OUT
1
for
improved regulation. If remote sensing is not required, connect
to V
OUT
1
.
N/A 11 Sense
2
Kelvin connection that allows remote sensing of V
OUT
2
for
improved regulation. If remote sensing is not required, connect
to V
OUT
2
.
N/A 1,2,9,14 NC No Connection
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