Cherry Semiconductor CS7054YN14 Datasheet

Features

■ 200 mA Peak PWM Gate

Drive Output

■ Patented Voltage

Compensation Circuit

■ 100% Duty Cycle

Capability

■ 5V, ± 3% Linear Reg.

■ Low Current Sleep Mode

■ Overvoltage Protection

■ Over Current Protection

of External MOSFET /
IGBT

■ Output Inhibit

Package Options

CS7054

Low Side PWM FET Controller

CS7054

Description

The CS7054 is a monolithic integrat­ed circuit designed primarily to
control the rotor speed of perma­nent magnet, direct current (DC)
brush motors. It drives the gate of
an N channel power MOSFET or
IGBT with a user-adjustable, fixed
frequency, variable duty cycle,
pulse width modulated (PWM) sig­nal. The CS7054 can also be used to
control other loads such as incan­descent bulbs and solenoids.
Inductive current from the motor or
solenoid is recirculated through an
external diode.

The CS7054 accepts a DC level
input signal of 0 to 5V to control the
pulse width of the output signal.
This signal can be generated by a

potentiometer referenced to the on­chip 5V linear regulator, or a fil­tered 0% to 100% PWM signal also
referenced to the 5V regulator.

The IC is placed in a sleep state by
pulling the CTL lead below 0.5V. In
this mode everything on the chip is
shut down except for the on-chip
regulator and the overall current
draw is less than 275 µA. There are
a number of on-chip diagnostics
that look for potential failure modes
and can disable the external power
MOSFET.

Application Diagram

1

OUTPUT

2

3

4

5

6

7

Gnd

FLT

R

OSC

CTL

NC

14

13

12

11

10

V

CC

PGnd

INH

I

ADJ

V

REG

8

9

C

OSC

I

SENSE+

I

SENSE-

14 Lead PDIP

1

Consult factory for 16 lead SO
wide package.

Cherry Semiconductor Corporation

2000 South County Trail, East Greenwich, RI 02818

Tel: [phone] Fax: [phone]

Email: [e-mail]

Web Site: www.cherry-semi.com

A Company

¨

Rev. 4/21/99

V

42.5mH

BAT

C

C

10K

FLT

OSC

1000mF

R

OSC

105K

P1

.25mF

390pF

100K

1000mF

Input

10K

R

1M

GATE

6

.01mF

C

CS

.022mF

R

CS1

51

R

CS2

51

R

S

51

OUTPUT

Gnd

FLT

C

OSC

R

OSC

CTL

NC

V

PGnd

I

SENSE+

I

SENSE-

V

INH

I

ADJ

REG

10mF

CC

10K

10K

R

SENSE

4mW

MOT+

MOT-

10K

N1

10K

10mF

CS7054

2

Storage Temperature ................................................................................................................................................-65ûC to 150ûC

V

CC

................................................................................................................................................................................-0.3V to 30V

Supply Voltage Range (load dump = 26Vw/series 51½ resistor) VCCPeak Transient Voltage.....................................40V

Input Voltage Range (at any input) ...........................................................................................................................-0.3V to 10V

Maximum Junction Temperature ..........................................................................................................................................150ûC

ESD Capability (Human Body Model) ....................................................................................................................................2kV

Lead Temperature Soldering: Wave Solder (through hole styles only)..........................................10 sec. max, 260¡C peak

Absolute Maximum Ratings

Electrical Characteristics:

8V < VCC< 16V, -40ûC < TA< 125¡C, (unless otherwise specified)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

■ V

CC

Supply

Operating Current Supply 5 10 mA

Quiescent Current VCC= 12V 170 275 µA

Overvoltage Shutdown 18 19.5 21 V

Overvoltage Hysteresis 150 325 500 mV

■ Control (CTL)

Control Input Current CTL = 0V to 5V -2 0.1 2 µA

Sleep Mode Threshold 8% 10% 12% V

REG

Sleep Mode Hysteresis 50 100 150 mV

■ Current Sense

Differential Voltage Sense I

ADJ

=51.2% V

REG

and R

CS1

= 51½ 60.5 79.5 mV

I

ADJ

Input Current I

ADJ

= 0V to 5V -5 0.3 2 µA

■ Linear Regulator V

REG

Output Voltage VCC= 13.2V 4.85 5.00 5.15 V

■ Inhibit

Inhibit Threshold 40% 50% 60% V

REG

Inhibit Hysteresis 150 325 500 mV

■ External Drive (OUTPUT)

Output Frequency R

OSC

= 105k½, C

OSC

= 390pF 17 20 23 kHz

Voltage to Duty Cycle VCC= 13V, CTL = 30% V

REG

26.3 38.5 %

Conversion VCC= 13V, CTL = 70% V

REG

69.5 81.5 %

Output Rise Time VCC= 13V, R

GATE

= 6½, C

GATE

= 5nF .25 1 µs

Output Fall Time VCC= 13V, R

GATE

= 6½, C

GATE

= 5nF .30 1 µs

Output Sink Current VCC= 13V, R

GATE

= 6½, C

GATE

= 5nF 400 mA

Output Source Current VCC= 13V, R

GATE

= 6½, C

GATE

= 5nF 400 mA

Output High Voltage I

OUT

= 1mA V

CC

- 1.7 V

Output Low Voltage I

OUT

= -1mA 1.3 V