Cherry Semiconductor CS3845GDW16, CS3845GDR8, CS3845GDR14, CS3845GD8, CS3845GD14 Datasheet

1

Features

■

Optimized for Offline
Control

■

Temp. Compensated
Oscillator

■

50% Max Duty-cycle Clamp

■ V

REF

Stabilized before

Output Stage is Enabled

■ Low Start-up Current

■ Pulse-by-pulse Current

Limiting

■ Improved Undervoltage

Lockout

■ Double Pulse Suppression

■ 1% Trimmed Bandgap Ref.

■ High Current Totem Pole

Output

Package Options

CS2844/3845 SERIES

Current Mode PWM

Control Circuit

with 50% Max Duty Cycle

CS2844/CS3844
CS2845/CS3845

Description

Block Diagram

Absolute Maximum Ratings

Supply Voltage (ICC<30mA).........................................................................Self Limiting

Supply Voltage (Low Impedance Source) .................................................................30V

Output Current..............................................................................................................±1A

Output Energy (Capacitive Load)................................................................................5µJ

Analog Inputs (V

FB

, V

SENSE

) .........................................................................-0.3V to 5.5V

Error Amp Output Sink Current .............................................................................10mA

Lead Temperature Soldering

Wave Solder (through hole styles only) ...................10 sec. max, 260°C peak

Reflow (SMD styles only) ....................60 sec. max above 183°C, 230°C peak

1

COMP

2
3
4

V

FB

Sense

OSC

V

REF

V

CC

V

OUT

Gnd

8
7
6
5

8 Lead PDIP & SO Narrow

10

7

14

13

12

8

1

2

3

4

5

6

11

9

COMP

NC
V

FB

NC

Sense

NC

OSC

V

REF

NC
V

CC

VCC Pwr
V

OUT

Pwr Gnd

Gnd

14 Lead SO Narrow

The CS3844/45 provides all the neces­sary features to implement off-line
fixed frequency current-mode control
with a minimum number of external
components.

The CS3844 family incorporates a new
precision temperature-controlled oscil­lator to minimize variations in fre­quency. An internal toggle flip-flop,
which blanks the output every other
clock cycle, limits the duty-cycle range
to less than 50%. An undervoltage
lockout ensures that V

REF

is stabilized

before the output stage is enabled. In
the CS2844/CS3844 turn on occurs at
16V and turn off at 10V. In the
CS2845/CS3845 turn on is at 8.4V and
turn off at 7.6V.

Other features include low start-up
current, pulse-by-pulse current limit­ing, and a high-current totem pole out­put for driving capacitive loads, such
as gate of a power MOSFET. The out­put is low in the off state, consistent
with N-channel devices.

16

15

14

13

12

11

11

10

9

1

2

3

4

5

6

7

8

NC

NC

COMP

V

FB

SENSE

OSC

NC
NC

NC
V

REF

V

CC

V

CCPwr

V

O

Gnd
Pwr Gnd

NC

16 Lead SO Wide

Cherry Semiconductor Corporation

2000 South County Trail, East Greenwich, RI 02818

Tel: [phone] Fax: [phone]

Email: [e-mail]

Web Site: www.cherry-semi.com

A Company

®

Rev. 3/17/99

V

Gnd

V

COMP

OSC

Sense

V

Undervoltage Lock-out

CC

16V/10V

(8.4V/7.6V)

Error

Amplifier

Oscillator

2 R

R

CC

34V

FB

­+

2.50V

1V

Set/

5.0 Volt

Reset

Reference

V

REF

R

Undervoltage

Lockout

R

Toggle

Flip-Flop

S

R
PWM

Current

Sensing

Comparator

Latch

NOR

( ) indicates CS-2845/3845

Internal

Bias

V

Pwr

CC

V

REF

V

OUT

Pwr Gnd

2

Electrical Characteristics: -25 ≤ TA ≤ 85˚C for CS2844/2845, 0 ≤TA ≤ 70˚C for CS3844/3845. V

CC

= 15V (Note 1); RT = 10kΩ,

C

T

= 3.3nF for sawtooth mode., unless otherwise stated.

CS2844/CS2845 CS3844/CS3845

PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

CS2844/3845 SERIES

■ Reference Section

Output Voltage TJ=25˚C, I

REF

=1mA 4.95 5.00 5.05 4.90 5.00 5.10 V
Line Regulation 12≤VCC≤25V 6 20 6 20 mV
Load Regulation 1≤I

REF

≤20mA 6 25 6 25 mV
Temperature Stability (Note 2) 0.2 0.4 0.2 0.4 mV/˚C
Total Output Variation Line, Load, Temp. (Note 2) 4.90 5.10 4.82 5.18 V
Output Noise Voltage 10Hz≤ f≤10kHz, TJ=25˚C (Note 2) 50 50 µV
Long Term Stability TA=125˚C, 1000 Hrs. (Note 2) 5 25 5 25 mV
Output Short Circuit TA=25˚C -30 -100 -180 -30 -100 -180 mA

■ Oscillator Section

Initial Accuracy Sawtooth Mode, TJ=25˚C 475257475257kHz
Voltage Stability 12≤VCC≤25V 0.2 1.0 0.2 1.0 %

Temperature Stability Sawtooth Mode T

MIN≤TA≤TMAX

(Note 2) 5 5 %

Amplitude V

OSC

(peak to peak) 1.7 1.7 V

■ Error Amp Section

Input Voltage V

COMP

=2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V
Input Bias Current VFB=0V -0.3 -1.0 -0.3 -2.0 µA
A

VOL

2≤V

OUT

≤4V 65 90 65 90 dB
Unity Gain Bandwidth (Note 2) 0.7 1.0 0.7 1.0 MHz
PSRR 12≤VCC≤25V 60 70 60 70 dB
Output Sink Current VFB=2.7V, V

COMP

=1.1V 2 6 2 6 mA

Output Source Current VFB=2.3V, V

COMP

=5V -0.5 -0.8 -0.5 -0.8 mA

V

OUT

HIGH VFB=2.3V, RL=15kΩ to Gnd 5 6 5 6 V

V

OUT

LOW VFB=2.7V, RL=15kΩ to V

REF

0.7 1.1 0.7 1.1 V

■ Current Sense Section

Gain (Notes 3 & 4) 2.85 3.00 3.15 2.85 3.00 3.15 V/V
Maximum Input Signal V

COMP

=5V (Note 3) 0.9 1.0 1.1 0.9 1.0 1.1 V
PSRR 12≤VCC≤25V (Note 3) 70 70 dB
Input Bias Current V

Sense

=0V -2 -10 -2 -10 µA

Delay to Output TJ=25˚C (Note 2) 150 300 150 300 ns

■ Output Section

Output Low Level I

SINK

=20mA 0.1 0.4 0.1 0.4 V

I

SINK

=200mA 1.5 2.2 1.5 2.2 V

Output High Level I

SOURCE

=20mA 13.0 13.5 13.0 13.5 V

I

SOURCE

=200mA 12.0 13.5 12.0 13.5 V
Rise Time TJ=25˚C, CL=1nF (Note 2) 50 150 50 150 ns
Fall Time TJ=25˚C, CL=1nF (Note 2) 50 150 50 150 ns