A. MAIN AMPLIFIER (U62)(6-8-10 W option) ...................................................................................... ........................... 7
B. MAIN AMPLIFIER (U91)(2.5 W option) .................................................................................................................... 10
C. HEADPHONE AMPLIFIER (U85) ................................................................................................................................ 11
5. POWER STAGE ........................................................................................................................................................... 14
A. Samsung K4B4G1646D (U72) ................................................................................................................................... 31
8.4Gbit (256M x 8 bit) NAND Flash Memory ................................................................................................................ 32
A. MT29F4G08ABAEAWP (U80) ................................................................................................................................... 32
9.16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................................................ 34
A. KH25L1606EM2-12G Macronix SPI Flash (U81) ....................................................................................................... 34
A. CY7C65642 (U73) ..................................................................................................................................................... 36
11. CI Interface ................................................................................................................................................................... 38
A. Main SW update ...................................................................................................................................................... 39
A. No Backlight Problem .............................................................................................................................................. 39
B. CI Module Problem ..........................................................................................................
C. StayIng In Stand-by Mode ........................................................................................................................................ 42
D. IR Problem ................................................................................................................................................................ 43
E. Keypad Touchpad Problems .................................................................................................................................... 43
F. USB Problems ............................................................................................................... ............................................ 44
........................................ 41
G. No Sound Problem ................................................................................................................................................... 44
H. Standby On/Off Problem ......................................................................................................................................... 45
I. No Signal Problem .................................................................................................................................................... 46
14. Service Menu Settings .................................................................................................................................................. 48
15. General Block Diagram ................................................................................................................................................ 53
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1. INTRODUCTION
17MB110 main board is driven by MStar SOC. This IC is a single chip iDTV solution that supports channel
decoding, MPEG decoding, and media-center functionality enabled by a high performance AV CODEC and
CPU.
Key features include:
Combo Front-End Demodulator
A multi standart A/V format decoder
The MACEpro video processor
Home theatre sound processor
Rich internet connectivity and completed digital home network solution
Dual-stream decoder for 3D contents
Mılti-purpose CPU for OS and multimedia
Peripheral and power management
Embedded DRAM
Supported peripherals are:
1 RF input VHF I, VHF III, UHF
1 Satellite input
1 Side AV (CVBS, R/L_Audio)
1 SCART socket(Common)
1 PC input(Common)
3 HDMI input
1 Common interface(Common)
1 Optic/ Coax S/PDIF output
1 Headphone(Common)
2 USB(1x common, 1x optional) and 2x internal USB for Wifi/Bluetooth
1 Ethernet-RJ45
1 External Touchpad/Keyboard/Magic Button
1 DVD(Optional)
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2. T/T2/C/A TUNER (U103)
Description
The Si2151 is Silicon Labs’ sixth-generation hybrid TV tuner supporting all worldwide terrestrial and cable
TV standards. Requiring no external balun, SAW filters, wirewound inductors or LNAs, the Si2151 offers the
lowest-cost BOM for a hybrid TV tuner. Also included are an integrated power-on reset circuit and an option
for single power supply operation. As with prior-generation Silicon Labs TV tuners, the Si2151 maintains very
high linearity and low noise to deliver superior picture quality and a higher number of received stations when
compared to other silicon tuners. The Si2151 offers increased immunity to WiFi and LTE interferance,
eliminating the need for external filtering. For the best performance with next-generation digital TV standards,
such as DVB-T2/C2, the Si2151 delivers industry-leading phase noise performance.
Features
Worldwide hybrid TV tuner
Analog TV: NTSC, PAL/SECAM
Digital TV: ATSC/QAM, DVB-T2/T/C2/C, ISDB-T/C, DTMB
1.7 MHz, 6MHz, 7MHz, 8MHz and 10MHz channel bandwidths
42-1002 MHz frequency range
Industry-leading margin to A/74, NorDig, DTG, ARIB, EN55020, OpenCable™, DTMB
Lowest BOM for a hybrid TV tuner
No balun, SAW filters, or external inductors required
Increased ESD protection on 4pins
Best-in-class real-world reception
Lowest phase noise
High Wi-Fi and LTE immunity
Low power consumption
3.3 V and 1.8 V power supplies
Integrated 1.8 V LDO for 3.3 V single-supply operation
Integrated power-on reset circuit
Standard CMOS process
3x3 mm, 24-pin QFN package
RoHS compliant
3
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Figure: Pin description
4
Table: Pin functions
Page 6
3. S/S2 TUNER & DEMODULATOR (U90) OPTIONAL
Description
The M88RS6000 is highly single-Chip DVB-S2/S receiver. The device is consisting of tuner, a demodulator
and an LNB controller. It is fully compliant with the DVB-S2 and DVB-S standards by supporting QPSK,
(PSK, 16APSK and 32APSK demodulator schemes.)
The tuner is the device an RF signal in the frequency range from 950 MHz to 2150 MHz and down-convert
the signal directly to analog baseband signal, which will be converted to a digital signal in the advanced ADC.
After the ADC, the digital signal will be demodulated in the demodulator, related errors generated during
transmission will be corrected at this stage and finally an MPEG transport stream will be delivered in serial,
parallel or DVB-CI format.
5
Figure: Pin description
Page 7
Features
6
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4. AUDIO AMPLIFIER STAGES
A. MAIN AMPLIFIER (U62)(6-8-10 W OPTION)
Description
AD82587D is a digital audio amplifier capable of driving a pair of 8 ohm, 20W or a single 4ohm, 40W
speaker, both which operate with play music at a 24V supply without external heat-sink or fan requirement.
Using I2C digital control interface, the user can control AD82587D’s input format selection, mute and
volume control functions. AD82587D has many built-in protection circuits to safeguard AD82587D from
o 256x~1024x Fs for 32kHz / 44.1kHz / 48kHz
o 128x~512x Fs for 64kHz / 88.2kHz / 96kHz
o 64x~256x Fs for 128kHz /176.4kHz/192kHz
Supply voltage
o 3.3V for digital circuit
o 10V~26V for loudspeaker driver
Loudspeaker output power for Stereo@ 24V
o 10W x 2ch into 8_ @ 0.16% THD+N
o 15W x 2ch into 8_ @ 0.18% THD+N
o 20W x 2ch into 8_ @ 0.24% THD+N
Loudspeaker output power for Mono@ 24V
o 20W x 1ch into 4_ @ 0.17% THD+N
o 30W x 1ch into 4_ @ 0.2% THD+N
o 40W x 1ch into 4_ @ 0.24% THD+N
Sounds processing including:
o Volume control (+24dB~-103dB, 0.125dB/step)
o Dynamic range control
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o Power clipping
o Channel mixing
o User programmed noise gate with hysteresis window
o DC-blocking high-pass filter
Anti-pop design
Short circuit and over-temperature protection
I2C control interface with selectable device address
Internal PLL
LV Under-voltage shutdown and HV Under-voltage
detection
Power saving mode
Dynamic temperature control
8
Figure: Pin description
Page 10
Figure: Functional Block Diagram
Table: Absolute Maximum Ratings
9
Table: Recommended Operating Conditions
Page 11
B. MAIN AMPLIFIER (U91)(2.5 W OPTION)
Description
The AD52010 is a 3.0W stereo, filter-less class-D audio amplifier. Operating with 5.0V loudspeaker driver
supply, it can deliver 3.0W output power into 4 ohm loudspeaker within 10% THD+N or 2.6W at 1% THD+N.
The AD52010 is a stereo audio amplifier with high efficiency and suitable for the notebook computer, and
portable multimedia device.
Features
Supply voltage range: 2.5 V to 5.5 V
Support single-ended or differential analog input
Low Quiescent Current
Low Output Noise
Low shut-down current
Short power-on transient time
Internal pull-low resistor on shut-down pins
Short-circuit protection
Over-temperature protection
Loudspeaker power within 10% THD+N
o 1.78W/ch into 8 ohm loudspeaker
o >3W/ch into 4 ohm loudspeaker
Loudspeaker efficiency
o 93% @ 8 ohm, THD+N=10%
o 85% @ 4 ohm, THD+N=10%
E-TSSOP-14L package
Integrated Feedback Resistor of 300kW
10
Figure: Pin description
Page 12
Table:Pin functions
Table: Recommended operating conditions
C. HEADPHONE AMPLIFIER (U85)
Description
The AD22657B is a 2-Vrms cap-less stereo line driver. The device is ideal for single supply electronics.
Cap-less design can eliminate output dc-blocking capacitors for better low frequency response and save cost.
The AD22657B is capable of delivering 2-Vrms output into a 10k ohm load with 3.3V supply. The gain
settings can be set by users from 1V/V to 10V/V externally. The AD22657B has under voltage protection to
prevent POP noise. Build-in shutdown control and de-pop control sequence also help AD22657B to be a pop-
less device.
The AD22657B is available in a 10-pin MSOP package.
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Features
Operation Voltage: 3V to 3.6V
Cap-less Output
o Eliminates Output Capacitors
o Improves Low Frequency Response
o Reduces POP/Clicks
Low Noise and THD
o Typical SNR 107dB
o Typical Vn 7uVrms
o Typical THD+N < 0.02%
Maximum Output Voltage Swing into 2.5k Load
o 2Vrms at 3.3V Supply Voltage
Single-ended Input
External Gain Setting from 1V/V to 10V/V
Fast Start-up Time: 0.5ms
Integrated De-Pop Control
External Under Voltage Protection
Thermal Protection
Less External Components Required
+/-8kV IEC ESD Protection at line outputs
12
Figure: Pin description
Page 14
Table: Pin functions
Table: Recommended operating conditions
13
Page 15
5. POWER STAGE
Power socket is used for taking voltages which are 12V_stby and 24V (VDD_Audio for 10W option). These
voltages are produced in power card. Also socket is used for giving dimming, backlight and stand-by signals
Ultra Low RDS(ON)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
IDSS Specified at Elevated Temperature
Pb−Free Package is Available
Figure: Pin description
16
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Figure: Pin description
TPS54528
Description
The TPS54528 is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54528 enables
system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low
component count, low standby current solution. The main control loop for the TPS54528 uses the D-CAP2™
mode control that provides a fast transient response with no external compensation components. The adaptive
on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode™
operation at light loads. Eco-mode™ allows the TPS54528 to maintain high efficiency during lighter load
conditions. The TPS54528 also has a proprietary circuit that enables the device to adopt to both low equivalent
series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V
and 6.0 V. The device also features an adjustable soft start time. The TPS54528 is available in the 8-pin DDA
package, and designed to operate from –40 C to 85 C.
Features
D-CAP2™ Mode Enables Fast Transient Response
Low Output Ripple and Allows Ceramic Output Capacitor
Wide VIN Input Voltage Range: 4.5 V to 18 V
Output Voltage Range: 0.76 V to 6.0 V
Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications
o 65 mΩ (High Side) and 36 mΩ (Low Side)
High Efficiency, less than 10 μA at shutdown
High Initial Bandgap Reference Accuracy
Adjustable Soft Start
Pre-Biased Soft Start
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650-kHz Switching Frequency (fSW)
Cycle By Cycle Over Current Limit
Auto-Skip Eco-mode™ for High Efficiency at Light Load
Figure: Pin description
Table: Pin functions
RT7278
Description
The RT7278 is a synchronous step down converter with Advanced Constant On-Time (ACOTTM) mode
control. The ACOTTM provides a very fast transient response with few external components. The low
impedance internal MOSFET supports high efficiency operation with wide input voltage range from 4.5V to
17V. The proprietary circuit of the RT7278 enables to support all ceramic capacitors. The output voltage can be
adjustable between 0.8V and 8V. The soft-start is adjustable by an external capacitor.
Features
ACOT
TM
Mode Enables Fast Transient Response
4.5V to 17V Input Voltage Range
3A Output Current
60mΩ Internal Low Site N-MOSFET
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Advanced Constant On-Time Control
Support All Ceramic Capacitors
Up to 95% Efficiency
700kHz Switching Frequency
Adjustable Output Voltage from 0.8V to 8V
Adjustable Soft-Start
Cycle-by-Cycle Current Limit
Input Under Voltage Lockout
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Figure: Pin description
19
Table: Pin functions
Page 21
RT6213
Description
The RT6213A/B is a high-efficiency, monolithic synchronous step-down DC/DC converter that can
deliver up to 3A peak output current from a 4.5V to 18V input supply. The RT6213A/B adopts ACOT
architecture to allow the transient response to be improved and keep in constant frequency. Cycle-by-cycle
current limit provides protection against shorted outputs and soft-start eliminates input current surge during
start-up. Fault conditions also include output under voltage protection, output over current protection, and
thermal shutdown.
Features
Integrated 150m/70m MOSFETs
4.5V to 18V Supply Voltage Range
500kHz Switching Frequency
ACOT Control
0.8V 1.5% Voltage Reference
Internal Start-Up into Pre-biased Outputs
Compact Package: TSOT-23-6 pin
Input Under-Voltage Lockout
Over-Current Protection and Hiccup
20
Figure: Pin description
Page 22
Table: Pin functions
TPS54329
Description
The TPS54329E is an adaptive on-time D-CAP2 mode synchronous buck converter. The TPS54329E
enables system designers to complete the suite of various end-equipment power bus regulators with a cost
effective, low component count, low standby current solution. The main control loop for the TPS54329E uses
the D-CAP2 mode control that provides a fast transient response with no external compensation components.
The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and
Eco-mode™ operation at light loads. Eco-mode™ allows the TPS54329E to maintain high efficiency during
lighter load conditions. The TPS54329E also has a proprietary circuit that enables the device to adopt to both
low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR
ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed
between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54329E is available in
the 8-pin DDA package, and designed to operate from –40°C to 85°C.
Features
D-CAP2™ Mode Enables Fast Transient Response
Low Output Ripple and Allows Ceramic Output Capacitor
Wide V
Input Voltage Range: 4.5 V to 18 V
IN
Output Voltage Range: 0.76 V to 7.0 V
Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications
– 100 mΩ (High Side) and 74 mΩ (Low Side)
High Efficiency, less than 10 µA at shutdown
High Initial Bandgap Reference Accuracy
Adjustable Soft Start
Pre-Biased Soft Start
650-kHz Switching Frequency (f
SW
)
Cycle By Cycle Over Current Limit
Auto-Skip Eco-mode™ for High Efficiency at Light Load
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Figure: Pin description
Table: Pin functions
LM1117
Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current.
It has the same pin-out as National Semiconductor’s industry Standard LM317.
The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V
with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V,
and 5V.
The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to assure output voltage accuracy to within ±1%.
The LM1117 series is available in SOT-223, TO-220, and TO-252 D-PAK packages. A minimum of 10μF
tantalum capacitor is required at the output to improve the transient response and stability.
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Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
Space Saving SOT-223 Package
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range
— LM1117 0°C to 125°C
— LM1117I −40°C to 125°C
Figure: Pin description
APL5910
Description
The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply voltages, one is a control
voltage (VCNTL) for the control circuitry, the other is a main supply voltage (VIN) for power conversion, to
reduce power dissipation and provide extremely low dropout voltage. The APL5910 integrates many functions.
A Power-On- Reset (POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous
operations. The functions of thermal shutdown and current-limit protect the device against thermal and current
over-loads. A POK indicates that the output voltage status with a delay time set internally. It can control other
converter for power sequence. The APL5910 can be enabled by other power systems. Pulling and holding the
EN voltage below 0.4V shuts off the output.
The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an Exposed Pad to
reduce the junction-to-case resistance to extend power range of applications.
Features
Ultra Low Dropout
o 0.12V (Typical) at 1AOutput Current
0.8V Reference Voltage
High Output Accuracy
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o ±1.5%over Line, Load, and Temperature Range
Fast Transient Response
Adjustable Output Voltage
Power-On-Reset Monitoring on Both VCNTL and VIN Pins
Internal Soft-Start
Current-Limit and ShortCurrent-Limit Protections
Thermal Shutdown with Hysteresis
Open-Drain VOUT Voltage Indicator (POK)
Low Shutdown Quiescent Current (< 30mA )
Shutdown/Enable Control Function
Simple SOP-8P Package with Exposed Pad
Lead Free and Green Devices Available (RoHS Compliant)
Figure: Pin description
Table: Pin functions
24
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6. MICROCONTROLLER
A. MSTAR MSD93F3PK2 (U95)
Description
25
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Features
26
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27
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28
Page 30
29
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30
Table: Recommended operating conditions
Page 32
7. 4GB DDR3 SDRAM
A. SAMSUNG K4B4G1646D (U72)
Description
The 4Gb DDR3 SDRAM D-die is organized as a 32Mbit x 16 I/Os x 8banks, device. This synchronous
device achieves high speed double-data-rate transfer rates of up to 2133Mb/sec/pin (DDR3-2133) for general
applications. The chip is designed to comply with the following key DDR3 SDRAM features such as posted
CAS, Programmable CWL, Internal (Self) Calibration, On Die Termination using ODT pin and Asynchronous
Reset . All of the control and address inputs are synchronized with a pair of externally supplied differential
clocks. Inputs are latched at the crosspoint of differential clocks (CK rising and CK falling). All I/Os are
synchronized with a pair of bidirectional strobes (DQS and DQS) in a source synchronous fashion. The address
bus is used to convey row, column and bank address information in a RAS/CAS multiplexing style. The DDR3
device operates with a single 1.5V(1.425V~1.575V)power supply and 1.5V(1.425V~1.575V) VDDQ. The 4Gb
DDR3 D-die device is available in 96ball FBGAs(x16)..
Features
JEDEC standard 1.5V(1.425V~1.575V)
VDDQ = 1.5V(1.425V~1.575V)
400 MHz fCK for 800Mb/sec/pin, 533MHz fCK for 1066Mb/sec/pin, 667MHz fCK for
1333Mb/sec/pin, 800MHz fCK for 1600Mb/sec/pin, 933MHz fCK for 1866Mb/sec/pin, 1066 MHz fCK
8-bit pre-fetch
Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD
= 4 which does not allow seamless read or write [either On the fly using A12 or MRS]
Bi-directional Differential Data-Strobe
Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
On Die Termination using ODT pin
Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE < 95 C
Support Industrial Temp ( -4095C ) - tREFI 7.8us at -40 °C ≤ TCASE ≤ 85°C - tREFI 3.9us at 85 °C
< TCASE ≤ 95°C
Asynchronous Reset
Package : 96 balls FBGA - x16
All of Lead-Free products are compliant for RoHS
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All of products are Halogen-free
Table: Recommended operating conditions
8. 4GBİT (256M X 8 BİT) NAND FLASH MEMORY
A. MT29F4G08ABAEAWP (U80)
Description
Micron NAND Flash devices include an asynchronous data interface for high-performance I/O operations.
These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five
control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional
signals control hardware write protection and monitor device status (R/B#). This hardware interface creates a
low pin-count device with a standard pinout that remains the same from one density to another, enabling future
upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable
signal. A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can
independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred
to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal. For further details, see
Device and Array Organization. This device has an internal 4-bit ECC that can be enabled using the GET/SET
features or by factory (always enabled). See Internal ECC and Spare Area Mapping for ECC for more
o Program page cache mode
o Read page cache mode
o One-time programmable (OTP) mode
o Programmable drive strength
o Two-plane commands
o Multi-die (LUN) operations
o Read unique ID
o Block lock (1.8V only)
o Internal data move
Operation status byte provides software method for detecting
o Operation completion
o Pass/fail condition
o Write-protect status
Ready/Busy# (R/B#) signal provides a hardware method of detecting operation completion
WP# signal: Write protect entire device
First block (block address 00h) is valid when shipped from factory with ECC. For minimum required
ECC, see Error Management.
RESET (FFh) required as first command after power-on
Alternate method of device initialization after power up (contact factory)
Internal data move operations supported within the plane from which data is read
Quality and reliability
o Data retention: JESD47G-compliant; see qualification report
o Endurance: See Qualification Report
Operating voltage range
o VCC: 2.7–3.6V
o VCC: 1.7–1.95V
Operating temperature:
o Commercial: 0°C to +70°C
o Industrial (IT): –40ºC to +85ºC
Package
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o 48-pin TSOP type 1, CPL2
o 63-ball VFBGA
Table: Recommended operating conditions
9. 16M-BIT [16M X 1] CMOS SERIAL FLASH EEPROM
A. KH25L1606EM2-12G MACRONİX SPI FLASH (U81)
Description
The device features a serial peripheral interface and software protocol allowing operation on a simple 3-wire
bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).
Serial access to the device is enabled by CS# input. When it is in Dual Output read mode, the SI and SO pins
become SIO0 and SIO1 pins for data output. The device provides sequential read operation on whole chip.
After program/erase command is issued, auto program/erase algorithms which program/erase and verify the
specified page or sector/block locations will be executed. Program command is executed on byte basis, or page
basis, or word basis for erase command is executes on sector, or block, or whole chip basis. To provide user
with ease of interface, a status register is included to indicate the status of the chip. The status read command
can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security
features enhance the protection and security functions; please see security features section for more details.
When the device is not in operation and CS# is high, it is put in standby mode. The device utilizes
Macronix's proprietary memory cell, which reliably stores memory contents even after typical 100,000
programs and erase cycles.
Features
Single Power Supply Operation
o 2.7 to 3.6 volt for read, erase, and program operations
Serial Peripheral Interface compatible -- Mode 0 and Mode 3
16,777,216 x 1 bit structure or 8,388,608 x 2 bits (Dual Output mode) structure
512 Equal Sectors with 4K byte each
o
Any Sector can be erased individually
32 Equal Blocks with 64K byte each
o
Any Block can be erased individually
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Program Capability
Byte base
o
o
Page base (256 bytes)
Latch-up protected to 100mA from -1V to Vcc +1V
Figure: Pin configuration
Table: Pin description
35
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10. USB INTERFACE
Mstar IC has three input port for USB, therefore internal Bluetooth, internal Wi-Fi interface are combined
with HUB. This property is optional. If Bluetooth and Wi-Fi interfaces are not alined, three USB are connected
directly to main IC.
Figure: USB Block Diagram
A. CY7C65642 (U73)
Description
HX2VL is Cypress’s next generation family of high- performance, very low-power USB 2.0 hub controllers.
HX2VL has integrated upstream and downstream transceivers; a USB serial interface engine (SIE); USB hub
control and repeater logic; and transaction translator (TT) logic. Cypress has also integrated external
components such as voltage regulator and pull-up/pull-down resistors, reducing the overall BOM required to
implement a USB hub system. The CY7C65642 is a part of the HX2VL portfolio with four downstream ports
and an independent TT dedicated for each downstream port. This device option is for low-power but high-
performance applications that require up to four downstream ports. The CY7C65642 is available in 48-pin
TQFP and 28-pin QFN package options.
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Features
High-performance, low-power USB 2.0 hub, optimized for low-cost designs with minimum bill-of-material (BOM).
USB 2.0 hub controller
o Compliant with USB2.0 specification
o Up to four downstream ports support
o Downstream ports are backward compatible with FS, LS
o Multiple translators (TT), one per downstream port for maximum performance.
Very low-power consumption
o Supports bus-powered and self-powered modes
o Auto switching between bus-powered and self-powered
o Single MCU with 2K ROM and 64 byte RAM
o Lowest power consumption.
Highly integrated solution for reduced BOM cost
o Internal regulator – single power supply 5 V required.
o Provision of connecting 3.3 V with external regulator.
o Integrated upstream pull-up resistor
o Integrated pull-down resistors for all downstream ports
o Integrated upstream/downstream termination resistors
o Integrated port status indicator control
o 12-MHz +/-500 ppm external crystal with drive level 600uW (integrated PLL) clock input with optional 27/48-MHz
oscillator clock input.
o Internal power failure detection for ESD recovery
Downstream port management
o Support individual and ganged mode power management
o Overcurrent detection
o Two status indicators per downstream port
o Slew rate control for EMI management
Maximum configurability
o VID and PID are configurable through external EEPROM
o Number of ports, removable/non-removable ports are configurable through EEPROM and I/O pin configuration
o I/O pins can configure gang/individual mode power switching, reference clock source and polarity of power switch
enable pin
o Configuration options also available through mask ROM
o Available in space saving 48-pin TQFP (7 × 7 mm) and 28-pin QFN (5 × 5 mm) packages
o
o Supports 0
C to +70oC temperature range
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Figure: Pin configuration
11. CI INTERFACE
17MB110 Digital CI ve Smart Card Interface Block diagram:
38
Figure: CI interface
Page 40
12. SOFTWARE UPDATE
A. MAIN SW UPDATE
In MB110 project, please follow software update procedure:
1. mb110_en.bin, mb110_RomBoot.bin, mb110_PM51.bin and usb_auto_update_G7.txt files should be
copied directly inside of a flash memory (not in a folder).
2. Insert flash memory to the TV when TV is powered off.
3. While pushing the OK button in remote control, power on and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
13. TROUBLESHOOTING
A. NO BACKLIGHT PROBLEM
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
BACKLIGHT_ON/OFF pin should be high when the backlight is ON. Collector pin of Q27 must be low when
the backlight is OFF. If it is a problem, please check Q27 and the panel cables. Also it can be tested in TP87 in
main board.
Dimming pin should be high or square wave in open position. If it is low, please check S248 for Mstar
side and panel or power cables, connectors.
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Backlight power supply should be in panel specs. Please check Q43, shown below; also it can be checked
TP65.
STBY_ON/OFF should be low for TV on condition, please check Q36’s collector.
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B. CI MODULE PROBLEM
Problem: CI is not working when CI module inserted.
Possible causes: Supply, suply control pin, detects pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin
should be low.
Please check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low please check CI connector pins, CI module pins.
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C. STAYING IN STAND-BY MODE
Problem: Staying in stand-by mode, no other operation.
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When
there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set
and control voltage points with a multimeter to find the shorted voltage to ground.
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D. IR PROBLEM
Problem: LED or IR not working
Check LED card supply on MB110 chasis.
E. KEYPAD TOUCHPAD PROBLEMS
Problem: Keypad or Touchpad is not working
Check keypad supply on MB110.
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F. USB PROBLEMS
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
G. NO SOUND PROBLEM
Problem: No audio at main TV speaker outputs.
Check supply voltages of 12V_VCC, VDD_AUDIO and 3V3_AMP with a voltage-meter. There may be a
problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are
automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
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H. STANDBY ON/OFF PROBLEM
Problem: Device can not boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a
problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via
Teraterm. These printouts may give a clue about the problem. You can use Scart-1 for terraterm connection.
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I. NO SIGNAL PROBLEM
Problem: No signal in DVB-T/T2/C mode.
Check tuner supply voltage; 3V3_TUNER. Check tuner options are correctly set in Service menu. Check AGC
voltage at IF_AGC pin of tuner.
Problem: No signal or Low signal in DVB-S/S2 mode.
Check signal cables and LNB voltage, if there is no problem, check RS6000 supply voltages;
3V3_SAT_VDDA1, 3V3_SAT_VDDA, 3V3_SAT_VDD and 1V3_SAT_VCC.
If the above measurements are OK, then measure the voltage from the PIN1 of U90.
If the PIN1 voltage is equal to 0V, please check i2c waveforms and software. If the PIN1 voltage is lower than
1V(e.g: 0.8Vor 0.3V), change the U90 with a new part.
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14. SERVICE MENU SETTINGS
In order to reach service menu, first Press “MENU” buton, then write “4725” by uisng remote controller.
You can see the service menu main screen below. You can check SW releases by using this menu. In addition,
you can make changes on video, audio etc. by using video settings, audio settings titles.