CHASSIS universal (ШАСI унiверсальні) Service manual СТРОКА aaa, ddd, hhh, rrr, vvv 3849 Service manual & schematics
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MB130 IDTV
SERVICE MANUAL
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Table of Contents
1. INTRODUCTION .......................................................................................................................................................... 3
A. General Block DIagram .............................................................................................................................................. 4
B. Placement of Blocks ................................................................................................................................................... 5
2. T/T2/C/A TUNER (U118) .............................................................................................................................................. 6
3. S/S2 TUNER (U116) OPTIONAL ................................................................................................................................. 8
4. AUDIO AMPLIFIER STAGES ...................................................................................................................................... 9
A. MAIN AMPLIFIER (U123) (8W/10W/12W options) .................................................................................................. 10
B. HEADPHONE AMPLIFIER (U120) .............................................................................................................................. 12
C. SCART AUDIO AMPLIFIER (U119) ............................................................................................................................. 13
5. POWER STAGE ........................................................................................................................................................... 14
A. FDC642P ................................................................................................................................................................... 16
B. NTGS3446 ................................................................................................................................................................ 16
C. RT7278G ................................................................................................................................................................... 18
D. TPS563200 ............................................................................................................................................................... 20
E. TPS54821 ................................................................................................................................................................. 22
F. AP2111 ..................................................................................................................................................................... 24
6. MICROCONTROLLER ............................................................................................................................................... 25
A. MSTAR G10 MSD95PMVW4 (U114) ........................................................................................................................ 25
7. 2GB DDR3 SDRAM .................................................................................................................................................... 33
A. Hynix H5TQ2G63GFR-TEC (U113-U110) .................................................................................................................. 33
8. 2GBIT - 4GBIT(CONNECTED OPTION) (256M X 8 BIT) NAND FLASH MEMORY .......................................... 34
A. MT29F2G08ABAEAWP (U105) ................................................................................................................................. 34
9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................................................ 36
A. KH25L1606EM2-12G Macronix SPI Flash (U115) ..................................................................................................... 36
10. USB INTERFACE ........................................................................................................................................................ 37
A. USB POWER SWITCH TPS2553-1 (U109-U117-U122) ............................................................................................. 38
11. CI INTERFACE ............................................................................................................................................................ 38
12. SOFTWARE UPDATE ................................................................................................................................................ 39
A. Main Software Update ............................................................................................................................................. 39
13. TROUBLESHOOTING ................................................................................................................................................ 39
A. No Backlight Problem .............................................................................................................................................. 39
B. CI Module Problem .................................................................................................................................................. 42
C. Staying In Stand-by Mode ........................................................................................................................................ 43
D. IR Problem ................................................................................................................................................................ 43
E. Keypad Touchpad Problems .................................................................................................................................... 44
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F. USB Problems ............................................................................................................... ............................................ 44
G. No Sound Problem ................................................................................................................................................... 45
H. Standby On/Off Problem ......................................................................................................................................... 46
İ. No SIgnal Problem ........................................................................................................... ......................................... 46
14. SERVICE MENU SETTINGS ..................................................................................................................................... 48
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1. INTRODUCTION
17MB130 main board is driven by MStar SOC. This IC is a single chip iDTV solution that supports channel
decoding, MPEG decoding, and media-center functionality enabled by a high performance AV CODEC and
CPU.
This board can be driven just 50Hz UHD panels.
Key features include:
Combo Front-End Demodulator
A multi standart A/V format decoder
The MACEpro video processor
Home theatre sound processor
Rich internet connectivity and completed digital home network solution
Dual-stream decoder for 3D contents
Mılti-purpose CPU for OS and multimedia
Peripheral and power management
Embedded DRAM (for connected option)
Supported peripherals are:
1 RF input VHF I, VHF III, UHF
1 Satellite input
1 Side AV (CVBS, R/L_Audio)
1 SCART socket(Common)
1 Slim SCART socket (Optional)
1 YPbPr (from VGA with special cable) (Optional)
1 PC input(Common)
st
3 HDMI input (with ARC option from 1
1 Common interface(Common)
1 Optic/ Quax S/PDIF output
1 Headphone(Common)
2 USB(1X Side Common, 1X Side Optional) and 2x internal USB for Wifi/Bluetooth
1 Ethernet-RJ45
input)
1 3way/External Touchpad/Tact Switch (Common)
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A. GENERAL BLOCK DIAGRAM
5V_VCC
12V_VCC
H/V
Selection
DISEQC
22kHz
LNBP
TI
TPS65233
SYS_SCL
SYS_SDA
LNB_SUP
3V3_VCC
RF
CI SOCKET
DVBS/S2
SAT TUNER
Montage
M88TS2022
ResetN
F
R
3V3_VCC
TUNER
Si2151
SYS_SCL
SYS_SDA
T
E
K
C
O
S
VbyONE
/
S
D
V
L
s
n
i
p
1
5
C
I
_
T
S
_
CI_TS_IN
D
IGI
T
AL/
PANEL_VCC
I
N
T
A
S
1V1_VCC
ANA
P
D
_
T
N
B
D
_
_
B
T
S
B
U
_
B
S
U
/
I
LOG
PWM
BACKLIGHT_DIM
3D_SYNC_OUT
KEYBOARD
SPI
TOUCHPAD
UART
AMP_RST
1V5_VCC
2Gb DDR3
MEMORY
1V5_VCC
2Gb DDR3
MEMORY
1V5_VCC
ADDRESS DATA
RAM BUS
TS_IN
TS_OUT
TS BLOCK
8 Lane VbyONE
LVDS/VbyONE
PWR
3
DATA
DIGITAL SAT
DEMOD
Q
_IF
ET_T
ET_R
4
ETHERNET
ANALOG
DEMOD
2.0
USB 3
PWR
USB 4
2.0
P
D
_
I
F
I
W
_
B
S
U
DIGITAL/
USB 2
2.0
P
N
D
_
I
F
I
W
_
B
S
U
D
_
2
B
S
U
USB 1
2.0
N
D
_
2
B
S
U
P
N
D
D
_
_
1
1
B
B
S
S
U
U
HDMI 1 HDMI 2
V
5
I
M
D
H
C
C
R
2
I
A
Mstar
G10V
23X23
S
C
D
E
M
C
T
HDMI 3
V
5
S
I
C
D
2
M
I
M
D
T
H
V
5
S
I
D
C
M
2
M
I
D
T
H
HP_AMP_MUTE
PC_SCL/SDA
PCM_PWR_CTRL
STBY_ON/OFF
RX/TX_HOTEL
FLASH_WPN1
USB-ENABLE
TUNER_RESET
GPIOs
PWR
1
3V3_STBY
HP_DETECT
3D_ENABLE
AUX_RESET
TUN_RESET
HDMI DET
PROTECT
BACKLIGHT
PANEL_VCC
RESET_HUB
NAND
AUDIO I/OsVIDEO I/Os
XTAL
PWR
STBY
SPI
FLASH
SC_AUD_R/L_IN
2
GPIOs
STBY_ON/OFF
HP_RIGHT
HP_LEFT
SAV_R_IN
SAV_L_IN
SC_L/R
SC_CVBS
SC_RGB
SC_CVBS
DVD_CVBS
IN
VGA_RGB
VGA HS/VS
3V3_VCC
Keyboard
IR – Led1/2
KEYBOARD
VGA
HDMI
12V/24V_VCC
I2S
SYS_SCL
SYS_SDA
ESMT
AD82587D
2X6W/8W/
10W AMP
Speak. Connector
s
R
E
K
A
E
P
S
HPHONE
AD22657B
HP AMP.
HP_OUT_R
HP_OUT_L
SAV AUDIO IN
SPDIF_OUT
AMP
SC_L/R
OUT
OUT
IN
BAV_CVBS
IN
SCART
SPDIF OUT
SC Pin8
SC FB
SAV CVBS IN
VGA
24 MHz
Keyboard Socket
Led/IR Socket
MX25l512
HDMI 1
HDMI 2
HDMI 3
NAND FLASH
512MB
USB2
5V_VCC
USB1
5V_VCC
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B. PLACEMENT OF BLOCKS
Power
Con.
L
V
D
S
C
O
n
RJ45
RAM
MAIN
IC
HDMI
Connectors
CI
Sat. Tuner
SPI
FLAS
H
USB
SAV
5
Keyb
oard
CON
S/PDIF
LED
CON
VGA
SCART
Audio
Amp
Tuner
SPEAK.
CON
Internal
Wifi& BT
Connector
HP
3-WAY
SW
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2. T/T2/C/A TUNER (U118)
Description:
The Si2151 is Silicon Labs' sixth-generation hybrid TV tuner supporting all worldwide terrestrial and cable
TV standards. Requiring no external balun, SAW filters, wirewound inductors or LNAs, the Si2151 offers the
lowest-cost BOM for a hybrid TV tuner. Also included are an integrated power-on reset circuit and an option
for single power supply operation. As with prior-generation Silicon Labs TV tuners, the Si2151 maintains very
high linearity and low noise to deliver superior picture quality and a higher number of received stations when
compared to other silicon tuners. The Si2151 offers increased immunity to WiFi and LTE interference,
eliminating the need for external filtering. For the best performance with next-generation digital TV standards,
such as DVB-T2/C2, the Si2151 delivers industry-leading phase noise performance.
Features:
Worldwide hybrid TV tuner
o Analog TV: NTSC, PAL/SECAM
o Digital TV: ATSC/QAM, DVBT2/T/C2/C, ISDB-T/C, DTMB
1.7 MHz, 6 MHz, 7 MHz, 8 MHz, and 10 MHz channel bandwidths
42-1002 MHz frequency range
Industry-leading margin to A/74, NorDig, DTG, ARIB, EN55020, OpenCable™,DTMB
Lowest BOM for a hybrid TV tuner
o No balun, SAW filters, or external inductors required
o Increased ESD protection on 4pins
Best-in-class real-world reception
o Lowest phase noise
o High Wi-Fi and LTE immunity
Low power consumption
o 3.3 V and 1.8 V power supplies
o Integrated 1.8 V LDO for 3.3 V singlesupply operation
Integrated power-on reset circuit
Standard CMOS process
3x3 mm, 24-pin QFN package
RoHS compliant
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Figure 1.1 Si2151 Pin description
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3. S/S2 TUNER (U116) OPTIONAL
Description
Figure: Pin description
Features
Single-Chip tuner
Compliant with DVB-S2 and ABS-S standards
Support PSK, (PSK and 16APSK
Direct-conversion from L-band to baseband
Symbol rate:1 to 45 Msybol/s
Integrated VCOs and PLL, with on-chip inductors varactors and loop filter
Integrated RF AGC for optimal performance
Integrated baseband DC offset cancellation removes external loop filters
Excellent immunity to strong adjacent undersired channels
Integrated clock driver provides auxiliary divided clock output for other devices
Selectable RF bypass
Support sleep mode
2-wire serial bus with 3.3V compatible logic levels
Power supply+3.3V
28-pin QFN package
RoSH compliant
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Block Diagram
4. AUDIO AMPLIFIER ST AGES
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Figure: The block diagram of the audio part
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A. MAIN AMPLIFIER (U123) (8W/10W/12W OPTIONS)
Description
AD82587D is a digital audio amplifier capable of driving a pair of 8 ohm, 20W or a single 4 ohm, 40W
speaker, both which operate with play music at a 24V supply without external heat-sink or fan requirement.
Using I2C digital control interface, the user can control AD82587D’s input format selection, DRC (dynamic
range control), mute and volume control functions. AD82587D has many built-in protection circuits to
safeguard AD82587D from connection errors.
Features
16/18/20/24-bit input with I
PSNR & DR(A-weighting) Loudspeaker: 97dB (PSNR), 105dB (DR) @ 24V
Multiple sampling frequencies (Fs)
32kHz / 44.1kHz / 48kHz and
64kHz / 88.2kHz / 96kHz and
128kHz/176.4kHz/192kHz
System clock = 64x, 128x, 256x, 384x, 512x, 768x,1024x Fs
256x~1024x Fs for 32kHz / 44.1kHz / 48kHz
128x~512x Fs for 64kHz / 88.2kHz / 96kHz
64x~256x Fs for 128kHz /176.4kHz/192kHz
Supply voltage
3.3V for digital circuit
10V~26V for loudspeaker driver
Loudspeaker output power for Stereo@ 24V
10W x 2ch into 8_ @ 0.16% THD+N
15W x 2ch into 8_ @ 0.18% THD+N
20W x 2ch into 8_ @ 0.24% THD+N
Loudspeaker output power for Mono@ 24V
20W x 1ch into 4_ @ 0.17% THD+N
30W x 1ch into 4_ @ 0.2% THD+N
40W x 1ch into 4_ @ 0.24% THD+N
Sounds processing including:
Volume control (+24dB~-103dB, 0.125dB/step)
Dynamic range control
Power clipping
Channel mixing
User programmed noise gate with hysteresis window
DC-blocking high-pass filter
Anti-pop design
Short circuit and over-temperature protection
I2C control interface with selectable device address
Internal PLL
LV Under-voltage shutdown and HV Under-voltage
detection
Power saving mode
Dynamic temperature control
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S, Left-alignment and Right-alignment data format
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Figure 3.2: Pin description
Figure 3.3: Functional Block Diagram
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Table3.1: Absolute Maximum Ratings
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Table3.2: Recommended Operating Conditions
B. HEADPHONE AMPLIFIER (U120)
Description
The AD22657B is a 2-Vrms cap-less stereo line driver. The device is ideal for single supply electronics.
Cap-less design can eliminate output dc-blocking capacitors for better low frequency response and save cost.
The AD22657B is capable of delivering 2-Vrms output into a 10k ohm load with 3.3V supply. The gain
settings can be set by users from 1V/V to 10V/V externally. The AD22657B has under voltage protection to
prevent POP noise. Build-in shutdown control and de-pop control sequence also help AD22657B to be a popless device.
The AD22657B is available in a 10-pin MSOP package.
Features
Operation Voltage: 3V to 3.6V
Cap-less Output
o Eliminates Output Capacitors
o Improves Low Frequency Response
o Reduces POP/Clicks
Low Noise and THD
o Typical SNR 107dB
o Typical Vn 7uVrms
o Typical THD+N < 0.02%
Maximum Output Voltage Swing into 2.5k Load
o 2Vrms at 3.3V Supply Voltage
Single-ended Input
External Gain Setting from 1V/V to 10V/V
Fast Start-up Time: 0.5ms
Integrated De-Pop Control
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External Under Voltage Protection
Thermal Protection
Less External Components Required
+/-8kV IEC ESD Protection at line outputs
Figure: Pin description
Table: Pin functions
Table: Recommended operating conditions
C. SCART AUDIO AMPLIFIER (U119)
AD22657B is used for scart audio amplifier, as well.
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5. POWER STAGE
Figure: Power Block Diagram
Figure: Power Socket and Power Options
Power socket is used for taking voltages which are 24V_VCC, 12V_STBY and 5V_STBY. These voltages
are produced in power card. Also socket is used for giving dimming, backlight and standby signals with power
card. Power socket pinning is shown in above figure.
24V_VCC goes directly to the audio part. 12V_STBY is converted several different voltages on the
mainboard which are shown in below figure.
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List of the components:
SW-1(Q105) → FDC642P
SW-2(Q100) → NTGS3446
DC-DC-1(U101) → RT7278G
DC-DC-2(U100) → TPS563200
DC-DC-3(U107) → TPS563200
DC-DC-4(U103) → TPS54821
DC-DC-5(U104) → TPS563200
LDO-1(U112) → AP2111H
Figure: Power Block Diagram
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A. FDC642P
Figure: Pin description
B. NTGS3446
Features
Ultra Low R
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
IDSS Specified at Elevated Temperature
Pb−Free Package is Available
APPLICATIONS
Power Management in portable and battery−powered products, i.e. computers, printers, PCMCIA cards,
cellular and cordless
Lithium Ion Battery Applications
Notebook PC
DS(on)
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Figure 4.7: Pin description
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Table 4.8: Maximum ratings
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C. RT7278G
Figure: Pin Assignment
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D. TPS563200
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Figure: Pin Assignment
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Electrical Characteristics
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E. TPS54821
General Description
The TPS54821 in thermally enhanced 3.5 mm x 3.5 mm QFN package is a full featured 17 V, 8 A
synchronous step down converter which is optimized for small designs through high efficiency and integrating
the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which
reduces component count, and by selecting a high switching frequency, reducing the inductor's footprint. The
output voltage startup ramp is controlled by the SS/TR pin which allows operation as either a stand alone power
supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and the
open drain power good pins. Cycle by cycle current limiting on the high-side FET protects the device in
overload situations and is enhanced by a low-side sourcing current limit which prevents current runaway. There
is also a low-side sinking current limit which turns off the low-side MOSFET to prevent excessive reverse
current. Hiccup protection will be triggered if the overcurrent condition has persisted for longer than the preset
time. Thermal hiccup protection disables the device when the die temperature exceeds the thermal shutdown
temperature and enables the part again after the built-in thermal shutdown hiccup time.
Features
Integrated 26 mΩ / 19 mΩ MOSFETs
Split Power Rail: 1.6 V to 17 V on PVIN
200 kHz to 1.6 MHz Switching Frequency
Synchronizes to External Clock
0.6V ±1% Voltage Reference Over Temperature
Low 2 μA Shutdown Quiescent Current
Monotonic Start-Up into Pre-biased Outputs
–40°C to 125°C Operating Junction Temperature Range
Adjustable Input Undervoltage Lockout
Adjustable Slow Start/Power Sequencing
Power Good Output Monitor for Undervoltage and Overvoltage
Adjustable Input Undervoltage Lockout
APPLICATIONS
Digital TV Power Supplies
Set Top Boxes
Blu-ray DVDs
Home Terminals
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Table 4.5: Recommended operating conditions
Figure 4.5 : Pin Description
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Table 4.6: Pin functions.
F. AP2111
General Description
The AP2111 is CMOS process low dropout linear regulator with enable function, the regulator delivers a
guaranteed 600mA (Min) continuous load current. The AP2111 provides 1.2V, 1.8V, 2.5V, 3.3V, 4.8V
regulated output and 0.8V to 5V adjustable output, and provides excellent output accuracy 1.5%, it is also
provides a excellent load regulation, line regulation and excellent load transient performance due to very fast
loop response. The AP2111 has built-in auto discharge function. The AP2111 features low power consumption.
The AP2111 is available in SOIC-8, PSOP-8 SOT-223 and SOT-23-5 packages.
Features
Output Voltage Accuracy: ±1.5%
Output Current: 600mA (Min)
Foldback Short Current Protection: 50mA
Enable Function to Turn On/Off VOUT
Low Dropout Voltage (3.3V):
250mV (Typ) @ IOUT=600mA
Excellent Load Regulation: 0.2%/A (Typ)
Excellent Line Regulation: 0.02%/V (Typ)
Low Quiescent Current: 55μA (Typ)
Low Standby Current: 0.01μA (Typ)
Low Output Noise: 50μVRMS
PSRR: 65dB @ f=1kHz, 65dB @ f=100Hz
OTSD Protection
Stable with 1.0μF Flexible Cap: Ceramic, Tantalum and Aluminum Electrolytic
Operating Temperature Range: -40°C to 85°C
ESD: MM 400V, HBM 4000V
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6. MICROCONTROLLER
A. MSTAR G10 MSD95PMVW4 (U114)
Description
Features
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Table: Recommended operating condition
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7. 2GB DDR3 SDRAM
A. HYNIX H5TQ2G63GFR-TEC (U113-U110)
Description
The H5TQ2G63GFR is a 2,147,483,648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM,
ideally suited for the main memory applications which requires large memory density and high bandwidth.
Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of
the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the
CK), Data, Data strobes and Write data masks inputs are sam-pled on both rising and falling edges of it. The
data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
Features
VDD=VDDQ=1.5V +/- 0.075V
Fully differential clock inputs (CK, CK) operation
Differential Data Strobe (DQS, DQS)
On chip DLL align DQ, DQS and DQS transition with CK transition
DM masks write data-in at the both rising and falling edges of the data strobe
All addresses and control inputs except data, data strobes and data masks latched on the rising edges of
the clock
Programmable CAS latency 6, 7, 8, 9, 10, 11, 12 and 13 supported
Programmable additive latency 0, CL-1, and CL-2 supported
Programmable CAS Write latency (CWL) = 5, 6, 7, 8, 9, 10
Programmable burst length 4/8 with both nibble sequential and interleave mode
BL switch on the fly
8banks
Average Refresh Cycle (Tcase 0
o
o 7.8 μs at 0
o 3.9 μs at 85
C ~ 85oC
o
C ~ 95oC
o
C ~ 95oC)
Auto Self Refresh supported Driver strength selected by EMRS
JEDEC standard 96ball FBGA(x16) Asynchronous RESET pin supported
Driver strength selected by EMRS TDQS (Termination Data Strobe) supported (x8 only)
Dynamic On Die Termination supported 8 bit pre-fetch
Asynchronous RESET pin supported
ZQ calibration supported
Write Levelization supported
On Die Thermal Sensor supported
8 bit pre-fetch
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Memory Configuration of MB130
SoC
Connected
Non-Connected
Name RAM Internal RAM external
G10 2X2GBit 2X4Gbit 4Gbit 2MByte
G10V NA 2X2Gbit 2Gbit 2MByte
Memory Config
NAND
Flash
SPI
Flash
8. 2GBIT - 4GBIT(CONNECTED OPTION) (256M X 8 BIT) NAND FLASH
MEMORY
A. MT29F2G08ABAEAWP (U105)
Description
Micron NAND Flash devices include an asynchronous data interface for high-performance I/O operations.
These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five
control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional
signals control hardware write protection and monitor device status (R/B#). This hardware interface creates a
low pin-count device with a standard pinout that remains the same from one density to another, enabling future
upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable
signal. A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can
independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred
to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal. For further details, see
Device and Array Organization. This device has an internal 4-bit ECC that can be enabled using the GET/SET
features or by factory (always enabled). See Internal ECC and Spare Area Mapping for ECC for more
information.
Features
Open NAND Flash Interface (ONFI) 1.0-compliant
Single-level cell (SLC) technology
Organization
o Page size x8: 2112 bytes (2048 + 64 bytes)
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o Page size x16: 1056 words (1024 + 32 words)
o Block size: 64 pages (128K + 4K bytes)
o Plane size: 2 planes x 1024 blocks per plane
o Device size: 2Gb: 2048 blocks
Asynchronous I/O performance
t
o
RC/tWC: 20ns (3.3V), 25ns (1.8V)
Array performance
o Read page: 25μs
o Program page: 200μs (TYP: 1.8V, 3.3V
o Erase block: 700μs (TYP)
Command set: ONFI NAND Flash Protocol
Advanced command set
o Program page cache mode
o Read page cache mode
o One-time programmable (OTP) mode
o Two-plane commands
o Interleaved die (LUN) operations
o Read unique ID
o Block lock (1.8V only)
o Internal data move
Operation status byte provides software method for detecting
o Operation completion
o Pass/fail condition
o Write-protect status
Ready/Busy# (R/B#) signal provides a hardware method of detecting operation completion
WP# signal: Write protect entire device
First block (block address 00h) is valid when shipped from factory with ECC. For minimum required
ECC, see Error Management.
Block 0 requires 1-bit ECC if PROGRAM/ERASE cycles are less than 1000
RESET (FFh) required as first command after poweron
Alternate method of device initialization (Nand_Init) after power up (contact factory)
Internal data move operations supported within the plane from which data is read
Quality and reliability
o Data retention: 10 years
Operating voltage range
o VCC: 2.7–3.6V
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o VCC: 1.7–1.95V
Operating temperature:
o Commercial: 0°C to +70°C
o Industrial (IT): –40ºC to +85ºC
Package
o 48-pin TSOP type 1, CPL63-ball VFBGA
Table: Recommended operating conditions
9. 16M-BIT [16M X 1] CMOS SERIAL FLASH EEPROM
A. KH25L1606EM2-12G
Description
The device features a serial peripheral interface and software protocol allowing operation on a simple 3-wire
bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).
Serial access to the device is enabled by CS# input. When it is in Dual Output read mode, the SI and SO pins
become SIO0 and SIO1 pins for data output. The device provides sequential read operation on whole chip.
After program/erase command is issued, auto program/erase algorithms which program/erase and verify the
specified page or sector/block locations will be executed. Program command is executed on byte basis, or page
basis, or word basis for erase command is executes on sector, or block, or whole chip basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The
status read command can be issued to detect completion status of a program or erase operation via WIP bit.
Advanced security features enhance the protection and security functions; please see security features section
for more details.
When the device is not in operation and CS# is high, it is put in standby mode. The device utilizes
Macronix's proprietary memory cell, which reliably stores memory contents even after typical 100,000
programs and erase cycles.
MACRONIX SPI FLASH (U115)
Features
Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations
o
Serial Peripheral Interface compatible -- Mode 0 and Mode 3
16,777,216 x 1 bit structure or 8,388,608 x 2 bits (Dual Output mode) structure
512 Equal Sectors with 4K byte each
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o Any Sector can be erased individually
32 Equal Blocks with 64K byte each
o
Any Block can be erased individually
Program Capability
o Byte base
o Page base (256 bytes)
Latch-up protected to 100mA from -1V to Vcc +1V
Figure: Pin configuration
10. USB INTERFACE
Table: Pin description
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A. USB POWER SWITCH TPS2553-1 (U109-U117-U122)
11. CI INTERFACE
17MB130 Digital CI ve Smart Card Interface Block diagram:
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Figure: CI interface
12. SOFTWARE UPDATE
A. MAIN SOFTWARE UPDATE
In MB98 project, please follow software update procedure:
1. mb130_en.bin, mb130_RomBoot.bin, mb130_PM51.bin and usb_auto_update_G10.txt documents should
be copied directly inside of a flash memory (not in a folder).
2. Insert flash memory to the TV when TV is powered off.
3. While pushing the OK button in remote control, power on and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
13. TROUBLESHOOTING
A. NO BACKLIGHT PROBLEM
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible causes: Backlight pin, dimming pin, backlight supply, stby on/off pin
BACKLIGHT_ON/OFF pin should be high when the backlight is ON. Collector pin of Q113 must be low
when the backlight is OFF. If it is a problem, please check Q106. Also it can be tested in TP108 in main board.
Please also check panel cables.
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Dimming pin should be high or square wave in open position. If it is low, please check S122 for Mstar side.
It also can be checked at TP106. Please also check panel or power cables and connectors.
Backlight power supply should be in panel specs. Please check Q124, shown below; also it can be checked
TP112.
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STBY_ON/OFF should be low for TV on condition, please check Q114’s collector.
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B. CI MODULE PROBLEM
Problem: CI is not working when CI module inserted.
Possible causes: Supply, suply control pin, detects pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin
should be low.
Please check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low please check CI connector pins, CI module pins.
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C. STAYING IN STAND-BY MODE
Problem: Staying in stand-by mode, no other operation.
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation.
When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV
set and control voltage points with a multimeter to find the shorted voltage to ground.
D. IR PROBLEM
Problem: LED or IR not working
Check LED card supply on MB98 chasis.
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E. KEYPAD TOUCHPAD PROBLEMS
Problem: Keypad or Touchpad is not working
Check keypad supply on MB130.
F. USB PROBLEMS
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
USB Control is optional, so U109 and U117 may not be added. Check supply voltages only.
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G. NO SOUND PROBLEM
Problem: No audio at main TV speaker outputs.
Check supply voltages of 24V_VCC, VDD_AUDIO and 3V3_AMP with a voltage-meter. There may be a
problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are
automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
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H. STANDBY ON/OFF PROBLEM
Problem: Device cannot boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be
a problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via
Teraterm program. These printouts may give a clue about the problem. You can use Scart-1 for Teraterm
program connection.
İ. NO SIGNAL PROBLEM
Problem: No signal or Low signal in DVB-S/S2 mode.
Check signal cables and LNB voltage, if there is no problem, check M88TS2022 (U116) supply voltages;
3V3_VCC_SAT.
If the above measurements are OK, then measure the voltage from the PIN20 of U116.
If the PIN1 voltage is equal to 0V, please check i2c waveforms and software. If the PIN1 voltage is lower
than 1V(e.g: 0.8Vor 0.3V), change the U116 with a new part.
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14. SERVICE MENU SETTINGS
In order to reach service menu, first Press “MENU” buton, then write “4725” by using remote controller.
You can see the service menu main screen below. You can check SW releases by using this menu. In addition,
you can make changes on video, audio etc. by using video settings, audio settings titles.
Service Menu
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Video Settings
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Audio Settings
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Options 1
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Options 2
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Options 3
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Tuning Settings
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Source Settings
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Diagnostic
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