Champion CM6802IP, CM6802IS Schematics
CM6802
NO B
LEED
ESISTOR
R
G
GENERAL DESCRIPTION
The CM6802 is a green PFC/PWM. It is the new generation
of ML4802, ML4841, ML4801 and ML4824-2. Its system
clock frequency is generated by the external RT and CT,
and then its PWM frequency is 50% of the clock and its
PFC frequency is 25% of the clock. CM6802 is designed to
be pin-pin compatible with CM6800 family, ML4800 family
and ML4824 family. Its PWM (DC to DC section) can be
easily configured to Voltage Mode or Current Mode. The
green mode function can easily be designed so during the
no load condition, its input power can be less than 0.75Watt
without shutting off PFC. Its PFC green mode threshold and
the PWM green mode threshold can separately set by
selecting the proper the RC filter at ISENSE pin (pin3) and
CT on RAMP 1 pin (pin 7). Power Factor Correction (PFC)
allows the use of smaller, lower cost bulk capacitors,
reduces power line loading and stress on the switching
FETs, and results in a power supply that fully compiles with
IEC-1000-3-2 specifications. Intended as a BiCMOS
version of the industry-standard CM6800, CM6802 includes
circuits for the implementation of leading edge, average
current, “boost” type power factor correction and a trailing
edge, pulse width modulator (PWM). Both PFC and PWM
Gate-driver with 0.5A capabilities minimizes the need for
external driver circuits. Low power requirements improve
efficiency and reduce component costs.
An over-voltage comparator shuts down the PFC section in
the event of a sudden decrease in load. The PFC section
also includes peak current limiting and input voltage
brownout protection. The PWM section can be operated in
current or voltage mode, at up to 250kHz, and includes an
accurate 50% duty cycle limit to prevent transformer
saturation.
When RAMP1 is 280KHz, fpfc is 70KHz and fpwm is
140KHz.
REEN
FEATURES
! Patent Number #5,565,761, #5,747,977, #5,742,151,
! fosc=2 x fpwm =4 x fpfc
!
!
! Pin to pin Compatible with CM6800, ML4824 and ML4800
! User Program PFC automatic green mode threshold
! User Program PWM automatic green mode threshold
! Input power less than 0.75Watt without shutting off PFC at
! Additional folded-back current limit for PWM section.
!
! PWM pulse keeping for the green mode
! VIN OK guaranteed turn on PWM at 2.5V instead of 1.5V
!
! Slew rate enhanced transconductance error amplifier for
! Low start-up current (30µA typ.)
! Low operating current (3.0mA type.)
!
! Reduces ripple current in the storage capacitor between the
!
! VCC OVP Comparator will turn off both PFC and PWM
! Low Power Detect Comparator
! Tri-Fault detect to meet UL1950
!
! Current fed gain modulator for improved noise immunity
! Brown-out control, over-voltage protection, UVLO, and soft
24 Hours Technical Support---WebSIM
Champion provides customers an online circuit simulation tool
called WebSIM. You could simply logon our website at
www.champion-micro.com for details.
ODE
M
#5,804,950, #5,798,635
No bleed resistor required
Before the chip wakes up, IAC can start up VCC
(It needs to modify the values of the external component to
work properly).
(patented)
(patented)
no load condition.
23V Bi-CMOS process
Internally synchronized leading edge PFC and trailing edge
PWM in one IC
ultra-fast PFC response
Low total harmonic distortion, high PF
PFC and PWM sections
Average current, continuous or discontinuous boost leading
edge PFC
PWM configurable for current mode or voltage mode
operation
start, and Reference OK
PFC/PWM C
ONTROLLER
C
OMBO
2003/06/25
Preliminary
Champion Microelectronic Corporation Page 1
CM6802
NO B
LEED
ESISTOR
R
G
REEN
M
ODE
PFC/PWM C
ONTROLLER
APPLICATIONS
PIN CONFIGURATION
!
Desktop PC Power Supply
! Internet Server Power Supply
! IPC Power Supply
! UPS
! Battery Charger
! DC Motor Power Supply
! Monitor Power Supply
! Telecom System Power Supply
!
Distributed Power
SOP-16 (S16) / PDIP-16 (P16)
Top View
1
2
3
4
5
6
7
8
IEAO
AC
I
SENSE
I
RMS
V
SS
DC
V
RAMP1
RAMP2
VEAO
V
PFC OUT
PWM OUT
GND
LIMIT
DC I
V
REF
V
16
FB
CC
15
14
13
12
11
10
9
PIN DESCRIPTION
Pin No. Symbol Description
1 IEAO PFC transconductance current error amplifier output 0 4.25 V
Operating Voltage
Min. Typ. Max. Unit
C
OMBO
2 IAC PFC gain control reference input. Before the chip wakes up,
0 1 mA
IAC is connected to VCC. After the chip wakes up, IAC is
3 I
4 V
Current sense input to the PFC current limit comparator -5 0.7 V
SENSE
Input for PFC RMS line voltage compensation 0 6 V
RMS
5 SS Connection point for the PWM soft start capacitor 0 8 V
6
7
V
DC
RAMP 1
PWM voltage feedback input 0 8 V
Oscillator timing node; timing set by RT CT 1.2 3.9 V
(RTCT)
8 RAMP 2
(PWM RAMP)
9 DC I
LIMIT
When in current mode, this pin functions as the current sense
input; when in voltage mode, it is the PWM input from PFC
0 6 V
output (feed forward ramp).
PWM current limit comparator input 0 1 V
10 GND Ground
2003/06/25
Preliminary
Champion Microelectronic Corporation Page 2
CM6802
NO B
LEED
ESISTOR
R
G
REEN
M
ODE
PFC/PWM C
ONTROLLER
C
OMBO
11 PWM OUT PWM driver output 0 VCC V
12 PFC OUT PFC driver output 0 VCC V
13 VCC Positive supply 10 15 20 V
14 V
Buffered output for the internal 7.5V reference 7.5 V
REF
15 VFB PFC transconductance voltage error amplifier input 0 2.5 3 V
16 VEAO
PFC transconductance voltage error amplifier output
0 6 V
BLOCK DIAGRAM
13
VCC
VEAO
16
1
IEAO
15
VFB
IAC
2
VRMS
4
ISENSE
3
RAMP1
7
RAMP2
8
VDC
6
SS
5
DC ILIMIT
9
VCC
Vcc
2.5V
20uA
VREF
350
GMv
-
+
SW SPST
1.5V
0.5V
.
GAIN
MODULATOR
350
SW SPST
SW SPST
-
+
LOW POWER
DETECT
3.5K
3.5K
PWM
-
CMP
+
SS CMP
-
+
SW SPST
GMi
+
-
.
OSCILLATOR
VFB
2.45V
VCC
19.4V
PFC CMP
+
-
-
+
+
-
.
VIN OK
VCC OVP
DUTY CYCLE
2.75V
LIMIT
-1V
1.0V
PFC OVP
+
-
+
-
PFC ILIMIT
.
-
+
DC ILIMIT
SRQ
PWM
DUTY
VCC
REFERENCE
SRQ
Q
SRQ
Q
SRQ
Q
UVLO
fosc=2xfpwm=4xfpfc
7.5V
POWER
FACTOR
CORRECTOR
CLK
PFCOUT
PWMOUT
MPPWM
MNPWM
PULSE
WIDTH
MODULATOR
MPPFC
MNPFC
VREF
14
VCC
PFC OUT
12
GND
VCC
PWM OUT
11
GND
GND
10
2003/06/25
Preliminary
Champion Microelectronic Corporation Page 3
CM6802
NO B
LEED
ESISTOR
R
G
REEN
M
ODE
PFC/PWM C
ONTROLLER
C
OMBO
ORDERING INFORMATION
Part Number Temperature Range Package
CM6802IP
CM6802IS
-40℃ to 125℃
-40℃ to 125℃
16-Pin PDIP (P16)
16-Pin SOP (S16)
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum ratings are those values beyond which the device could be permanently damaged.
Parameter Min. Max. Units
VCC 20 V
IEAO 0 4.5 V
I
Voltage -5 0.7 V
SENSE
PFC OUT
PWMOUT
Voltage on Any Other Pin
I
10 mA
REF
IAC Input Current 1 mA
Peak PFC OUT Current, Source or Sink 1 A
Peak PWM OUT Current, Source or Sink 1 A
PFC OUT, PWM OUT Energy Per Cycle 1.5 µJ
Junction Temperature 150
Storage Temperature Range -65 150
Operating Temperature Range -40 125
Lead Temperature (Soldering, 10 sec) 260
Thermal Resistance (θJA)
Plastic DIP
Plastic SOIC
ELECTRICAL CHARACTERISTICS
= 5.0kΩ, C
= 1.0nF, TA=Operating Temperature Range (Note 1)
T
Unless otherwise stated, these specifications apply Vcc=+15V, RT
Symbol Parameter Test Conditions
Voltage Error Amplifier (gmv)
Input Voltage Range 0 6 V
Transconductance V
Feedback Reference Voltage 2.45 2.5 2.55 V
Input Bias Current Note 2 -1.0 -0.5 µA
Output High Voltage 5.8 6.0 V
Output Low Voltage 0.1 0.4 V
Sink Current VFB = 3V, VEAO = 6V -35 -20 µA
Source Current VFB = 1.5V, VEAO = 1.5V 30 40 µA
Open Loop Gain 50 60 dB
Power Supply Rejection Ratio 11V < VCC < 16.5V 50 60 dB
Current Error Amplifier (gmi)
Input Voltage Range -1.5 0.7 V
Transconductance V
Input Offset Voltage -12 12 mV
NONINV
NONINV
= V
= V
INV
INV
GND – 0.3 VCC + 0.3 V
GND – 0.3 VCC + 0.3 V
GND – 0.3 VREF + 0.3 V
℃
℃
℃
℃
, VEAO = 3.75V 30 65 90 µmho
, VEAO = 3.75V 50 100 150 µmho
80
105
CM6802
Min. Typ. Max.
℃/W
℃/W
Unit
2003/06/25
Preliminary
Champion Microelectronic Corporation Page 4
CM6802
NO B
LEED
ESISTOR
R
G
REEN
M
ODE
PFC/PWM C
ONTROLLER
C
OMBO
ELECTRICAL CHARACTERISTICS
Vcc=+15V, R
= 5.0kΩ, CT = 1.0nF, TA=Operating Temperature Range (Note 1)
T
(Conti.)
Unless otherwise stated, these specifications apply
Symbol Parameter Test Conditions
Input Bias Current -1.0 -0.5 µA
Output High Voltage 4.0 4.25 V
Output Low Voltage 0.65 1.0 V
Sink Current I
Source Current I
Open Loop Gain 60 70 dB
Power Supply Rejection Ratio 11V < VCC < 16.5V 60 75 dB
PFC OVP Comparator
Threshold Voltage 2.70 2.77 2.85 V
Hysteresis 230 290 mV
Low Power Detect Comparator
Threshold Voltage 0.4 0.5 0.6 V
Hystersis 0.25 V
VCC OVP Comparator
Threshold Voltage 19 19.4 20 V
Hysteresis 1.40 1.5 1.65 V
PFC I
Threshold Voltage -1.10 -1.00 -0.90 V
(PFC I
Delay to Output (Note 4) Overdrive Voltage = -100mV 250 ns
Threshold Voltage 0.95 1.0 1.05 V
Delay to Output (Note 4) Overdrive Voltage = 100mV 250 ns
Threshold Voltage 2.35 2.45 2.55 V
Hysteresis 0.8 1.0 1.2 V
I
I
I
Bandwidth IAC = 100µA 10 MHz
PFC Initial Accuracy
Voltage Stability 11V < VCC < 16.5V 1 %
Temperature Stability 2 %
LIMIT VTH
Output)
Gain (Note 3)
Output Voltage =
3.5K*(I
SENSE-IOFFSET
– Gain Modulator
)
AC
AC
IAC = 300µA, V
I
AC
= +0.5V, IEAO = 4.0V -65 -35 µA
SENSE
= -0.5V, IEAO = 1.5V 35 75 µA
SENSE
Comparator
LIMIT
80 200 mV
DC I
VIN OK Comparator
= 100µA, V
= 150µA, V
= 250µA, V
Comparator
LIMIT
GAIN Modulator
= 100µA, V
AC
Oscillator
RMS
= 1.1V, VFB = 1V 1.47 2.03
RMS
= 1.8V, VFB = 1V 0.66 0.92
RMS
= 3.3V, VFB = 1V 0.21 0.29
RMS
= 1.1V, VFB = 1V 0.70 0.80 0.90 V
RMS
= 25℃
T
A
= VFB = 1V 0.59 0.81
Min. Typ. Max.
CM6802
66 75.5 kHz
Unit
2003/06/25
Preliminary
Champion Microelectronic Corporation Page 5
CM6802
NO B
LEED
ESISTOR
R
G
REEN
M
ODE
PFC/PWM C
ONTROLLER
C
ELECTRICAL CHARACTERISTICS
Vcc=+15V, R
= 5.0kΩ, CT = 1.0nF, TA=Operating Temperature Range (Note 1)
T
(Conti.)
Unless otherwise stated, these specifications apply
Symbol Parameter Test Conditions
Total Variation Line, Temp 68 84 kHz
Ramp Valley to Peak Voltage 2.5 V
PFC Dead Time (Note 4) 500 700 ns
CT Discharge Current V
Output Voltage
Line Regulation 11V < VCC < 16.5V 10 25 mV
Load Regulation
Temperature Stability 0.4 %
Total Variation Line, Load, Temp 7.35 7.65 V
Long Term Stability
Minimum Duty Cycle V
Maximum Duty Cycle V
Output Low Rdson 15 22.5 ohm
I
Output Low Voltage
Output High Rdson 30 45 ohm
Output High Voltage I
Rise/Fall Time (Note 4) CL = 1000pF 50 ns
Duty Cycle Range 0-49.5 0-50 %
Output Low Rdson 15 22.5 ohm
I
Output Low Voltage
Output High Rdson 30 45 ohm
Output High Voltage I
Rise/Fall Time (Note 4) CL = 1000pF 50 ns
Start-Up Current VCC = 12V, CL = 0 30 50 µA
Operating Current 14V, CL = 0 3.0 mA
Undervoltage Lockout Threshold CM6802 14.7 15 15.3 V
Undervoltage Lockout Hysteresis CM6802 4.85 5.0 5.15 V
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: Includes all bias currents to other circuits connected to the V
Note 3: Gain = K x 5.375V; K = (I
Note 4: Guaranteed by design, not 100% production test.
SENSE
– I
OFFSET
0mA < I(V
0mA < I(V
I
= -10mA, VCC = 8V at room temp 0.4 0.8 V
OUT
= 100mA, VCC = 15V at room temp 13.5 14.2 V
OUT
I
= -10mA, VCC = 8V at room temp 0.7 1.5 V
OUT
= 100mA, VCC = 15V at room temp 13.5 14.2 V
OUT
) x [IAC (VEAO – 0.625)]-1; VEAO
= 0V, V
RAMP2
Reference
= 25℃, I(V
T
A
) < 7mA; TA = 0℃~70℃
REF
) < 5mA; TA = -40℃~85℃
REF
= 125℃, 1000HRs
T
J
PFC
IEAO
IEAO
= -100mA at room temp 0.8 1.5 V
OUT
PWM
= -100mA at room temp 0.8 1.5 V
OUT
Supply
FB
= 2.5V 6.5 10.5 mA
RAMP1
) = 1mA
REF
> 4.0V 0 %
< 1.2V 90 95 %
pin.
= 6V
MAX
Min. Typ. Max.
7.4 7.5 7.6 V
CM6802
10 20 mV
10 20 mV
5 25 mV
OMBO
Unit
2003/06/25
Preliminary
Champion Microelectronic Corporation Page 6
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