查询NE5500179A供应商
DATA SHEET
SILICON POWER MOS FET
NE5500179A
4.8 V OPERATION SILICON RF POWER LD-MOS FET
FOR 1.9 GHz 1 W TRANSMISSION AMPLIFIERS
DESCRIPTION
The NE5500179A is an N-channel silicon power MOS FET specially designed as the transmission driver amplifier
for 4.8 V GSM 1 800 and GSM 1 900 handsets. Dies are manufactured using NEC’s NEWMOS technology (NEC’s
0.6 µm WSi gate lateral-diffusion MOS FET) and housed in a surface mount package. The device can deliver 30.0
dBm output power with 55% power added efficiency at 1.9 GHz under the 4.8 V supply voltage, or can deliver 27
dBm output power with 50% pozwer added efficiency at 3.5 V, respectively.
FEATURES
• High output power : P
• High power added efficiency :
• High linear gain : GL = 14.0 dB TYP. (VDS = 4.8 V, I
• Surface mount package : 5.7 × 5.7 × 1.1 mm MAX.
• Single supply : VDS = 3.0 to 6.0 V
= 30.0 dBm TYP. (VDS = 4.8 V, I
out
= 55% TYP. (VDS = 4.8 V, I
η
add
= 200 mA, f = 1.9 GHz, Pin = 20 dBm)
Dset
= 200 mA, f = 1.9 GHz, Pin = 20 dBm)
Dset
= 200 mA, f = 1.9 GHz, Pin = 10 dBm)
Dset
APPLICATIONS
• Digital cellular phones : 4.8 V driver amplifier for GSM 1 800/ GSM 1 900 class 1 handsets, or 4.8 V final stage
amplifier
• Digital cordless phones : 3.5 V final stage amplifier for DECT
• Others : General purpose amplifiers for 1.6 to 2.5 GHz TDMA applications
ORDERING INFORMATION
Part Number Package Marking Supplying Form
NE5500179A-T1 79A R1 • 12 mm wide embossed t api ng
• Gate pin face the perforation s i de of the tape
• Qty 1 kpcs/reel
Remark To order evaluation samples, consult your NEC sales representative.
Part number for sample order: NE5500179A
Caution Please handle this device at static-free workstation, because this is an electrostatic
sensitive device.
The information in this document is subject to change without notice. Before using this document, please confirm that
this is the latest version.
Not all devices/types available in every country. Please check with local NEC Compound Semiconductor Devices
representative for availability and additional information.
Document No. PU10118EJ01V1DS (1st edition)
(Previous No. P15190EJ1V0DS00)
Date Published April 2002 CP(K)
Printed in Japan
The mark
shows major revised points.
!!!!
NEC Compound Semiconductor Devices 2002
NEC Corporation 1999
ABSOLUTE MAXIMUM RATINGS (TA = +25°°°°C)
Parameter Symbol Ratings Unit
NE5500179A
Drain to Source Voltage V
Gate to Source Voltage V
Drain Current I
Drain Current (Pulse Test)
!
Total Power Dissipation P
Channel Temperature T
Storage Temperature T
!
Note Duty Cycle ≤ 50%, T
≤ 1 s
on
DS
GSO
D
Note
I
D
tot
ch
stg
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Test Condit i ons MIN. TYP. MAX. Unit
Drain to Source Voltage V
Gate to Source Voltage V
!
Drain Current (Pulse Test) I
Input Power P
DS
GSO
D
in
ELECTRICAL CHARACTERISTICS (TA = +25°°°°C)
8.5 V
5.0 V
0.25 A
0.5 A
10 W
125 °C
−65 to +125 °C
3.0 4.8 6.0 V
02.03.5V
Duty Cycle ≤ 50%, Ton ≤ 1 s − 340 − mA
f = 1.9 GHz, VDS = 4.8 V 0 20 22 dBm
Parameter Symbol Test Conditions MIN. TY P . MAX. Unit
Gate to Source Leak Current I
Saturated Drain Current
(Zero Gate Voltage Drain Current)
Gate Threshold Voltage V
Transconductance g
Drain to Source Breakdown Voltage BV
Thermal Resistance R
Linear Gain G
Output Power P
Operating Current I
Power Added Efficiency
!
Notes 1. Peak measurement at Duty Cycle ≤ 50%, T
2. DC performance is 100% testing. RF performance is testing several samples per wafer.
Wafer rejection criteria for standard devices is 1 reject for several samples.
V
GSO
I
DSS
th
m
DSIDSS
th
L
out
op
η
add
= 5.0 V −−100 nA
GSS
V
= 8.5 V −−100 nA
DSS
VDS = 4.8 V, IDS = 1 mA 1.0 1.45 2.0 V
VDS = 4.8 V, IDS = 250 mA − 420 − mS
= 10 µA2024− V
Channel to Case − 10 −°C/W
f = 1.9 GHz, Pin = 10 dBm,
V
= 4.8 V, I
DS
= 200 mA,
Dset
Note 1, 2
− 14.0 − dB
f = 1.9 GHz, Pin = 20 dBm, 28.5 30.0 − dBm
VDS = 4.8 V, I
= 200 mA,
Dset
Note 1, 2
− 340 − mA
48 55 − %
≤ 1 s.
on
2
Data Sheet PU10118EJ01V1DS
TYPICAL CHARACTERISTICS (TA = +25°°°°C)
NE5500179A
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
3.5
VGS = 10 V MAX.
Step = 1.0 V
3.0
2.5
(A)
D
2.0
1.5
1.0
Drain Current I
0.5
0
Drain to Source Voltage VDS (V)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
35
VDS = 4.8 V
Dset
= 100 mA
I
f = 1.9 GHz
30
P
(dBm)
out
25
20
Output Power P
15
10
out
I
D
Input Power Pin (dBm)
161412108624
500
400
(mA)
D
300
200
Drain Current I
100
0
302515105020
SET DRAIN CURRENT vs.
GATE TO SOURCE VOLTAGE
1 000
(mA)
Dset
Set Drain Current I
VDS = 4.8 V
100
10
1
0.1
Gate to Source Voltage VGS (V)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
100
V
DS
= 4.8 V
Dset
= 100 mA
I
f = 1.9 GHz
(%)
add
η
η
(%)
d
η
50
Drain Efficiency
Power Added Efficiency
0
Input Power Pin (dBm)
d
η
add
3.02.52.01.51.0
30252015105
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
31
VDS = 4.8 V
f = 1.9 GHz
in
= 20 dBm
P
30
(dBm)
out
29
28
Output Power P
27
26
Gate to Source Voltage VGS (V)
P
out
I
D
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
500
400
(mA)
D
300
200
Drain Current I
100
0
4.02.01.00.0 3.0
Data Sheet PU10118EJ01V1DS
100
(%)
add
η
(%)
d
η
50
Drain Efficiency
Power Added Efficiency
0
V
DS
= 4.8 V
f = 1.9 GHz
in
= 20 dBm
P
η
d
η
add
Gate to Source Voltage VGS (V)
4.03.02.01.0
3
NE5500179A
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
VDS = 3.5 V
Dset
= 100 mA
25
(dBm)
out
20
I
f = 1.9 GHz
P
out
15
I
D
Output Power P
10
5
Input Power Pin (dBm)
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
28
V
DS
= 3.5 V
f = 1.9 GHz
in
= 18 dBm
P
27
(dBm)
out
26
25
Output Power P
24
23
Gate to Source Voltage VGS (V)
P
out
I
D
500
400
(mA)
D
300
200
Drain Current I
100
0
302515105020
500
400
(mA)
D
300
200
Drain Current I
100
0
4.02.01.00.0 3.0
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
100
V
DS
= 3.5 V
Dset
= 100 mA
I
f = 1.9 GHz
(%)
add
η
η
(%)
d
η
50
Drain Efficiency
Power Added Efficiency
0
d
η
add
30252015105
Input Power Pin (dBm)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
100
V
DS
= 3.5 V
f = 1.9 GHz
in
= 18 dBm
50
P
η
d
η
add
0
4.03.02.01.0
Gate to Source Voltage VGS (V)
(%)
add
η
(%)
d
η
Drain Efficiency
Power Added Efficiency
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
VDS = 4.5 V
Dset
= 100 mA
25
(dBm)
out
20
I
f = 460 MHz
P
out
15
I
Output Power P
10
D
5
Input Power Pin (dBm)
4
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
500
400
(mA)
D
300
200
Drain Current I
100
0
25201050–5 15
Data Sheet PU10118EJ01V1DS
100
(%)
add
η
(%)
d
η
50
Drain Efficiency
Power Added Efficiency
0
VDS = 4.5 V
Dset
= 100 mA
I
f = 460 MHz
Input Power Pin (dBm)
η
d
η
add
2520151050–5
NE5500179A
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
30
P
out
25
20
(dBm)
out
15
10
Output Power P
5
I
D
VDS = 4.5 V
f = 460 MHz
P
0
Gate to Source Voltage VGS (V)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
V
DS
= 3.5 V
Dset
= 100 mA
I
f = 850 MHz
25
(dBm)
out
20
15
Output Power P
10
5
Input Power Pin (dBm)
P
out
I
D
in
= 15 dBm
600
500
400
(mA)
D
300
200
Drain Current I
100
0
4.02.01.0 3.0
500
400
(mA)
D
300
200
Drain Current I
100
0
25201050–515
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
100
DS
= 4.5 V
V
f = 460 GHz
in
= 15 dBm
50
P
η
d
η
add
0
4.03.02.01.0
(%)
add
η
(%)
d
η
Drain Efficiency
Power Added Efficiency
Gate to Source Voltage VGS (V)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
100
V
DS
= 3.5 V
I
Dset
= 100 mA
f = 850 MHz
(%)
add
η
(%)
d
η
50
Drain Efficiency
Power Added Efficiency
0
Input Power Pin (dBm)
η
d
η
add
2520151050–5
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
VDS = 3.0 V
Dset
= 100 mA
I
f = 2.45 GHz
25
(dBm)
out
20
15
Output Power P
10
5
Input Power Pin (dBm)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
500
P
out
400
(mA)
D
300
I
D
200
Drain Current I
100
0
302515105020
Data Sheet PU10118EJ01V1DS
100
VDS = 3.0 V
Dset
= 100 mA
I
f = 2.45 GHz
(%)
add
η
(%)
d
η
50
Drain Efficiency
Power Added Efficiency
0
Input Power Pin (dBm)
η
d
η
add
30252015105
5
NE5500179A
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
30
VDS = 3.0 V
25
(dBm)
out
20
f = 2.45 GHz
Pin = 18 dBm
P
out
I
D
15
Output Power P
10
5
Gate to Source Voltage VGS (V)
Remark The graphs indicate nominal characteristics.
500
400
300
200
100
0
4.02.01.00.0 3.0
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
100
DS
= 3.0 V
V
f = 2.45 GHz
50
0
Pin = 18 dBm
Gate to Source Voltage VGS (V)
η
d
η
add
(%)
add
η
(mA)
D
(%)
d
η
Drain Current I
Drain Efficiency
Power Added Efficiency
4.03.02.01.0
6
Data Sheet PU10118EJ01V1DS
S-PARAMETERS
NE5500179A
Test Conditions: VDS = 4.8 V, I
S
Frequency
11
= 100 mA
Dset
Note
S
21
S
12
S
22
MAG
GHz MAG. ANG. dB MAG. ANG. dB MAG. ANG. MAG. ANG. dB dB
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
0.844
0.792
0.757
0.747
0.746
0.751
0.756
0.772
0.777
0.785
0.796
0.804
0.814
0.820
0.827
0.832
0.833
0.846
0.843
0.850
−69.6
−107.8
−127.4
−138.7
−146.2
−151.8
−155.6
−159.5
−162.3
−165.0
−167.7
−169.9
−172.4
−174.6
−176.8
−179.6
177.9
175.6
172.9
170.3
25.2
21.7
18.7
16.4
14.5
12.7
11.3
9.9
8.8
7.6
6.7
5.7
4.8
4.0
3.2
2.5
1.5
1.1
0.2
0.0
18.11
12.12
8.58
6.58
5.28
4.32
3.68
3.12
2.75
2.40
2.17
1.91
1.74
1.58
1.45
1.33
1.19
1.13
1.02
0.99
135.5
112.3
98.8
89.4
82.1
76.2
70.9
65.9
61.3
58.2
53.7
51.4
46.4
44.3
39.7
38.4
34.6
31.6
28.3
27.1
−28.5
−26.1
−25.5
−25.7
−25.7
−26.0
−26.3
−26.4
−26.9
−27.2
−27.8
−28.3
−28.7
−29.0
−28.9
−30.0
−30.5
−31.0
−31.8
−32.2
0.037
0.049
0.052
0.052
0.052
0.050
0.048
0.048
0.045
0.043
0.040
0.038
0.036
0.035
0.035
0.031
0.030
0.028
0.025
0.024
48.2
23.2
10.8
3.3
−4.1
−8.9
−12.6
−17.0
−22.1
−21.9
−26.9
−29.2
−30.5
−31.4
−36.6
−38.5
−38.3
−38.7
−38.1
−40.9
0.517
0.569
0.598
0.618
0.641
0.660
0.681
0.696
0.715
0.732
0.749
0.763
0.776
0.789
0.803
0.808
0.814
0.829
0.834
0.840
−85.0
−120.7
−136.5
−144.8
−149.5
−153.4
−156.2
−158.9
−161.0
−162.9
−164.9
−166.9
−169.1
−171.0
−172.7
−175.0
−176.7
−179.2
178.7
176.5
MSG
26.8
23.9
22.1
21.0
20.1
19.3
18.8
18.1
17.9
17.4
17.2
17.0
16.8
16.5
16.1
16.3
16.0
16.1
16.0
16.1
Note
K
0.00
0.06
0.08
0.11
0.13
0.18
0.22
0.23
0.28
0.33
0.35
0.42
0.45
0.48
0.44
0.62
0.78
0.70
0.98
0.97
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
0.851
0.854
0.861
0.857
0.870
0.870
0.867
0.870
0.873
0.882
167.1
165.1
162.3
159.5
156.6
153.9
151.6
148.9
146.5
143.9
−1.0
−1.6
−2.4
−2.3
−3.4
−3.6
−5.0
−4.8
−5.6
−5.7
0.89
0.83
0.75
0.76
0.67
0.65
0.56
0.57
0.52
0.51
23.3
21.4
16.9
15.5
13.8
12.0
9.0
3.9
4.7
2.7
−33.5
−34.1
−35.1
−34.9
−36.1
−35.8
−39.4
−39.9
−42.4
−41.3
0.021
0.019
0.017
0.017
0.015
0.016
0.010
0.010
0.007
0.008
Note When K ≥ 1, the MAG (Maximum Available Gain) is used. MAG =
When K < 1, the MSG (Maximum Stable Gain) is used. MSG = , K = ,
∆
LARGE SIGNAL IMPEDANCE (VDS = 4.8 V, I
Note
(Ω)
Z
f (GHz) Zin (Ω)
1.9 TBD TBD
is the conjugate of optimum load impedance at given voltage, idling current, input power and frequency.
Note Z
OL
OL
= 100 mA, Pin = 20 dBm)
Dset
S
S
S
S
0.842
0.847
0.856
0.866
0.862
0.865
0.866
0.879
0.879
0.885
21
12
21
12
−42.9
−48.0
−43.6
−40.8
−49.0
−36.8
−33.0
−43.4
−18.3
−15.0
= S11 ⋅ S22 − S
(K –
21 ⋅ S12
174.4
172.1
169.1
167.0
164.7
162.0
159.1
156.7
154.5
152.0
(K2 – 1) )
√√√√
1+
∆
2 ⋅S
12.4
11.7
10.9
11.5
10.2
10.1
7.8
8.6
7.6
8.2
2
−S
12⋅S21
11
2
−S
22
1.42
1.62
1.88
1.68
2.20
2.13
4.44
3.96
6.01
4.60
2
Data Sheet PU10118EJ01V1DS
7
PACKAGE DIMENSIONS
79A (UNIT: mm)
4.2 MAX.
NE5500179A
(Bottom View)
1.5±0.2
Source
Gate
1.0 MAX.
0.6±0.15
5.7 MAX.
0.9±0.2
Gate
Drain
R1
5.7 MAX.
92
0.4±0.15
0.8±0.15
0.2±0.1
4.4 MAX.
79A PACKAGE RECOMMENDED P.C.B. LAYOUT (UNIT: mm)
4.0
1.7
Source
Drain
1.2 MAX.
0.8 MAX.
3.6±0.2
5.9
1.0
Gate
0.5
0.5
6.1
0.5
Source
Stop up the hole with a rosin or
something to avoid solder flow.
Drain
Through Hole: 0.2 × 33
φ
1.2
8
Data Sheet PU10118EJ01V1DS
RECOMMENDED SOLDERING CONDITIONS
!
This product should be soldered and mounted under the following recommended conditions. For soldering
methods and conditions other than those recommended below, contact your nearby sales office.
Soldering Method Soldering Conditions Condition Symbol
NE5500179A
Infrared Reflow Peak temperature (pack age surface temperature) : 260°C or below
Time at peak temperat ure : 10 seconds or less
Time at temperature of 220°C or hi gher : 60 seconds or less
Preheating time at 120 to 180°C : 120±30 seconds
Maximum number of reflow process es : 3 times
Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or bel ow
VPS Peak temperature (pack age surface temperature) : 215°C or below
Time at temperature of 200°C or hi gher : 25 to 40 seconds
Preheating time at 120 to 150°C : 30 to 60 seconds
Maximum number of reflow process es : 3 times
Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or bel ow
Wave Soldering Peak temperature (molten solder temperature) : 260°C or below
Time at peak temperat ure : 10 seconds or less
Preheating temperature (pack age surface temperature) : 120°C or below
Maximum number of flow process es : 1 time
Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or bel ow
Partial Heating Peak t emperature (pin temperature) : 350°C or below
Soldering time (per pin of device) : 3 seconds or less
Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or bel ow
Caution Do not use different soldering methods together (except for partial heating).
IR260
VP215
WS260
HS350-P3
Data Sheet PU10118EJ01V1DS
9
NE5500179A
•
The information in this document is current as of March, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
•
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
•
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•
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
•
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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semiconductor products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment, and anti-failure features.
•
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recommended applications of a semiconductor product depend on its quality grade, as indicated below.
Customers must check the quality grade of each semiconductor product before using it in a particular
application.
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio
and visual equipment, home electronic appliances, machine tools, personal electronic equipment
and industrial robots
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's
data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not
intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness
to support a given application.
(Note)
(1) "NEC" as used in this statement means NEC Corporation, NEC Compound Semiconductor Devices, Ltd.
and also includes its majority-owned subsidiaries.
(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for
NEC (as defined above).
M8E 00. 4 - 0110
10
Data Sheet PU10118EJ01V1DS
NE5500179A
Business issue
NEC Compound Semiconductor Devices, Ltd.
5th Sales Group, Sales Division TEL: +81-3-3798-6372 FAX: +81-3-3798-6783 E-mail: salesinfo@csd-nec.com
NEC Compound Semiconductor Devices Hong Kong Limited
Hong Kong Head Office
Taipei Branch Office
Korea Branch Office
NEC Electron Devices European Operations http://www.nec.de/
TEL: +49-211-6503-101 FAX: +49-211-6503-487
California Eastern Laboratories, Inc. http://www.cel.com/
TEL: +1-408-988-3500 FAX: +1-408-988-0279
Technical issue
NEC Compound Semiconductor Devices, Ltd. http://www.csd-nec.com/
Sales Engineering Group, Sales Division
E-mail: techinfo@csd-nec.com FAX: +81-44-435-1918
TEL: +852-3107-7303
TEL: +886-2-8712-0478
TEL: +82-2-528-0301
FAX: +852-3107-7309
FAX: +886-2-2545-3859
FAX: +82-2-528-0302
0110
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