CCE L50II0 Schematic
VCC SWITCH
5
4
3
2
1
L50II0 Schematics Rev:C
PAGE
1.
D D
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
C C
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
B B
25.
26.
27.
28.
29.
30.
31.
32.
33 Every Ver. Histor
CONTENT
Cover Page
System Block Diagram
POWER BLOCK DIAGRAM
GPIO & POWER CONSU
YONAH CPU HOST & CPU Thermal Sensor
CPU_POWER
CLK GEN ICS9LPR310-CLK
NB(1)_Host
NB(2)_DMI/Configuation/PM
NB(3)_VGA_TV_LVDS_PCIEx16* I/F
NB(4)_DDR2 I/F
NB(5)_POWER
NB(6)_POWER
DDR2 _SO-DIMM
SB(1)_CPU/SATA/IDE/RTC/LPC/AZALIA
SB(2)_PCI/GPIO/SMBUS/PM/DMI/USB/PCIEx1
SB(3)_Power
IEEE1394A & CARD READER
LAN 10/100
HDD/ODD/FAN/SMART PWR
EC IT8510E
LCD PWR / INVERT CONN / LVDS CONN/ROM
MINI CARD & NEW CARD & 3G & BT
Daughter BD CONN
CRT CONN WITH PR8800
+5V&+3V(MAX8734A)
+CPU CORE(MAX8771)
+1.5V&+1.8V(OZ813) & +2.5V(RT9173B)
+1.05V(OZ818) & +1.2V(RT9173B) & +0.9V(RT9173B)
+1.0V_VGA & +1.8V_VGA(OZ813)
POWER ON SWITCH FUNC.
Charger func.(TL594) & DC IN CON & BATTERY CONN
L50II0 REV:A P/N LIST
PCB ASSY P/NPCB P/N
37GL50200-C0 PCB MAIN BD FOR L50II0 REV:C
A A
82GL50200-C0 M/B ASSY FOR L50II0
Name of Part
Cover Page
Project
L50II0
Tuesday, April 25, 2006
Date:
5
4
3
ISSUED BY DC2
2
UNIWILL COMPUTER CORP.
3255
Sheet
1
Rev
C
/
33
1
5
4
3
2
1
CLK GEN
INTEL CPU
Yonah/Merom
D D
Dual/Singal
ICS 925083
CRT
FSB533/667
TV
S-OUT
North Bridge
DDR2 Channel A
DDR2 SO-DIMM1/533/667
INTEL
14"~15"
945GM
DDR2 Channel B
DDR2 SO-DIMM2/533/667
14.318 MHz
LCD
DMI BUS
C C
AZALIA I/F
South Bridge
PATA I/F
SATA I/F
MIC
EAR/SPDIF
AUDIO CODEC
ALC880
AZALIA
MODEM
INTEL
ICH7M
PCI I/F
AMP
TPA6011A
B B
RTL8100CL
SPK-RSPK-L
USB
LAN
PCI I/F
LPC BUS
1XPCI-EXPRESS
EC
ITE 8510
MINI CARD
Wireless LAN
SMART PWR
ODD
MASTER
SATA HDD
PATA HDD
IEEE 1394/CardReader
OZ128T
NEW CARD
VGA SENSOR
ADM1032
CPU SENSOR
ADM1032
SYS Temp
Thermistor
DDR Temp
Thermistor
LCD CTRL
USB
PR8800
A A
5
USB USB USB
NEW-Card BlueTooth
3G-WCDMA
Debug
PORT
4
BIOS
FAN_CPU
3
K/B
LED
Touch PAD
2
CHARGER
BATTERY
SWITCH
Name of Part
Project
L50II0
Tuesday, April 25, 2006
Date:
UNIWILL COMPUTER CORP.
3255
PWR ON
CTRL
BLOCK_DIAGRAM
Sheet
1
Rev
C
/
33
2
5
4
3
2
1
POWER BLOCK DIAGRAM
ISL6224
VID0
VID1
D D
VID2
VID3
VID4
SC451
VIN
RSS090N03
SI4362
CPU_CORE
VIN
RSS090N03
VID5
VIN
RSS090N03
C C
SC1404
+12VA
SI2301
+5VA
SI4835
+12VS
AO4422
+5V
+5VS
POWER Sequence
+3VA,+5VA,+12VA
.
+5VS,+12VS
.
VIN
RSS090N03
+3.3VA
AO4422
SI4835
+3.3VS
+3.3V/
RT9173B
＞
0.9A
+2.5VS
.
+1.05VS_ON
+1.8V_DDR_ON
.
.
.
B B
VIN
ISL6225
RSS090N03
VIN
RSS090N03
A A
+1.5VS/4.5A
+1.05VS/4.5A
AO4422
AO4422
+1.5V
+1.05V/1.8A
.
.
.
.
PWROK/VR_PWRGD
PCIRST#/PLTRST#
PWRSW
+3.3VS_ON
+3.3VS
+1.5VS_ON
+1.5VS
+1.8VS
+1.05VS
RSMRST#
PWRBTN#
+5V_ON
+5V
+3.3V
+2.5V
+1.8V_ON
+1.8V
+1.05V
+1.5V
Vcore_ON
Vcore
H_PWRGD
CPURST#
+1.8VS
AO4422
1ms
1ms
1ms
50ms
RT9173B
+1.8V
10ms
40ms
+0.9VS
1s
5.8ms
7ms
110ms
Name of Part
.
EC Control Pin
5
4
3
2
POWER DIAGRAM & SEQUENCE
Project
L50II0
Tuesday, April 25, 2006
Date:
UNIWILL COMPUTER CORP.
3255
Sheet
3
1
Rev
C
/
33
5
4
3
2
1
ICH6-M
GPIO
BM_BUSY#
GPI0
GP7
EC_EXTSMI#
GP8
SMB_ALERT#
GPI11
D D
C C
B B
A A
GPI12
GPI13
GPO18
GPO19
GPO20
GPO21
GPO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
PM_STPPCI_ICH#
PM_STPCPU_ICH#
TPM_EN
SATA0_GP
PNLSW1
PNLSW2
PNLSW0
PM_CLKRUN#
5
ITE8510E
GPIO
GPCF0
RF_SW#
GPCF1
SILENT#/
GPCF2
IR_PS2CLK1
GPCF3
IR_PS2DAT1
GPCF4
TP_CLK
GPCF5
TP_DATA
MAIL#
GPCF6
BROWSER#
GPCF7
GPI0
SCROLL#
GPI1
CAPS#
GPI2
NUM#
GPI3
CHG_R_LED#
CHG_G_LED#
GPI4
GPI5
SUSLED_LED#
GPI6
VOLMAX
GPH0
+1.8V_DDR_ON
+1.8V_ON
GPH1
GPH2
+1.05VS_ON
GPH3
+3.3VS_ON
+5V_ON
GPH4
GPH5
SET_V
GPH6
+1.5VS_ON
VCORE_ON
GPH7
GPG4
TP_DISABLE
LCDSW
GPG5
GPG6
MUTE#
GPG7
EXTTS#0
CELERON_VO_DET
GPB0
GPB1
CPPE#
PM_RSMRST#
GPB2
GPB3
BAT_SMBCLK
GPB4
BAT_SMBDAT
H_A20GATE
GPB5
H_RCIN#
GPB6
GPB7
RFLED_ON#
GPE0
NA
CPU_BSEL0
GPE1
GPE2
NA
GPE3
NA
GPE4
PWRSW
GPE5
LID#
GPE6
PCM#
PM_SLP_S3#
GPE7
GPD0
ADAP_IN
GPD1
REMOTE_ON#
PCI_RST#/PLT_RST#
GPD2
GPD3
EC_EXTSMI#
GPD4
PM_SLP_S4#
GPD5
PM_THROTTLING#
FAN_SPD#
GPD6
EC_PREST#
GPD7
BTL_BEEP
GPA0
EC_VID1
GPA1
GPA2
EC_VID2
GPA3
EC_VID3
GPA4
EC_VID4
GPA5
SMP1_EN#
GPA6
SMP2_EN#
GPA7
PWRBTN#
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
ADC0
ADC1
ADC2
ADC3
DAC0
DAC1
DAC2
DAC3
ITE8510E
GPIO
PWROK
BAT2_SMBCLK
BAT2_SMBDAT
SB_ALERT#1
SB_ALERT#2
TP_LED#
CHG_ON
SILENT_LED#
BAT_TEMP
ADAPTOR_I
DDR2_TEMP
VGA_TEMP
BRIGHTADJ
CHG_I
FAN_CTRL0
NA
CPU CORE(V)
2.0G
2.2G
2.26G
2.4G
2.5G
2.53G
2.6G
2.66G
2.8G
3.06G
VCC
+3.3V
+3.3VA
+2.5V
+1.5V
+VCCP
+VCC_GMCH_CORE
VCC
+3.3V
+3.3VA
+1.5V
+1.5VA
+3.3VA_RTC
SMART POWER TABLE
VID5
VID6
4
3
VID4
00
0
0
0
0
0
0
00
0 1.4000
0
0
0
1
1
0
0
0
0
0
01
0
01
0
0
0
0
0
CPU
ICC(mA)
1.525
1.525
1.525
1.525
1.525
1.525
1.525
1.525
1.525
1.525
35.7
37.5
38.1
39.3
40
40.4
41.05
43.35
44.86
55.9
MCHE
ICC(mA)
108.19
501.3
1390
33.4
10
266
ICH6-M
ICC(mA) W
275
487
27
0.003
VID3
VID2
0
000
000
0
0 1
1
0
0
0
10
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1
00
0
1
1
1
1
1
1
W
0.357
1.254
2.502
0.084
0.018
0.452
0.315
0.909
0.876
0.049
0.00001
VID1
000
1
0
0
0
0
0
1
0
0
1
0
1
W
54.3
57.1
58.0
59.8
61.0
61.5
62.6
66.1
68.4
85.2
TEMP( )
TEMP( )
VID0
1
0
0
0
0
1
1
0
0
0
1
0
70
70
VCORE
1.5000
1.4875
1.4750
1.4500
1.3000
1.1000
0.7000
1.1625
TEMP( )
℃
69
70
70
71
72
72
72
74
75
81
℃
℃
-0mV
-2.5mV
-5mV
-50mV
-100mV
-200mV
-400mV
-800mV
2
+_mV
VCC
+3.3V
VCC
+3.3V
VCC
+3.3V(DVDD)
VCC
3.3V9630
VCC
+3.3V
ITE8510E
ICC(mA)
300
W
1
CLOCK GENERATOR
ICC(mA)
180
W
0.594
ALC880
ICC(mA)
W
0.234
71
TPA6011A4
ICC(mA)
W
0.099W
ADM1032
ICC
170uA
Name of Part
Project
Date:
3255
L50II0
Tuesday, April 25, 2006
W
0.56mW
GPIO & POWER CONSU
UNIWILL COMPUTER CORP.
1
TEMP( )
℃
70
℃
TEMP( )
70
℃
TEMP( )
70
TEMP( )
℃
85
TEMP( )
℃
150
Sheet
Rev
C
/
33
4
5
H_A#[31:3]8
H_REQ#[4:0]8
H_RS#[2:0]8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
D D
H_ADSTB#08
H_ADSTB#18
H_A20M#15
Z0503
H_FERR#15
H_IGNNE#15
H_STPCLK#15
H_INTR15
H_NMI15
H_SMI#15
1
U15
2
VDD
D+
ADATA
4
THERM
SCLK
3
ALERT
D-
GND
ADM1032ARM
5
C C
B B
+3.3V
R408 200R
C447
1u/10V/Y5V/0603
A A
H_THERMDA
C446
H_THERM#
2200p/50V/X7R
H_THERMDC
5
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
CPU Thermal Sensor
7
8
6
CN15-1
J4
A{3}#
L4
A{4}#
M3
A{5}#
K5
A{6}#
M1
A{7}#
N2
A{8}#
J1
A{9}#
N3
A{10}#
P5
A{11}#
P2
A{12}#
L1
A{13}#
P4
A{14}#
P1
A{15}#
R1
A{16}#
L2
ADSTB{0}#
K3
REQ{0}#
H2
REQ{1}#
K2
REQ{2}#
J3
REQ{3}#
L5
REQ{4}#
Y2
A{17}#
U5
A{18}#
R3
A{19}#
W6
A{20}#
U4
A{21}#
Y5
A{22}#
U2
A{23}#
R4
A{24}#
T5
A{25}#
T3
A{26}#
W3
A{27}#
W5
A{28}#
Y4
A{29}#
W2
A{30}#
Y1
A{31}#
V4
ADSTB{1}#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
AA1
RSVD{01}
AA4
RSVD{02}
AB2
RSVD{03}
AA3
RSVD{04}
M4
RSVD{05}
N5
RSVD{06}
T2
RSVD{07}
V3
RSVD{08}
B2
RSVD{09}
C3
RSVD{10}
B25
RSVD{11}
I24074326
SMBDAT_EC 7,21
SMBCLK_EC 7,21
ADDR GROUP 0 ADDR GROUP 1
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
CONTROL
LOCK#
RESET#
RS{0}#
RS{1}#
RS{2}#
TRDY#
HITM#
BPM{0}#
BPM{1}#
BPM{2}#
BPM{3}#
PRDY#
PREQ#
XDP/ITP SIGNALS
TRST#
DBR#
PROCHOT#
THERMDA
THERMDC
THERM
THERMTRIP#
BCLK{0}
BCLK{1}
H CLK
RSVD{12}
RSVD{13}
RSVD{14}
RSVD{15}
RSVD{16}
RSVD{17}
RESERVED
RSVD{18}
RSVD{19}
RSVD{20}
FSB533
FSB667
HIT#
TCK
TDO
TMS
4
H1
E2
G5
H5
F21
E1
F1
H_IERR#
D20
B3
H4
H_CPURST#
B1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
H_PREQ#
AC1
H_TCK
AC5
H_TDI
AA6
TDI
H_TDO
AB3
H_TMS
AB5
H_TRST#
AB6
C20
H_PROCHOT#
D21
H_THERMDA
A24
H_THERMDC
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
CPU_BSEL0
H_ADS# 8
H_BNR# 8
H_BPRI# 8
H_DEFER# 8
H_DRDY# 8
H_DBSY# 8
H_BREQ#0 8
H_INIT# 15
H_LOCK# 8
H_CPURST# 8
H_TRDY# 8
H_HIT# 8
H_HITM# 8
PM_THRMTRIP# 9,15
PM_THRMTRIP# space 2:1
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7
+1.05V
Close to NB
R403
1K
R445 *10K
Design guide recommend 2.2K
CPU_BSEL0 9
CLK_BSEL0 7
Design guide recommend 2.2K
CPU_BSEL1
R252 10K
R402
1K
CPU_BSEL1 9,21
CLK_BSEL1 7
Design guide recommend 2.2K
CPU_BSEL2
R441 10K
R409
1K
BSEL2
BSEL1
0
4
0
CPU_BSEL2 9
CLK_BSEL2 7
BSEL0 MHZ
10
11
133
166
3
H_D#[63:0]8
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13 H_D#45
H_D#14
H_DSTBN#08
H_DSTBP#08
H_DINV#08
+1.05V
R337
1K_1%
H_DSTBN#18
H_DSTBP#18
H_DINV#18
Layout note: 0.5" max length.
R333
2K_1%
PM_THRMTRIP#
3
R388 *1K
R387 51R
CPU_BSEL19,21
H_DPRSTP# Layout routing is
ICH-7 -> CPU -> IMVP-6 sequency
R176 1K
R153 0R
H_THERM#
H_D#15
H_D#16
H_D#17 H_D#49
H_D#18
H_D#20
H_D#21
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_GTLREF
H_TEST1
H_TEST2
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
Z0505
C176
0.1u
R169
100K
Z0507
C165
*0.1u
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
AD26
C26
D25
B22
B23
C21
+CPU_CORE
B
+3.3V
G
I24075270
R170
100K
Q28
2N3904
E C
R154
100K
Z0506
DS
2
CN15-2
D{0}#
D{1}#
D{2}#
D{3}#
D{4}#
D{5}#
D{6}#
D{7}#
D{8}#
D{9}#
D{10}#
D{11}#
D{12}#
D{13}#
D{14}#
D{15}#
DSTBN{0}#
DSTBP{0}#
DINV{0}#
D{16}#
D{17}#
D{18}#
D{19}#
D{20}#
D{21}#
D{22}#
D{23}#
D{24}#
D{25}#
D{26}#
D{27}#
D{28}#
D{29}#
D{30}#
D{31}#
DSTBN{1}#
DSTBP{1}#
DINV{1}#
GTLREF
TEST1
TEST2
BSEL{0}
BSEL{1}
BSEL{2}
Q20
2N7002
2
DATA GRP 0
DATA GRP 1
MISC
B
C177
1u
G
C140
1u
DATA GRP 2
DSTBN{2}#
DSTBP{2}#
DATA GRP 3
DSTBN{3}#
DSTBP{3}#
PWRGOOD
Q27
2N3904
E C
DS
Q21
2N7002
D{32}#
D{33}#
D{34}#
D{35}#
D{36}#
D{37}#
D{38}#
D{39}#
D{40}#
D{41}#
D{42}#
D{43}#
D{44}#
D{45}#
D{46}#
D{47}#
DINV{2}#
D{48}#
D{49}#
D{50}#
D{51}#
D{52}#
D{53}#
D{54}#
D{55}#
D{56}#
D{57}#
D{58}#
D{59}#
D{60}#
D{61}#
D{62}#
D{63}#
DINV{3}#
COMP{0}
COMP{1}
COMP{2}
COMP{3}
DPRSTP#
DPSLP#
DPWR#
SLP#
PS1#
H_D#32
AA23
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
W25
H_D#37
U23
H_D#38
U25
H_D#39
U22
H_D#40
AB25
H_D#41
W22
H_D#42
Y23
H_D#43
AA26
H_D#44
Y26
Y22
H_D#46
AC26
H_D#47
AA24
W24
Y25
V23
H_D#48
AC22
AC23
H_D#50
AB22
H_D#51H_D#19
AA21
H_D#52
AB21
H_D#53
AC25
H_D#54H_D#22
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AD24
H_D#58
AE21
H_D#59
AD21
H_D#60
AE25
H_D#61
AF25
H_D#62
AF22
H_D#63
AF26
AD23
AE24
AC20
H_COMP0
R26
H_COMP1
U26
H_COMP2
U1
H_COMP3
V1
E5
B5
D24
D6
D7
AE6
AUX_OFF# 26,32
Name of Part
Project
Date:
3255
1
H_DSTBN#2 8
H_DSTBP#2 8
H_DINV#2 8
H_DSTBN#3 8
H_DSTBP#3 8
H_DINV#3 8
R99 27.4R_1%
R92 54.9R_1%
R94 27.4R_1%
R91 54.9R_1%
H_DPRSTP# 15,27
H_DPSLP# 15
H_DPWR# 8
H_PWRGD 15
H_CPUSLP# 8,15
H_PSI# 27
H_PREQ#
R82 *56R
Close CPU
H_IERR#Z0504
H_PROCHOT#
H_STPCLK#
H_TDO
H_TMS
H_TDI
H_CPURST#
H_TRST#
H_TCK
R404 56R
R132 56R
R131 150R
R84 *54.9R
R88 *39.2R
R90 150R
R134 *54.9R
R89 680R
R83 27.4R_1%
CPU_HOST
L50II0
Tuesday, April 25, 2006
UNIWILL COMPUTER CORP.
Sheet
5
1
+1.05V
+1.05V
Rev
C
/
33
5
4
3
2
1
+CPU_CORE
D D
C C
B B
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
CN15-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
VCC053
VCC054
VCC055
VCC056
VCC057
VCC058
VCC059
AB9
VCC060
VCC061
VCC062
VCC063
VCC064
VCC065
VCC066
VCC067
I24088053
QT1608GRL600 = 200mA
QT1608RL120 = 200mA
QT1608RL600 = 200 mA
QT1608RL030 = 500mA
QT1608RL060 = 500mA
VCCSENSE
VSSSENSE
VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC100
VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCA
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
+CPU_CORE
Z0601
+1.05V
H_VID0 20
H_VID1 20
H_VID2 20
H_VID3 20
H_VID4 20
H_VID5 20
H_VID6 20
VCORE_VCCSENSE 27
VCORE_VSSSENSE 27
+1.5V
L48
QT1608RL600
Close to Pin
C443
4.7u/10V/0805
+CPU_CORE
C442
0.01u
C128
1u/10V/Y5V/0603
+CPU_CORE
C157
1u/10V/Y5V/0603
C401
4.7u/10V/0805
C96
4.7u/10V/0805
C424
1u/10V/Y5V/0603
C127
1u/10V/Y5V/0603
C48
C55
1000p
1000p
C47
C54
0.1u
0.1u
C120
C133
0.1u
0.1u
C131
1u/10V/Y5V/0603
C101
4.7u/10V/0805
C90
4.7u/10V/0805
C425
1u/10V/Y5V/0603
C384
1u/10V/Y5V/0603
C53
1000p
C56
0.1u
C142
0.1u
C45
1u/10V/Y5V/0603
C422
4.7u/10V/0805
C432
4.7u/10V/0805
C378
1u/10V/Y5V/0603
C154
1u/10V/Y5V/0603
C144
1000p
C58
0.1u
C132
0.1u
C130
1u/10V/Y5V/0603
C385
1u/10V/Y5V/0603
C63
1u/10V/Y5V/0603
C135
1000p
C51
0.1u
C119
1000p
C68
4.7u/10V/0805
C391
4.7u/10V/0805
C427
1u/10V/Y5V/0603
C115
1u/10V/Y5V/0603
C122
1000p
C49
0.1u
C121
1000p
C100
1u/10V/Y5V/0603
C431
4.7u/10V/0805
C423
4.7u/10V/0805
C61
1000p
C60
0.1u
C134
1000p
C83
1u/10V/Y5V/0603
C392
4.7u/10V/0805
C400
4.7u/10V/0805
C386
1u/10V/Y5V/0603
C114
1u/10V/Y5V/0603
C50
C59
1000p
1000p
C62
0.1u
C143
C145
1000p
1000p
C153
1u/10V/Y5V/0603
C426
1u/10V/Y5V/0603
C379
1u/10V/Y5V/0603
C57
1000p
C383
1u/10V/Y5V/0603
C64
1u/10V/Y5V/0603
CN15-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
A26
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
I24089147
VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
+1.05V
C407
C417
C408
4.7u/10V/0805
C416
4.7u/10V/0805
Name of Part
CPU_POWER
Project
L50II0
Tuesday, April 25, 2006
Date:
UNIWILL COMPUTER CORP.
2
3255
Sheet
1
Rev
C
/
33
6
C396
C402
C420
0.1u
0.1u
A A
5
4
C98
0.1u
0.1u
C398
0.1u
C421
0.1u
C70
C67
0.1u
3
C403
0.1u
C102
0.1u
0.1u
4.7u/10V/0805
4.7u/10V/0805
5
4
3
2
1
QT1608RL600
L33
QT1608RL600
+3.3V
R259
10K
+3.3V
MAX8771_CLKEN# 27
Close pin 28,42
CLK_VDDA
D D
SELDOT , 1= Pin 14/15 DOT 96MHZ , Pin 17/18 LCDCLK
0= Pin 14/15 27MHZ Fix/SS Pin 17/18 PCIEX
Bsel [0,2]
C C
Vil = 0.3
Vih = 0.7
B B
Reserved FOR EMI
C251 10p
C473 10p
C242 10p
C475 10p
C237 10p
C241 10p
C476 10p
CLK_BSEL25
CLK_BSEL15
CLK_BSEL05
PCI_CLK_LAN
PCI_CLK_1394_A
PCI_CLK_LPC
PCI_CLK_SB
PCI_CLK_DEBUG
CLK_BSEL1
CLK_BSEL0
CLK_BSEL2
CLK_BSEL1
Y4
14.318MHz_DIP
R249 *10M
C239
33p
C238
33p
R449
100R
+3.3V
XTAL_OUT
XTAL_IN
Ce = 2*CL - ( Cs + Ci )
CL = Crystal Load Cap = 20P
Ci = IC internal Cap = 5P
Cs = 2P
Ce = Crystal external Cap = 33P
Close pin 50
C246
1u
Pin3,4,5,12,64 programming to
"normal" driving.
PCI_CLK_LAN19
PCI_CLK_1394_A18
PCI_CLK_LPC21
PCI_CLK_DEBUG21
PCI_CLK_SB16
CLK_ICH1416
CLK_USB4816
NB_LVDS_SSCLK9
NB_LVDS_SSCLK#9
SATA_CLKP15
SATA_CLKN15
RB-M1
R274 33R
R433 33R
R251 33R
R250 33R
R256 *10K
R437 33R
R253 33R
R439 33R
SMBDAT_EC5,21
SMBCLK_EC5,21
R268 22R
R271 22R
R273 22R
R275 22R
NEW_CARD_REQ#23
GMCH_CLK_REQ#9
MINICARD_CLK_REQ#23
check
R266
2.2R/0603_1%
VDD_A_CR
PCI_CLK5
PCI_CLK4
PCI_CLK3
PCI_CLK1
Z0707
PCI_CLK2
CLK_BSEL2
CLK_BSEL1
Z0701
Z0702
SATA_CLKP_C
SATA_CLKN_C
XTAL_OUT
XTAL_IN
IREF
R267
4.3K_1%
REQ1# = PCI-E 0,6
REQ2# = PCI-E 1,8
REQ3# = PCI-E 2,4
REQ4# = PCI-E 3,5,7
C247
C250
0.1u
0.1u
PCI-E
U18
Power
42 56
VDDPCIEX VDDREF
50 45
VDDCPU VDDA
5
PCICLK3
4
PCICLK2_2X
3
PCICLK1_2X
64
PCICLK0_2X
IP
9
SELDOT/ PCICLK_F1
8
PCICLK_F0
61
FLSC/REF1
60
FLSB/REF0
12
FLSA/USB_48M_2X
55
SDATA
54
SCLK
17
LCD_SSCGT/PCIEXOT
18
LCD_SSCGC/PCIEXOC
26
SATACLKT
27
SATACLKC
33
PEREQ4#
32
PEREQ3#
34
PEREQ2#
16
PEREQ1#
57
X2_OUT
58
X1_IN
47
VREF
9LPR310-CLK
C249
0.1u
PCI
Power
1
7
VDDPCI0
VDDPCI1
GND
GND
GND
GND
GND
261321293753
C248
*4.7u/10V/X5R/0805
PLL
Power
PCI/PCIEX_STOP#
CPU_STOP#
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
DOTT_96M
DOTC_96M
VTT_PWRGD#/PD
GND
GND
GND
59
VDD48VDDPCIEX
GNDA
PCIEXT1
PCIEXC1
PCIEXT2
PCIEXC2
PCIEXT3
PCIEXC3
PCIEXT4
PCIEXC4
PCIEXT5
PCIEXC5
PCIEXT6
PCIEXC6
PCIEXT7
PCIEXC7
PCIEXT8
PCIEXC8
Close pin 56
Z0703
R265
2.2R/0603_1%
1128
VDD_REF_CR
CLK_VDDA
46
STP_PCI#
63
STP_CPU#
62
GMCH_HCLK
49
GMCH_HCLK#
48
CPU_HCLK
52
CPU_HCLK#
51
PCIE_CLK1
19
PCIE_CLK1#
20
PCIE_CLK2
22
PCIE_CLK2#
23
PCIE_CLK3
24
PCIE_CLK3#
25
30
31
36
35
PCIE_CLK6
39
PCIE_CLK6#
38
41
40
44
43
DOT_96CLK
14
DOT_96CLK#
15
10
GCLK => PCI-E & DMI (100MHZ)
DREFCLK => Dispaly PLLA ( nun- ss 96MHZ)
DRESSFCLK => Display LVDS PLLB ( ss 100MHZ)
Z0704
STP_PCI#
STP_CPU#
C245
0.1u
Xtal
Power
R434 0R
R436 *0R
R448 22R
R450 22R
R442 22R
R444 22R
R269 22R
R272 22R
R451 22R
R452 22R
R453 22R
R455 22R
R454 22R
R456 22R
R443 22R
R447 22R
R435 *10K/0603
R438 10K/0603
R264
1R/0603_1%
Close pin 1,7
C243
0.1u
C244 0.1u
Add to check list
PM_STPPCI# 16
PM_STPCPU# 16,20
CLK_MCH_BCLK 8
CLK_MCH_BCLK# 8
CLK_CPU_BCLK 5
CLK_CPU_BCLK# 5
GCLK 9
GCLK# 9
CLK_PCIE_NEW_CARD 23
CLK_PCIE_NEW_CARD# 23
CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16
CLK_PCIE_Mini card 23
CLK_PCIE_Mini card# 23
NB_DOT_96CLK 9
NB_DOT_96CLK# 9
+3.3V
L35
C240
1u
BSEL1
FSLB
0
1
0
1
BSEL0
FSLA
1
1
1
1
CPU
MHZ
133
166
133
166
PCI
MHZ
33
33
4
FS4
PSB533
PSB667
PSB533
A A
PSB667
FS3 , FS 4 SEETING BY I2C BUS ??????
5
0
0
0
0
FSLC
00
0
0
1
0
1
0
BSEL2
FS3
PCI-E
MHZ
100
100
SPREAD %
0.5% DOWN
+/- 0.25%
CENTER
Name of Part
CLK GEN
Project
L50II0
Tuesday, April 25, 2006
Date:
UNIWILL COMPUTER CORP.
3
2
3255
Sheet
1
Rev
C
/
33
7
5
4
3
2
1
U14J
AT23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
J23
D D
C C
B B
A A
AA22
BA21
AV21
AR21
AN21
AL21
AB21
AW20
AR20
AM20
AA20
AN19
AC19
AH18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
AN15
AM15
AK15
BA14
AT14
AK14
AD14
AA14
AV13
AR13
AN13
AM13
AL13
AG13
AY12
AC12
AD11
AA11
VSS_187
F23
VSS_188
C23
VSS_189
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
K20
VSS_213
B20
VSS_214
A20
VSS_215
VSS_216
VSS_217
W19
VSS_218
K19
VSS_219
G19
VSS_220
C19
VSS_221
VSS_222
P18
VSS_223
H18
VSS_224
D18
VSS_225
A18
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
J16
VSS_235
F16
VSS_236
C16
VSS_237
VSS_238
VSS_239
VSS_240
N15
VSS_241
M15
VSS_242
L15
VSS_243
B15
VSS_244
A15
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
U14
VSS_251
K14
VSS_252
H14
VSS_253
E14
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
P13
VSS_261
F13
VSS_262
D13
VSS_263
B13
VSS_264
VSS_265
VSS_266
K12
VSS_267
H12
VSS_268
E12
VSS_269
VSS_270
VSS_271
Y11
VSS_272
CALISTOGA
VSS
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
FSB I/O slew rate compensation
+1.05V
54.9R_1%
H_XSCOMP
10mil width, 20mil space
R400
+1.05V
R104
54.9R_1%
H_YSCOMP
Reference Voltage for RCOMP
+1.05V
R411
221R_1%
H_XSWING
C453
R410
0.1u
100R_1%
+1.05V
R367
221R_1%
H_YSWING
C418
R366
0.1u
100R_1%
10mil width, 20mil space
Calibration FSB I/O Buffer
H_XRCOMP H_YRCOMP
R395
24.9R_1%
R363
24.9R_1%
10mil width, 20mil space
5
4
3
H_D#[63:0]5
H_A#[31:3]5
W11
AA10
AC9
AB11
AC11
AC2
AD1
AD9
AC1
AD7
AC6
AD10
AD4
AC8
AG2
AG1
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
Y8
AA1
AB4
AB3
AB5
E1
E2
E4
Y1
U1
W1
U14A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
CALISTOGA
Thermistor
RC-M1
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_VREF
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF
HOST
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
+3.3V
RT2
10K_T/0805
NB_TEMP21
R515
1.5K_1%
2
H_A#4
C9
H_A#5
E11
H_A#6
G11
H_A#7
F11
H_A#8
G12
H_A#9
F9
H_A#10
H11
H_A#11
J12
H_A#12
G14
H_A#13
D9
H_A#14
J14
H_A#15
H13
H_A#16
J15
H_A#17
F14
H_A#18
D12
H_A#19
A11
H_A#20
C11
H_A#21
A12
H_A#22
A13
H_A#23
E13
H_A#24
G13
H_A#25
F12
H_A#26
B12
H_A#27
B14
H_A#28
C12
H_A#29
A14
H_A#30
C14
H_A#31
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
H_DINV#0
J7
H_DINV#1
W8
H_DINV#2
U3
H_DINV#3
AB10
H_DSTBN#0
K4
H_DSTBN#1
T7
H_DSTBN#2
Y5
H_DSTBN#3
AC4
H_DSTBP#0
K3
H_DSTBP#1
T6
H_DSTBP#2
AA5
H_DSTBP#3
AC5
D3
D4
B3
H_REQ#0
D8
H_REQ#1
G8
H_REQ#2
B8
H_REQ#3
F8
H_REQ#4
A8
H_RS#0
B4
H_RS#1
E6
H_RS#2
D6
H_CPUSLP#_GMCH
E3
E7
H_ADS# 5
H_ADSTB#0 5
H_ADSTB#1 5
H_BNR# 5
H_BPRI# 5
H_BREQ#0 5
H_CPURST# 5
H_DBSY# 5
H_DEFER# 5
H_DPWR# 5
H_DRDY# 5
H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5
H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5
H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5
H_HIT# 5
H_HITM# 5
H_LOCK# 5
H_REQ#[4:0] 5
Name of Part
Project
Date:
3255
+1.05V
>=10mil
H_VREF
C116
0.1u
Close to MGCH <100mil
H_RS#[2:0] 5
R394 *0R
p71 not mout ,
they mount SB
side
H_CPUSLP# 5,15
H_TRDY# 5
NB(1)_Host
L50II0
Tuesday, April 25, 2006
UNIWILL COMPUTER CORP.
Sheet
1
R135
100R_1%
R136
200R_1%
8
Rev
C
/
33
H_A#3
H9
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
CLK_MCH_BCLK7
CLK_MCH_BCLK#7
5
4
3
2
1
U14B
DMI_RXP3
DMI_RXP316
DMI_RXP216
DMI_RXP116
D D
NB_LVDS_SSCLK7
NB_LVDS_SSCLK#7
NB_DOT_96CLK7
NB_DOT_96CLK#7
+1.8VS
R349
150R_1%
0.05A
R348
150R_1%
R301
80.6R_1%
R302
80.6R_1%
M_VREF_MCH
C69
0.1u
M_RCOMPN
M_RCOMPP
C374
0.1u
C C
+1.8VS
B B
GCLK7
GCLK#7
as short as
possible
R312
R97
*40.2R_1%
*40.2R_1%
SM_CKE_2(#) connected to Dimm1 CK1(#)
SM_CKE_3(#) connected to Dimm1 CK0(#)
DMI_RXP016
DMI_RXN316
DMI_RXN216
DMI_RXN116
DMI_RXN016
DMI_TXP316
DMI_TXP216
DMI_TXP116
DMI_TXP016
DMI_TXN316
DMI_TXN216
DMI_TXN116
DMI_TXN016
M_OCDCOMP1
M_OCDCOMP0
M_VREF_MCH
M_RCOMPN
MB_ODT314
MB_ODT214
MA_ODT114
MA_ODT014
MB_CS#314
MB_CS#214
MA_CS#114
MA_CS#014
MB_CKE314
MB_CKE214
MA_CKE114
MA_CKE014
MB_CK#314
MB_CK#414
MA_CK#114
MA_CK#014
MB_CK314
MB_CK414
MA_CK114
MA_CK014
DMI_RXP2
DMI_RXP1
DMI_RXP0
DMI_RXN3
DMI_RXN2
DMI_RXN1
DMI_RXN0
DMI_TXP3
DMI_TXP2
DMI_TXP1
DMI_TXP0
DMI_TXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0
AG41
AF37
AE41
AC37
AH41
AG37
AF41
AE37
AG39
AF35
AE39
AC35
AH39
AG35
AF39
AE35
AG33
AF33
AK41
AU21
AY20
BA12
BA13
AF10
AL20
AW21
AY21
AW12
AW13
AY29
BA29
AT20
AU20
AY40
AW35
AW40
AW7
AY35
D41
C40
A26
A27
AK1
AT9
AV9
AY7
AT1
AR1
DMI_TXP_3
DMI_TXP_2
DMI_TXP_1
DMI_TXP_0
DMI_TXN_3
DMI_TXN_2
DMI_TXN_1
DMI_TXN_0
DMI_RXP_3
DMI_RXP_2
DMI_RXP_1
DMI_RXP_0
DMI_RXN_3
DMI_RXN_2
DMI_RXN_1
DMI_RXN_0
D_REFSSCLKIN
D_REFSSCLKIN#
D_REFCLKIN
D_REFCLKIN#
G_CLKIN
G_CLKIN#
SM_VREF_1
SM_VREF_0
SM_RCOMP
SM_RCOMP#
SM_ODT_3
SM_ODT_2
SM_ODT_1
SM_ODT_0
SM_OCDCOMP_1
SM_OCDCOMP_0
SM_CS#_3
SM_CS#_2
SM_CS#_1
SM_CS#_0
SM_CKE_3
SM_CKE_2
SM_CKE_1
SM_CKE_0
SM_CK#_3
SM_CK#_2
SM_CK#_1
SM_CK#_0
SM_CK_3
SM_CK_2
SM_CK_1
SM_CK_0
CALISTOGA
DMI CLK
NC
SDVO_CTRLDATA
SDVO_CTRLCLK
MISC
PM_THRMTRIP#
PM_EXTTS#_1
PM_EXTTS#_0
PM
PM_BMBUSY#
DDR MUXING
CFG
RSVD
NC18
NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10
CLK_REQ#
LT_RESET#
RSTIN#
PWROK
CFG_20
CFG_19
CFG_18
CFG_17
CFG_16
CFG_15
CFG_14
CFG_13
CFG_12
CFG_11
CFG_10
CFG_9
CFG_8
CFG_7
CFG_6
CFG_5
CFG_4
CFG_3
CFG_2
CFG_1
CFG_0
RSVD_13
RSVD_12
RSVD_11
RSVD_10
RSVD_9
RSVD_8
RSVD_7
RSVD_6
RSVD_5
RSVD_4
RSVD_3
RSVD_2
RSVD_1
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0
A3
A39
A4
A40
AW1
AW41
AY1
AY41
B2
B41
BA1
BA2
BA3
BA39
BA40
BA41
C1
C41
D1
Asserted to control the raw PCI-E clock
Z0901
H32
K28
H27
H28
AH34
AH33
G6
H26
F25
G28
J26
K27
J25
H15
G18
H16
C15
K15
G15
D15
E16
G16
D16
D19
E18
F15
E15
F18
J18
K18
K16
D27
D28
A34
A35
A41
J19
H7
AF11
AG11
F7
F3
R32
T32
R173 *0R
GMCH_CLK_REQ# 7
Asserted to synchronize with ICH on fault
GMCH_RST#
DELAY_VR_PWRGOOD
GMCH_THRMTRIP#
PM_EXTTS#1
PM_EXTTS#0
R95 100R
R391 *0R
R171 0R
R166 0R
GHCH integrated graphics busy
CFG19 13
CFG18 13
CFG16 13
Z0902M_RCOMPP
R137 *1K
Z0903
R144 *1K
CFG9 13
CFG5 13
CPU_BSEL2 5
CPU_BSEL1 5,21
CPU_BSEL0 5
Base on PWROK
GCLK => PCI-E & DMI (100MHZ)
DREFCLK => Dispaly PLLA ( nun- ss 96MHZ)
DRESSFCLK => Display LVDS PLLB ( ss 100MHZ)
SDVODATA has internal pull down
0= no DVO device
1= DVO device present
SDVOCLK has internal pull
down .
Add to check list ( Bat life )
NB_SYNC# 16
GMCH PWROK
PLT_RST# 16,17,20,21,23
DELAY_VR_PWRGOOD 16
PM_THRMTRIP# 5,15
C4_OUT# 21
EXTTS#0 14,21
BM_BUSY# 16
PWROK input level
PM_THRMTRIP# space 2:1
Break event in C3 state.
Colse to NB
DELAY_VR_PWRGOOD
C72
0.1u
RB->M2
PM_THRMTRIP#
C441
0.1u
Only Base on Discreted VGA
VCCA_DPLLA , VCCA_DPLLB => NC
DREF_CLKP / DREF_SSCLKP = GND
DREF_CLKN / DREF_SSCLKN = GND
VCCA_DPLLA , VCCA_DPLLB =>1.5V
DREF_CLKP / DREF_SSCLKP = 1.5V
DREF_CLKN / DREF_SSCLKN = GND
CFG0
CFG1 CFG2
For MEN bus throttling
A A
+3.3V
R156 10K
R150 10K
PM_EXTTS#0
PM_EXTTS#1
0
1
1
Check with S/W
5
4
3
0
01
Host
Clock
frequency
133
166
CFG7 ( IPU ) => 1= Mobility CPU
0 = Reverse
Name of Part
NB(2)_DMI/VGA/MICS
Project
L50II0
Tuesday, April 25, 2006
Date:
UNIWILL COMPUTER CORP.
2
3255
Sheet
1
Rev
C
/
33
9
5
D D
C C
TV_DACB24
TV_DACC24
B B
NB_CRT_BLUE25
NB_CRT_GREEN25
NB_CRT_RED25
R418
150R
R417
150R
4
R420
150R
R416
150R
R415
150R
3
U14C
D32
L_BKLTCTL
Z1002
Z1003
L_IBG
TV_DACA
TV_DACB
TV_DACC
TVIREF
J30
H30
H29
G26
G25
B38
C35
F32
C33
C32
A33
A32
E27
E26
C37
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
J20
B16
B18
B19
K30
J29
E23
D23
C22
B22
A21
B21
C26
C25
G23
J22
H23
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LB_CLK#
LB_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
TV_DCONSEL0
TV_DCONSEL1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
RC-M2
R152
2.2K_1%
NB_DCC_CLK25
NB_DCC_DATA25
NB_CRT_HSYNC25
NB_CRT_VSYNC25
NB_LDDC_CLK22
NB_LDDC_DATA22
R419
150R
R139 39R
R138 39R
NB_EN_BL22
NB_FPVDDEN22
LVDSA_CLKN22
LVDSA_CLKP22
LVDSB_CLKN22
LVDSB_CLKP22
LVDSA_N022
LVDSA_N122
LVDSA_N222
LVDSA_P022
LVDSA_P122
LVDSA_P222
LVDSB_N022
LVDSB_N122
LVDSB_N222
LVDSB_P022
LVDSB_P122
LVDSB_P222
R168
4.99K_1%
GM_CRT_HSYNC
GM_CRT_VSYNC
NB_CRT_BLUE
NB_CRT_GREEN
NB_CRT_RED
NB_CRT_IREF
R414
255R_1%
CALISTOGA
2
LVDS
TV
VGA
1
+1.5V
R147
24.9R_1%
PEG_COMPZ1001
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
PCI-EXPRESS GRAPHICS
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
D40
D38
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
A A
TC Modify 0914
Name of Part
NB(3)_VGA_TV_LVDS
Project
L50II0
Tuesday, April 25, 2006
Date:
UNIWILL COMPUTER CORP.
5
4
3
2
3255
Sheet
1
10
Rev
C
/
33
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