Calogic LLC SD8901CY, SD8901HD Datasheet
CORPORATION
Wideband, Ring
Demodulator
SD8901
FEATURES
High Frequency Opera tio n
••
Wide Dynamic Range
••
Low Ca pacitance
••
APPLICATIONS
Communications
••
RF Mixers
••
PIN CONFIGU R ATI ON S
SO-14
TO-78
DESCRIPTION
The SD8901 is a ring demodulator/balanced mixer. Designed
to utilize Calogic’s ultra high speed and low capacitance
lateral DMOS process. The SD8901 offers significant
performance improvements over JFET and diode balanced
mixers when low third order harmonic distortion has been a
problem.
PACKAGE INFORMATION
Part Package Temperature Range
o
SD8901HD Hermetic TO-78 -55
SD8901CY Plastic Surface Mou nt -55
XSD8901 Sorted Chips in Carriers -55
C to 125oC
o
C to 125oC
o
C to 125oC
Funct io nal block dia gram
LO
IF
1
5
2
7
RF
2
3
CD4
LO
SUB
LO
SUB
SUB
NC
IF
LO
LO
1
C
RF
2
TOP VIEW
1
2
IF
2
RF
SUB
RF
SUB
IF
SUB
NC
2
1
IF
1
2
RF
1
1
3
4
5
6
7
1
RF
2
CASE
LO
1
LO
2
IF
2
2
2
RF
1
4
3
2
BOTTOM VIEW
IF
1
IF
1
1
4
SUBSTRATE
2
5
6
7
1
LO
6
RF
2
1
SD8901
ABSOLUTE MAXIMUM RATINGS (TA = +25oC unless otherwise note d)
Drain to Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
V
DS
V
Drain t o Subst r ate . . . . . . . . . . . . . . . . . . . . . . . . 2 2 .5 V
DB
Source to Substrate. . . . . . . . . . . . . . . . . . . . . . . 22.5 V
V
SB
Gate to Source. . . . . . . . . . . . . . . . . . . . -22.5 V to 30 V
V
GS
V
Gate to Substrate. . . . . . . . . . . . . . . . . . . . -0.3V to 30 V
GB
Gate to Drain . . . . . . . . . . . . . . . . . . . . . . -22.5V to 30 V
V
GD
I
D
Operating Temperatu re . . . . . . . . . . . . . . . . . . . . -55 to 125
Storage Tempera tu re. . . . . . . . . . . . . . . . . . . . . . -65 to 150
Power Dissipation (A Package)* . . . . . . . . . . . . . . . . 640 mW
* Derat e 5 m W /
CORPORATION
Drain C urr ent . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
o
C above 25oC
o
o
C
C
ELECTRICAL CHARACTERISTCI S (T
= +25oC unless otherwise noted)
A
SYMBOL CHARACTERISTICS MIN TYP MAX UNIT TEST CONDITIONS
STATIC
V
(BR)DS
V
(BR)SD
V
(BR)DB
V
(BR)SB
V
T
Drain-Source
Breakdown Voltage
Source-Drain
Breakdown Voltage
Drain-Substrate
Breakdown Voltage
Source-Substrate
Breakdown Voltage
15 25
15
22.5
22.5
Threshold Voltage 0.1 1 2.0
VGS = VSB = -5 V
Is = 10 nA
V
I
D
Source Open
V
V
Drain Open
V
V
IS = 1 µA, VSB = 0V
= VDB = - 5 V
GD
= 10 nA
= 0 V, ID = 10 nA
GB
= 0 V, ID = 10 nA
GB
= VGS = V
DS
T
50 75
r
DS(ON)
Drain-Source
"ON" Resistance
30 V
= 1 mA
I
23 V
Ω
D
V
= 0 V
SB
19 V
∆r
DS(ON)
Resistance Matchin g 3 7 VGS = 5 V
DYNAMIC
V
= 0 V, VBS = -5.5 V
C
gg
L
c
IMD
f
MAX
LO1 - LO2 Capacitance 4.4 pF
Conversion Loss 8
3
Third Order Intercept +35
dB See Figure 1, PLO = +17 dBm
Maximu m Op era tion Freque nc y 250 MHz
DS
V
= 4 V
GS
Note: Guaranteed by design, not subject to production test
V
GS
GS
GS
GS
= 5 V
= 10 V
= 15 V
= 20 V
PERFORMANCE COMPARISON
3rd ORDER INPUT
INTERCEPT POINT
(+dBM)
40
30
20
10
0
0 5 10 15 20 25 30 35
SD8901
U350
DIODE RING
POWER LOCAL OSC. (+dBm)
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