N-Channel Enhancement Mode
Dual DMOS FET
SD411
CORPORATION
FEATURES
Normally "OFF" Configuration
••
High Speed Sw i tc hin g. . . . . . . . . . under 1 ns (ty pical l y)
••
Ultra Low Capaci tan c e . . . . . . . . . c
••
Tight Matching C h a racteristi c s
••
Pin Compati ble to In dust ry Sta ndar d
••
Dual JFET s with Addition of Subs trate Bias Pin
APPLICATIONS
Wideband Dif ferent ial Amplifi ers
••
Cascode Amplifiers
••
High Inter cept Point Bal anced Mixers
••
Oscillators
••
High Speed Analog Com parators
••
PIN CONFIGU R ATION
<3.5 pf ( typicall y)
iss
TO-78
DESCRIPTION
The SD411 is constructed utilizing Calogic’s high speed
lateral DMOS techniques featuring tight matching
characteristics between each F ET. This device is an ex cellent
choice for instrumentation, communication, RF and Video
designs.
ORDERING INFOMATION
Part Package Temperature Range
o
5
6
1
C to +150oC
o
C to +150oC
7
SD411 TO-78 Hermetic Pa c kage -55
XSD41 1 Sorted Chips in Carriers -55
1
SOURCE 1
2
DRAIN 1
3
GATE 1
4
CASE/BODY
5
SOURCE 2
6
DRAIN 2
7
GATE 2
4
3
2
BOTTOM VIEW
CD2
D1
G2
S1
D2
S2
C
G1
CORPORATION
ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted)
Drain-Source Voltage. . . . . . . . . . . . . . . . . . . . . . +20V
V
DS
V
Source-Drain Voltage. . . . . . . . . . . . . . . . . . . . . . +10V
SD
Drain-Body voltag e. . . . . . . . . . . . . . . . . . . . . . . . +25V
V
DB
Source-Body V olt age. . . . . . . . . . . . . . . . . . . . . . +15V
V
SB
V
Gate-Drain Volta ge. . . . . . . . . . . . . . . . . . . . . . . . +25V
GD
G ate- Sour ce Vo ltag e . . . . . . . . . . . . . . . . . . . . . . +25V
V
GS
Gat e-Body Voltag e. . . . . . . . . . . . . . . . . . . . . . . . +25V
V
GB
V
Gate-to-Gate Volta ge. . . . . . . . . . . . . . . . . . . . . . +25V
G1G2
Drain-to-Drain Volt age . . . . . . . . . . . . . . . . . . . . . +20V
V
D1D2
Source-to-Source Voltage . . . . . . . . . . . . . . . . . . +15V
V
S1S2
I
Continuous Drain Curre nt . . . . . . . . . . . . . . . . +50 mA
D
P
P
T
T
T
SD411
Device Dissipation (each side). . . . . . . . . . . . 360 mW
D
Derating Facto r . . . . . . . . . . . . . . . . . . . . 2.88 mW/
T otal Device Dissipat ion . . . . . . . . . . . . . . . . 500 mW
D
Derating Factor . . . . . . . . . . . . . . . . . . . . . . . 4 mW/
Operating Junction
j
Temperat ure Range . . . . . . . . . . . . . . . . -55 to +125
Storage Temperature Ra nge . . . . . . . . . -55 to +150oC
S
Lead T emperature (1/16’ from mounting
L
surface for 10 sec.). . . . . . . . . . . . . . . . . . . . . . +260
o
C
o
C
o
C
o
C
ELECTRICAL CHARACTERISTIC S(T
= +25oC per side unless otherwise noted )
A
SYMBOL CHARACTERISTIC MIN TYP MAX UNITS TEST CONDITIONS
STATIC
BV
BV
BV
BV
I
DSX
I
GBS
V
GS(th)
r
DS(ON)
DS
SD
DB
SB
Drain Source Breakdown Voltage
Source-Drain Breakdown Voltage
Drain-Body Breakdown Voltage
Source-Body Breakdown Voltage
Drain-Source Leakage Current
Gate-Body Leakage Current
Gate-Source Threshold Voltage
Drain-Source ON Resistance
(1)
20
10
25
15
0.7 10 nA
1.0 µA
0.5 1.0 2.0 V
70 ohms
ID = 10 nA, VGS = VBS = -5V
IS = 10 nA, VGD = VBD = -5V
V
I
= 10 nA, VGB = 0 Source
D
Open
IS = 10µA, VGB = 0 Drain Open
VDS = 20V, VGS = VBS = -5V
VGS = 25V, VDB = VSB = 0
ID = 1.0µA, VDS = VGS, VSB = 0
= 1.0mA, VGS = 5. 0V, VSB = 0
I
D
DYNAMIC
V
g
fs
C
Common-Source Input Capacitance
iss
C
oss
C
rss
C
(gs + sb)
Common-Source Forward Transconductance
Common-So urce Ou tput Cap acita nce
Common Source Reverse Transfer Capacitance
Source Node Capa citan ce
(1)
10 12 mS
3.5
1.2
0.3
4.5
pF
= 10V, ID = 20mA, VSB = 0
DS
f = 1KHZ
V
= 10V, VGS = VBS = 0
DS
f = 1MHZ
MATCH
| V
- V
GS1
GS2
- V
∆| V
GS1
∆T
Differential Gate Source Voltage
|
|
DS2
Differential Drift
NOTE 1: Pulse Te st, 80sec, 1% Duty Cycle
25 mV
25 µV/
V
= 10V
DS
I
= 5. 0mA
D
o
V
SB
C
= 0
T
= -55oC to
A
+125C
o