Calogic XU406, XU404, XU405, XU403, XU402 Datasheet
...
Dual N-Channel JFET Switch
U401 – U 406
CORPORATION
FEATURES
Minimum System Error and Calibration
••
Low Drift With Temperature
••
Operates From Low Power Supply Voltages
••
High Output Impedance
••
PIN CONFIGU R ATION
TO-71
G2
D2
CJ2
S2
G1
D1
S1
ABSOLUTE MAXIMUM RATINGS
(T
= 25oC unless otherwise specified)
A
Gate-Drain or Gate-So urce Voltage . . . . . . . . . . . . . . . . . 50V
Gate Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Storage Temperatur e Ra nge. . . . . . . . . . . . . -65
Operating Temperatur e Ra nge . . . . . . . . . . . -55
Lead Temperature (Soldering, 10se c). . . . . . . . . . . . . +300
One Side Both Sides
Power Dissipation (T
Derate above 25
NOTE: Stresses above those listed under "Absolute Maxi mum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part Package Temperature Range
U401-6 Hermetic TO- 71 -55
XU401-6 Sorted Chips in Carriers -55
= 85oC) 300mW 500mW
A
o
C2.6mW/
o
C to +200oC
o
C to +150oC
o
C5mW/oC
o
C to +150oC
o
C to +150oC
o
C
CORPORATION
ELECTRICAL CHARACTERISTIC S (TA = 25oC unless otherwise sp ecif ied)
SYMBOL PARAMETER
BV
I
V
V
I
I
BV
GSS
DSS
G
GSS
GS(off)
GS(on)
G1-G2
Gate-Source
Breakdown Voltage
Gate Reverse Current
(Note 2)
Gate-Source Cutoff
Voltage
Gate-Source Voltage
(on)
Saturation Drain
Current (Note 3)
Operating Gate
Current (Note 2)
Gate-Gate
Breakdown Voltage
Common-Source
g
fs
Forward
Transconductance
(Note 3)
g
os
Common-Source
Output Conductance
Common-Source
g
fs
g
os
Forward
Transconductance
Common-Source
Output Conductance
Common-Source
C
iss
Input Capacitance
(Note 6)
Common-Source
C
rss
Reverse Transfer
Capacitanc e (Not e 6)
Equivalent
e
n
CMRR
|
V
GS1
∆V
|
GS1
−V
∆T
GS2
−V
Short-Circuit Input
Noise Voltage
Common-Mode
Rejection Ratio
Differential
|
Gate-Source Voltage
Gate-Source Voltage
|
GS2
Differential Drift (Note
4)
NOTES: 1. Per transistor.
2. Approximately doubles for every 10
3. Pulse test duration = 300µs; duty cycle ≤3%.
4. Measured at end points T
5. CMRR = 20 log
6. For design reference only , not 100% tested.
10
∆ | V
U401 U402 U403 U404 U405 U406
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
-50 -50 -50 -50 -50 -50 V
-25 -25 -25 -25 -25 -25 pA V
-.5 -2.5 -.5 -2.5 -.5 -2.5 -.5 -2.5 -.5 -2.5 -.5 -2.5
-2.3 -2.3 -2.3 -2.3 -2.3 -2.3
0.5 10.0 0.5 10.0 0.5 10.0 0.5 10.0 0.5 10.0 0.5 10.0 mA V
-15 -15 -15 -15 -15 -15 pA
-10 -10 -10 -10 -10 -10 nA T
±50 ±50 ±50 ±50 ±50 ±50
2000 7000 2000 7000 2000 7000 2000 7000 2000 7000 2000 7000
20 20 20 20 20 20
1000 2000 1000 2000 1000 2000 1000 2000 1000 2000 1000 2000
2.0 2.0 2.0 2.0 2.0 2.0
8.0 8.0 8.0 8.0 8.0 8.0
3.0 3.0 3.0 3.0 3.0 3.0
20 20 20 20 20 20
95 95 95 95 90 dB
5 1010152040mV
10 10 25 25 40 80
o
C increase in TA.
, TB, TC.
GS
∆V
A
−V
1
DD
GS
|
2
, ∆VDD = 10V.
U401 – U406
UNITS TEST CONDITIONS
= 0, IG = -1µA
V
DS
= 0, VGS = -30V
DS
= 15V, ID = 1nA
V
DS
V
= 15V, ID = 200µA
V
DG
= 10V, VGS = 0
DS
V
= 15V, ID = 200µA
DG
= 125oC
A
V
= 0, VGS = 0,
DS
V
I
= ±1µA
G
= 10V,
V
DS
V
GS
µS
V
DG
= 200µA
I
D
pF f = 1MHz
nV
VDS = 15V,
V
√Hz
GS
V
DG
= 200µA (Note 5, 6)
I
D
V
DG
V
DG
o
µV/
C
= 200µA
I
D
f = 1kHz
= 0
f = 1kHz
= 15V,
f = 10Hz
= 0
(Note 6)
= 10 to 20V ,
= 10V, ID = 200µA
T
= -55oC
= 10V ,
A
= +25oC
T
B
= +125oC
T
C
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