Calogic SST441, SST440 Datasheet
N-Channel JFET
Monolithic Dual
SST440 / SST441
CORPORATION
FEAT URES
High Gain . . . . . . . . . . . . . . . . . . . . . . . gfs > 6 mS typ ic al
••
Low Leakage . . . . . . . . . . . . . . . . . . . . . . IG < 1pA typical
••
Low Noise
••
Surface Mount P ac ka ge
••
APPLICATIONS
Differential Wideban d Ampl ifiers
••
VHF/UHF Amplifiers
••
Test and Measurement
••
PIN CONFIGU RATION
SO-8
DESCRIPTION
Calogic’s SST440 Series is a high speed N-Channel
Monolithic Dual JFET in a surface mount SO-8 package. This
device is well suited for use as wideband different ial amplifiers
in test and measurement applications. The combination of
high gain, low leakage and low noise make it an excellent
performer.
ORDERING INFORMATION
Part Package Tempe rature Range
o
SST440-1 Plastic SO-8 -55
NOTE: For Sorted Chips in Carriers, See U440 Series
TOP VIEW
(1) S1
(2) D1
(3) G1
C to +150oC
N/C (8)
G2 (7)
D2 (6)
CJ1
(4) N/C
PRODUCT MARKING
SST440 SST440
SST441 SST441
S2 (5)
SST440 / SST441
CORPORATION
ABSOLUTE MAXIMUM RATING S (TA = 25oC unless otherwise no ted)
Param ete r/Test Con di tion Symbol Limit Unit
Gate-Drain Voltage V
Gate-Source V olta ge V
Forward Gate Current I
Pow er Dissipation (per side) P
GD
GS
G
D
(total) 500 mW
Po w er Derati ng (per side) 2.4 mW/
(total) 4 mW/
Operating J unction Temperatu re T
Storage Temperat ure T
Lead Temperature (1/16" from cas e f or 10 seconds ) T
J
stg
L
ELECTRICAL CHARACTERI STIC S (TA = 25oC unless otherwise noted)
SST440 SST441
SYMBOL CHARACTERISTCS TYP
ST ATIC
V
(BR)GSS
) Gate-Source Cut off Voltage -3.5 -1 -6 -1 -6 VDS = 10V, ID = 1nA
V
GS(OFF
I
DSS
I
GSS
I
G
V
GS(F)
Gate-Source Breakdown Voltage -35 -25 -25
Saturation Drain Current
2
Gate Reverse Current
Gate Operating Current
Gate-Source Forward Voltage 0.7 V IG = 1mA, VDS = 0V
DYNAMIC
g
fs
g
os
g
fs
g
os
C
iss
C
rss
e
n
Common-Source Forward Transconductance 6 4.5 9 4.5 9 mS
Common-Source Output Conductance 20 200 200
Common-Source Forward Transconductance 5.5 mS
Common-Source Output Conductance 30
Common-Source Input Capacitance 3.5
Common-Source Reverse Transfer Capacitance 1
Equivalent Input Noise Voltage 4 nV/ Hz
MATCHING
| V
∆ | V
GS1-VGS2
| Differential Gate-Source Voltage 7 10 20 mV VDG = 10V, ID = 5mA
GS1-VGS2
|∆TGate-Source V oltage Differential Change with
Temperature
I
DSS1
I
DSS2
g
g
fs1
fs2
Saturation Drain Current Ratio 0.98 VDS = 10V, VGS = 0V
Transconductance Ratio 0.98
CMRR Common Mode Rejection Ratio 90 dB VDD = 5 to 10V, ID = 5mA
NOTES: 1. For design aid only, not subject to produ ction testing .
2. Pulse test; PW = 300µs, duty cycle ≤ 3%.
1
MIN MAX MIN MAX
15630630 mAVDS = 10V, VGS = 0V
-1 -500 -500 pA V
-0.2 nA T
-1 -500 -500 pA V
-0.2 nA T
10
10 T = 25 to 125
-25 V
-25 V
50 mA
300 mW
-55 to 150
-55 to 150
300
UNIT TEST CONDITIONS
I
= -1µA, VDS = 0V
G
V
= -15V, VDS = 0V
GS
= 125oC
A
= 10V, ID = 5mA
DG
= 125oC
A
V
= 10V, ID = 5mA
DG
f = 1kHz
µS
V
= 10V, ID = 5mA
DG
f = 100MHz
µS
V
= 10V, ID = 5mA
o
C
DG
f = 1MHz
V
= 10V, ID = 5mA
DG
f = 10kHz
T = -55 to 25
V
= 10V, ID = 5mA
DG
f= 1 kHz
pF
µV/
o
C
o
C
o
C
o
C
o
C
o
C
o
C
V
DG
I
= 5mA
D
=10V,
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