California Micro Devices PACS1284-06Q Datasheet

CALIFORNIA MICRO DEVICES

P/Acitve™ IEEE 1284 ECP/EPP Termination Network

PACS1284-06

Features

• Single chip IEEE 1284 parallel port termination

• 28 pin QSOP package, smallest physical solution

• 17 terminating lines in a single package

• In system ESD protection to 8KV, HBM

• In system ESD protection to 4KV per IEC1000-4-2

• Protects downstream devices to 30V

Product Description

California Micro Devices’ PACS1284-06 Parallel Port
Termination Network provides a complete integrated
solution for the entire IEEE 1284 interface in a single
QSOP package.

Advanced, enhanced high-speed parallel ports, con­forming to the IEEE 1284 standard, are used to provide
communications with external devices such as tape
back-up drives, ZIP drives, printers, parallel port SCSI
adapters, external LAN adapters, scanners, video
capture, and other PC peripherals. These advanced
ports support bi-directional transfers to 2MB/sec. To
effectively support these higher transfer data rates, the
IEEE 1284 standard recommends a combined termina­tion, pull-up filter network between the driver/receiver
and the cable at both ends of the parallel port interface.
In addition, government EMC compatibility requirements
impose strict filtering on the parallel port. California
Micro Devices’ PACS1284-06
Network addresses all of these requirements by provid-

Parallel Port Termination

Applications

• ECP/EPP Parallel Port termination

• PC Peripherals

• Notebook and Desktop computers

• Engineering Workstations and Servers

ing a seventeen line, IEEE 1284 compliant network in a
thin film integrated circuit. The device provides a
complete parallel port termination solution for space
critical applications by integrating a total of 43 discrete
components. In addition, all I/O pins are ESD
protected for contact discharges up to 4KV per the
Human Body Model. However, the output pins of the
device which have the highest probability of exposure
to ESD pulses are protected to 8KV, HBM, thereby
providing the necessary robustness for the port’s
application environment.

California Micro Devices’ P/Active technology provides
high reliability and low cost through manufacturing
efficiency. The resistors and capacitors are fabricated
using proprietary state-of-the-art thin film technology.
California Micro Devices’ solution is silicon-based and
has the same reliability characteristics as today’s
integrated circuits.

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© 2000 California Micro Devices Corp. All rights reserved.

8/25/2000

215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com

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Note 1: Human Body Model per MIL-STD-883, Method 3015

Note 2: Pin 22 grounded, pin 20 to V

Note 3: Standard IEC 1000-4-2 with C

C

pins 1, 2, 8, 10, 12, 15, 16, 17, 18, 19, 21, 23 through 28, one at a time.

Discharge

= 100pF, R

= 1.5 KΩ, pin 20 @ 5V and pin 22 @ ground.

Discharge

, all other pins are open. ESD contact discharge between ground and

CC

= 150pF, R

Discharge

Discharge

= 330Ω, pin 20 @ 5V and pin 22 @ ground.

©2000 California Micro Devices Corp. All rights reserved.

2

215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com

8/25/2000