CALIFORNIA MICRO DEVICES
ESD Protection Arrays, Chip Scale Package
PACDN2404C
PACDN2408C
PACDN2416C
Features
• 4, 8, or 16 transient voltage suppressors in a
single package
• In-system Electrostatic Discharge (ESD)
protection to 18kV contact discharge per
IEC 61000-4-2 international standard
• Compact Chip Scale Package (0.65mm pitch) format
saves board space and eases layout in space
critical applications compared to discrete
solutions and traditional wire bonded packages
Product Description
The PACDN2404C, PACDN2408C and PACDN2416C
are transient voltage suppressor arrays that provide a
very high level of protection for sensitive electronic
components that may be subjected to ESD. The back-toback zener connections provide ESD protection in cases
where nodes with AC signals are present.
These devices are designed and characterized to safely
dissipate ESD strikes at levels well beyond the maximum requirements set forth in the IEC 61000-4-2
international standard (Level 4, 8kV contact discharge).
All I/Os are rated at 18kV using the IEC 61000-4-2
Applications
• ESD protection of I/O port connections,
such as cellular phone, PDA, internet appliance
and PC ports
• Protection of interface ports or IC pins which are
exposed to high levels of ESD
• ESD protection of analog video and audio R, L, V
(right, left, video) ports
contact discharge method. Using the MIL-STD-883D
(Method 3015) specification for Human Body Model
(HBM) ESD, all pins are protected for contact discharges
to greater than 30kV.
The Chip Scale Package format of these devices enable
extremely small footprints that are necessary in portable
electronics such as cellular phones, PDAs, internet
appliances and PCs. The large solder bumps allow for
standard attachment to laminate boards without the use
of underfill.
B1A2B2A3B3
A1
PACDN2404C PACDN2408C
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© 2000 California Micro Devices Corp. All rights reserved.
7/17/2000
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
SCHEMATIC DIAGRAMS
D1C2D2C3D3C4D4C5D5
B1A2B2A3B3A4B4A5B5
C1
B1A2B2A3B3A4B4A5B5
A1
A1
PACDN2416C
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C1230700
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CALIFORNIA MICRO DEVICES
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* ESD applied between channel pin and ground, one at a time. All other channels are open. This
parameter is guaranteed by design and characterization
0.6
2.9–
04–
56–
PACDN2404C
PACDN2408C
PACDN2416C
6.7
6.7–
03±
81±
41
41–
2.9
0.6–
V
V
Vk
Vk
V
V
58
C°
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250
225
200
175
C)
o
150
125
100
Temperature (
75
50
25
0 48 97 145
194 242 290 339 387 435
Time (s)
Typical Solder Reflow Thermal Profile (No Clean Flux)
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©2000 California Micro Devices Corp. All rights reserved.
2
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
7/17/2000