California Micro Devices PACDN007Q Datasheet
CALIFORNIA MICRO DEVICES
18 CHANNEL ESD PROTECTION ARRAY
PAC DN007
Features
18-channel ESD protection
15KV ESD protection (HBM)
15KV contact discharge ESD protection
Applications
Parallel printer port protection
ESD protection for sensitive
electronic equipment.
per IEC 61000-4-2
Low loading capacitance, 7 pF typ.
24-pin QSOP package
Product Description
The PAC DN007 is a diode array designed to provide 18 channels of ESD protection for electronic components or
sub-systems. Each channel consists of a pair of diodes which steers the ESD current pulse either to the positive (V
negative (V
) supply. The PAC DN007 will protect against ESD pulses up to 15 KV Human Body Model, and 15KV
N
contact discharge per International Standard IEC 61000-4-2.
This device is particularly well-suited to provide additional ESD protection for parallel printer ports. It exhibits low
loading capacitance for all signal lines.
ABSOLUTE MAXIMUM RATINGS
Diode Forward DC Current
(Note 1) 40mA
Storage Temperature -65
°
C to 150°C
SCHEMATIC CONFIGURATION
Operating Temperature Range -20°C to 85°C
DC Voltage at any Channel Input V
Note 1: Only one diode conducting at a time.
-0.5V to VP+0.5V
N
P
) or
retemaraP.niM.pyT.xaM
(,tnerruCylppuSV
P
noitcetorPDSE
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)4,3setoN(
000stneisnartevitisoP
000stneisnartevitageN
V
P
V,V5=
,V0=VNIV5.2=
N
gnitaRrewoPegakcaP
Note 2: From I/O pins to VP or VN only. VP bypassed to VN with 0.2 µF ceramic capacitor.
Note 3: Human Body Model per MIL-STD-883, Method 3015, C
Note 4: This parameter is guaranteed by characterization.
Note 5: Standard IEC 61000-4-2 with C
©1999 California Micro Devices Corp. All rights reserved.
11/98
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
(egatloVylppuSgnitarepOV
V-
)V5.5
P
V-
N
,egatloVdrawroFedoiDI
F
N
,V5.5=)C°52=TAµ01
C°52=T,Am02=V56.0V59.0
metsys-ni,tupnIlennahCynataegatloVegrahcsiDkaeP
)4,3etoN(
)5etoN(
)2etoN(
C°52=T,MBHDSEVK51@egatloVpmalClennahC
C°52=T,tnerruCegakaeLlennahC Aµ1.0±Aµ0.1±
)zHM1@derusaeM(ecnaticapaCtupnIlennahC
)4etoN(
=100pF, R
Discharge
=150pF, and R
Discharge
P/Active® is a registered trademark and PAC is a trademark of California Micro Devices.
=330Ω, VP=5V, VN=GND.
Discharge
Discharge
SNOITACIFICEPSDRADNATS
VK51±
VK51±
V
Fp7Fp21
=1.5KΩ, VP=5.0V, VN=GND.
P
V
N
V0.31+
V0.31-
W0.1
C0290498D
1
CALIFORNIA MICRO DEVICES
Input Capacitance vs. Input Voltage
(pF)
IN
C
V
IN
Typical variation of CIN with V
(VP = 5V, V
egakcaPrebmuNtraPgniredrO
sniPelytSgnikraMtraP
42POSQQ700NDCAP
When placing an order please specify desired shipping: Tubes or Tape & Reel.
= 0V, 0.1µF chip capacitor between V
N
PAC DN007
IN
& VN)
P
NOITAMROFNIGNIREDROTRAPDRADNATS
Application Information
See also California Micro Devices Application note AP209, Design Considerations for ESD protection.
In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to minimize parasitic
series inductances to the Supply and Ground rails. Refer to Figure 1, which illustrates the case of a positive ESD pulse
applied between an input channel and Chassis Ground. The parasitic series inductance back to the power supply is
represented by L1. The voltage VZ on the line being protected is:
V
= Forward voltage drop of D1 + L1 x d(I
Z
where I
is the ESD current pulse, and V
esd
)/dt + V
esd
is the positive supply voltage.
Supply
Supply
Figure 1
An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact discharge per
the IEC 61000-4-2 standard results in a current pulse that rises from zero to 30 Amps in 1nS. Here d(I
approximated by ∆I
© 1999 California Micro Devices Corp. All rights reserved.
2
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
/∆t, or 30/(1x10
esd
-9
). So just 10nH of series inductance (L1) will lead to a 300V increment in VZ!
)/dt can be
esd
11/98
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