California Micro Devices PAC560GTL, PAC121GTL Datasheet

CALIFORNIA MICRO DEVICES

PAC560GTL

High Performance GTL Termination Network for Socket 370 Processors

Features

• 24 terminations in a single package

• 5 chip solution for all 119 GTL terminations

• High speed termination network

• Center ground pin placement reduces ground
bounce and eases board layout

• Very low cross-talk

• Saves board space and reduces assembly cost

Application Information

High speed microprocessors demand unique, high
speed bus termination. The PACGTL Termination
Network provides 24 terminations per package and
meets the requirements for high speed terminations.
The termination resistor values are 56 or 120 ohms
each. Five devices provide the necessary terminations
for the 32-bit address bus, 64-bit data bus, and the
control of status signals. Potential board layout solutions
are included in this datasheet.

This termination network provides high performance,
high reliability, and low cost through manufacturing

Applications

• High Performance Servers

• High Performance Desk Top Systems

• Intel Celeron™ and Pentium™ CPUs

efficiency. The termination resistor elements are
fabricated using state-of-the-art thin film manufacturing.
This integrated solution is silicon-based and has the
same reliability characteristics of today’s microprocessor
products. The thin film resistors have very high stability
over temperature, over applied voltage, and over life. In
addition, the QSOP (SSOP) industry standard packag­ing is easy to handle in manufacturing and yields high
reliability similar to other semiconductor components.

STANDARD CONFIGURATION

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82POSQLTG065CAP

82POSQLTG121CAP

When placing an order please specify desired shipping: Tubes or Tage & Reel.

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All trademarks are the property of their respective holders. P/Active® is a registered trademark and PAC™ is a trademark of California Micro Devices.

© 2000 California Micro Devices Corp. All rights reserved.

7/31/2000

215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com

C0970500

1

CALIFORNIA MICRO DEVICES

PAC560GTL

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RECOMMENDED LAYOUT FOR SOCKET 370 (OPTION A) FOR CELERON™
AND MENDOCINO™ CPUs

11-mil track pitch, single layer

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Note: This option requires 1 metal layer in board routing for all 119 GTL termination lines.

©2000 California Micro Devices Corp. All rights reserved.

2

215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com

7/31/2000