California Micro Devices PAC470RGQ, PAC500RGQ, PAC560RGQ, PAC680RGQ Datasheet

CALIFORNIA MICRO DEVICES

PACRG

P/Active



 High Performance GTL/ECL Local Termination Network



Features

• Designed especially for Pentium Pro and RISC­based computers/servers

• Provides high speed bus termination

• Reduces ground bounce with center ground

pin placement

• Terminates 22 lines in a QSOP package

• Saves board space and reduces assembly cost

Product Description

CAMD’s P/Active RG GTL+ Local Bus Terminator is ideal
for Pentium Pro and related high speed bus termination
applications where a resistor approach is deemed suitable.
This device also meets the high-speed bus termination
demands of microprocessors like Motorola’s PowerPC,
DEC’s Alpha, Sun’s SPARC, and SGI’s MIPs processor, as
well as other high performance RISC processors for
embedded control applications.

The PACRG offers 22 terminations per package and meets
all related Intel specifications for Pentium Pro termination
requirements. Four popular values are available for a
variety of bus termination applications and line impedance
requirements: 47, 50, 56 and 68 ohms.

Applications

• Pentium Pro servers

• Pentium Pro desk top systems

• GTL, ECL terminator for embedded

processor busses

Refer to AP-201 Termination Application Note and AP-203 GTL+
Termination Application Note for further information.

The P/Active RG Termination Networks provide high
performance, high reliability, and low cost through manu­facturing efficiency. The termination resistor elements are
fabricated using proprietary state-of-the-art thin film
technology. CAMD’s highly integrated solution is silicon­based and has the same enhanced reliability characteris­tics as today’s microprocessor products. The thin film
resistors have very high stability over a wide temperature
range, over applied voltage, and over life. In addition, the
QSOP industry standard packaging is manufacturing­friendly and yields the high reliability of other semiconduc­tor components. The P/Active RG Pentium Pro Termination
Network provides a complete 300 point termination
solution in only 14 QSOP packages.

PIN DIAGRAM

)R(ecnareloTetulosbA%5±

egnaRerutarepmeTgnitarepOC°07otC°0

rotsiseR/gnitaRrewoPWm001

erutarepmeTegarotSC°051otC°56–

gnitaRrewoPegakcaPxaM,w00.1

SNOITACIFICEPSDRADNATS

24

R

T

R

T

SEULAVDRADNATS

(R ΩΩΩΩΩ)edoC

74074

05005

65065

86086

1232223214205196187178169151014111312

NOITAMROFNIGNIREDROTRAPDRADNATS

egakcaPrebmuNtraPgniredrO

edoCRsniPelytSsebuTleeR&epaTgnikraMtraP

)%1(07442POSQT/QGR074CAPR/QGR074CAPQGR074CAP

)%1(00542POSQT/QGR005CAPR/QGR005CAPQGR005CAP

)%1(06542POSQT/QGR065CAPR/QGR065CAPQGR065CAP

)%1(08642POSQT/QGR086CAPR/QGR086CAPQGR086CAP

© 2000 California Micro Devices Corp. All rights reserved.

8/10/2000

215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com

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CALIFORNIA MICRO DEVICES

Cha

500mV/De

Cha

e

PACRG

Signal at Termination and Victim Line (TA=25OC) (See Test Circuit)

Channel 1 (500mV/division) Termination Signal, Channel 2 (250mV/division) Victim Voltage. The victim voltage
crosstalk measures 65mV in the critical areas around the system clock. The system clock occurs approximately 4ns
before each data transition. The horizontal dashed lines are 65mV apart. The time scale is 5.0ns/division. The signal
voltage rise and fall times have been adjusted at the driver to conform to Intel specifications.) Measurements made
using Tektronix TDS820 6 GHz Digitizing Oscilloscope with P6207 FET Probes.

250mV/D

Test Circuit Block Diagram

©2000 California Micro Devices Corp. All rights reserved.

2

215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com

8/10/2000