California Micro Devices CMPWR160 Datasheet

CALIFORNIA MICRO DEVICES

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USB Peripheral Power Management

CMPWR160

Features

• 3.3V regulated output up to 500mA

• Quiescent current 35µA (typical)

• Shutdown mode current 7µA (typical)

• 30ms active LOW Power-On Reset (POR) pulse

• Thermal overload protection

• Foldback current limiting protection

• Reverse-current protection

• 8 pin SOIC power package

The SmartORTM CMPWR160 combines a Low Dropout
Regulator (LDO) with a Power-On Reset (POR) pulse
generator, and is intended for Universal Serial Bus
(USB) peripherals. To meet the specification require­ments of both USB 1.0 and USB 2.0, the CMPWR160
draws a very low quiescent current (35µA), and delivers
up to 500mA of load current at a fixed 3.3V output.

The POR pulse (active LOW) has a typical duration of
30ms after the output has exceeded and stabilized
above 2.9V. Thus a new POR pulse is developed each
time the regulator power is interrupted and restored,
which occurs often on USB buses when cables are
connected (or disconnected) by the user. It is not
necessary to have a VCC supply for POR to operate,
allowing the CMPWR160 to work in Wired-ORed power
systems.

Applications

• Bus-powered USB peripherals

• Self-powered USB peripherals

• Portable/battery-powered devices

• Critical power monitoring, hot-insertion devices

When VCC is powered down, the device will automatically
enter reverse-current protection mode and maintain
isolation between V
tions that can use power from the USB port in addition to
internal batteries or an AC adapter supply (Wired-ORed
power systems). In the event of V

, the device will automatically enter shutdown mode

V

OUT

and fully isolate the V

A ShutDown input (
powered down on demand. While in shutdown mode the
POR circuitry will remain active, making the device
suitable for systems which contain backup or alternative
power sources.

The CMPWR160 is available in an 8-pin SOIC thermally
enhanced package, ideal for applications where space
is tight.

and VCC. This is useful for applica-

OUT

collapsing below

CC

power source from the output.

CC

SD

) forces the regulator to be

Block Diagra

V

CC

SD

V

GND

V

SD

POR

V

OUT

CC

Top View

1

2

3

4

CMPWR160

8 LEAD SOIC

8

GND

7

GND

6

GND

5

GND

Pin Diagram

Standard Part Ordering Informatio

Package Ordering Part Numbe

8 Power SOIC CMPWR160SA/T CMPWR160SA/R CMPWR160SA

©2000 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation.

12/5/2000

215 Topaz Street, Milpitas, California 95035  Tel: [phone] Fax: [phone] www.calmicro.com

Style T

SD

+

REF

3.3V

–

+

30ms

–

2.9V

Simplified Electrical Schematic

Tape & Reel Part Marking

V

OUT

3.3V/500mA

POR

C1571000

1

CALIFORNIA MICRO DEVICES

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5.5

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000

s

)

T

I

500

35.30.465

Absolute Maximum Ratin

Parameter Ratin

ESD Protection (HBM

VCC/V

Voltage 6.0, GND –0.5 V

OUT

SD Logic Input Voltage V

POR Logic Output Voltage V

OUT

2

+ 0.5, GND –0.5 V

CC

+ 0.5, GND –0.5

Temperature: Storage –40 to 150

Power Dissipation

Operating Ambient 0 to 70

Operating Junction 0 to 125

Note 1

Internally Limited

Operating Condition

Parameter Range

4.2 to

Temperature (Ambient) 0 to 70

Load Current 0 to 500 mA

10 ± 10% µF

C

EXT

ni

V

˚

ni

C

˚

CMPWR160

C

Electrical Operating Characteristic

(over operating conditions unless specified otherwise

Symbol Parameter

Regulator Output Voltage

OUT

I

Regulator Current Limit 550 mA

LIM

I

S/C

V

R LOAD

V

R LINE

Regulator Dropout Voltage MIN VCC – V

V

DO

Quiescent Supply Current Regulator Enabled (No Load) 35 50 µA

I

Q

Shutdown Supply Current Regulator Disabled 7 10 µA

I

SD

VCC Pin Reverse Leakage V

I

RCC

V

IH SD

V

IL SD

V

POR

T

POR

R

POR

Short-Circuit Current Limit 300 mA

Load Regulation VCC = 5V, I

Line Regulation VCC = 4.2V to 5.5V, I

Shutdown High Detect VCC = 5V 3.0 V

Shutdown Low Detect VCC = 5V 1.0 V

POR Detect Threshold 4.2V < VCC < 5.5V 2.8 2.9 3.0 V

POR Pulse Duration 20 30 40 ms

POR Output Impedance After POR Threshold Detected 0.2 0.5 2 kΩ

T

T

Note 1: The SOIC package used is thermally enhanced through the use of a fused integral leadframe. The power rating is based on a printed

Shutdown Temperature 160

DISABLE

Thermal Hysteresis 20

HYST

circuit board heat spreading capability equivalent to 2 square inches of copper connected to the GND pins. Typical multi-layer boards
using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. (Please
consult with factory for thermal evaluation assistance.)

mA <

OUT

Sinking to GND/Sourcing from V

onditions

<

LOAD

LOAD

OUT

mA

= 5mA to 500mA 75 mV

= 5mA 2 mV

LOAD

for I

= 500mA 0.6 0.9 V

LOAD

.1

NI

= 3.3V, VCC = 0V 1 10 µA

CC

˚
˚

C

C

©2000 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation.

215 Topaz Street, Milpitas, California 95035  Tel: [phone] Fax: [phone] www.calmicro.com

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12/5/2000

CALIFORNIA MICRO DEVICES

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V

.

Interface Signals

CMPWR160

VCC is the input power source for the Low Drop Out

Regulator, capable of delivering 3.3V/500mA output
current even when the input is as low as 4.2V.

Internal loading on this pin is typically 35µA when the
regulator is enabled, which reduces to only 7µA when-

SD

ever the regulator is shutdown (
event of V

collapsing below V

CC

taken Low). In the

, the loading at VCC will

OUT

immediately reduce to less than 0.1µA.

If the V

pin is within a few inches of the main input

CC

filter, a capacitor may not be necessary. Otherwise an
input filter capacitor in the range of 1µF to 10µF will
ensure adequate filtering.

is the regulator shutdown input logic signal which is

SD

Active Low. This is a true CMOS input signal referenced
to V

supply. When the pin is tied High (VCC ) the

CC

regulator operates fully. When the pin is taken to GND,
the device enters shutdown mode and the regulator is
fully disabled. In this mode all critical

POR

circuitry

remains fully powered consuming less than 7µA (typical).

V

is the regulator output voltage used to power the

OUT

load. An output capacitor of 10µF is used to provide the
necessary phase compensation, thereby preventing
oscillation. The capacitor also helps to minimize the peak
output disturbance during line or load transients. When­ever V

collapses below the output the device immedi-

CC

ately enters reverse protection mode to prevent any
current flow back into the regulator pass transistor.
Under these conditions V

will also be used to provide

OUT

the necessary quiescent current for the internal refer­ence and

POR

circuits. This ensures excellent start-up

characteristics for the regulator.

POR

is the Power-On-Reset output pin (Active Low).

When V

rises above the

OUT

POR

threshold voltage
(typically 2.9V), the pin is forced to logic low (GND). The
pin remains logic low for 30ms then it is forced logic high
(3.3V). If V

falls below the

OUT

during this 30ms interval

POR

threshold voltage

POR

will remain logic low. If it
falls below the voltage threshold and then recovers the
30ms time will reset.

If V

falls below the

OUT

POR

threshold voltage

POR

is

immediately forced to logic low.

The power-on reset circuitry is designed to remain active
under all conditions and will produce a valid output even
when V

is not present. A very low quiescent current

CC

(7µA typical) ensures continuous operation of the POR
circuit.

GND is the negative reference for all voltages. This
current that flows in the ground connection is very low
(35µA typical with the regulator enabled and 7µA typical
with the regulator disabled).

Pin Function

Symbol Descriptio

Positive supply input for regulator. When V falls below

the regulator is disabled

T

SD Shutdown control input signal (Active Low) to disable internal voltage regulator and current supply

to less than 7µA.

POR Power-On-Reset output signal is held Low until the output has been stable (>2.9V) for at least 30ms.

V

Regulator voltage ouput (3.3V) capable of delivering 500mA when device is enabled (SD is High).

OUT

Whenever the output exceeds 2.9V (TYP) the POR pulse is triggered.

GND Negative reference for all voltages

CMPWR160

V

CC

C

+

V

CC

5V

+

–

IN

1µF

SD

GND

POR

V

OUT

+

C

OUT

10µF

uP Reset

V

OUT

3.3V/500mA

GND

Typical Application Circuit

©2000 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation.

12/5/2000

215 Topaz Street, Milpitas, California 95035  Tel: [phone] Fax: [phone] www.calmicro.com

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