California Micro Devices CMPWR025 Datasheet

CALIFORNIA MICRO DEVICES

Dual Input SmartOR™ Power Switch

CMPWR025

FEATURES

• Automatically selects V

• Integrated low impedance switches (0.2Ω TYP)

• Operating supply range from 2.8V to 5.5V

• Glitch-free output during supply switching
transitions

• Low operating supply current of 20µA (TYP)

• User-selectable hysteresis for supply selection

• 8-pin SOIC Narrow or 8-pin MSOP packages

CC1

OR V

input source

CC2

PRODUCT DESCRIPTION

California Micro Devices’ SmartOR™ CMPWR025 is a
dual input power switch that selects between two
different power inputs and delivers it to one output. The
device integrates two very low impedance power
switches and automatically implements an OR function
that selects the higher of the two inputs. A hysteresis is
built in (and is user selectable) to prevent switch chatter.

The CMPWR025 is a much-improved solution to simply
ORing two diodes, due to the greatly reduced losses of
the CMPWR025 when compared to low forward drop
Schottky diodes.

APPLICATIONS

• PCI cards for Wake-On-LAN/Wake-On-Ring

• Dual power systems

• Systems with standby capabilities

• Battery backup systems

• See Application Note AP211

The CMPWR025 is designed to operate above the 1W
(375mA at 3.3V) sleep mode rating stated in the PCI
Rev 2.2 spec. In fact the CMPWR025 current rating is
dependent upon the power dissipation resulting from the
voltage drop across the internal switch elements. See
the Typical DC Characteristics section in this data sheet
for details.

For IAPC (Instantly Available Personal Computer)
applications see the CAMD Applications Note AP211
“Instantly Available PCI Card Power Management”.

PIN DIAGRAM, TYPICAL APPLICATION CIRCUIT, AND SIMPLIFIED BLOCK DIAGRAM

Top View

1

V

CC1

V

2

CC1

3

V

CC2

4

V

CC2

8-Pin SOIC Narrow and MSOP Package

CMPWR025

8

HYS

7

V

OUT

6

V

OUT

5

GND

+

V

CC1

5V

–

+

V

CC2

5V

–

CMPWR025

V

CC1

V

CC2

HYS

GND

V

OUT

Pin Diagram

Typical Application Circuit

V

OUT

V

CC1

V

CC2

HYS

GND

GND

SW1

0.2Ω

+

–

GND

SW2

0.2Ω

GND

Simplified Block Diagram

V

OUT

+

C

OUT

10µF

GND

© 2000 California Micro Devices Corp. All rights reserved.

10/18/2000

215 Topaz Street, Milpitas, California 95035  Tel: [phone] Fax: [phone] www.calmicro.com

C0970500

1

CALIFORNIA MICRO DEVICES

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Note 1: This parameter applies at 25°C only.
Note 2: Hysteresis level defines the maximum level of acceptable noise on V

Note 3: This is the time, after the select/deselect threshold is reached, for the switches to react. Not tested, guaranteed by device design

©2000 California Micro Devices Corp. All rights reserved.

board traces to the CMPWR025 may require an input capacitor to adequately filter the supply noise to below the hysteresis level.
This will ensure that precise switching occurs between V

and characterization.

CC1

and V

during switching. Excessive parasitic inductance on V

CC

supply inputs.

CC2

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10/18/2000215 Topaz Street, Milpitas, California 95035  Tel: [phone] Fax: [phone] www.calmicro.com

CALIFORNIA MICRO DEVICES

INTERFACE SIGNALS

V

is the primary power source, which is given priority

CC1

when present. If pin 8 (HYS) is unconnected, then the
hysteresis level is 75mV (typ.). Whenever the primary
power source drops below the secondary supply V
more than 125mV, it will immediately become dese­lected. When the primary power source is restored to
within 50mV of the secondary supply, the primary power
source will once again be selected and provide all the
output current.

When V

is selected, it will supply all the internal

CC1

current requirements which are typically 20µA. When
V

is not selected, there will be no current loading on

CC1

this input.

V

is the secondary power source and is selected

CC2

when the primary source has fallen below it by more
than 125mV (or 200mV if pin 8 is grounded). The
secondary source will be deselected immediately once
the primary source is restored to within 50mV of V

When V

is selected, it will supply all the internal

CC2

current requirements which are typically 20µA. When
V

is not selected, there will be no current loading on

CC2

this input.

GND is the negative reference for all voltages.

V

provides the power for the load. During normal

OUT

operation the impedance from V

to the selected

OUT

CC2

CC2

by

.

CMPWR025

supply is typically less than 0.28Ω, which results in
minimal voltage loss from input to output.

During the cold-start interval when both inputs are
initially applied, the internal circuitry provides a soft
turn-on for the switches, which limits peak in-rush
current.

HYS is the user-selectable hysteresis input. The hyster­esis level is set to 150mV when grounding pin 8. The
default hysteresis level is set to 75mV by leaving pin 8
unconnected. Using 150mV hysteresis is recommended,
especially in environments with noisy power supplies,
high power supply resistances or high load currents.

If the hysteresis level is set to 150mV, the primary
supply V
supply V

Important note: There is an internal connection
between pins 1 and 2. These pins must be connected
externally.

There is an internal connection between pins 3 and 4.
These pins must be connected externally.

There is an internal connection between pins 6 and 7.
These pins must be connected externally.

must now fall 200mV below the secondary

CC1

before it becomes deselected.

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© 2000 California Micro Devices Corp. All rights reserved.

10/18/2000

215 Topaz Street, Milpitas, California 95035  Tel: [phone] Fax: [phone] www.calmicro.com

3