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Q

S

SCHEMATIC CAPTURE
SHEMATIC CAPTURE
SIMULATION FOR PCB DESIGN
SIP DESIGN
SiP Digital Architect
SiP Digital SI
SiP Layout
SiP Layout and Chip Integration Option
SIP RF
SiP RF Architect
SiP RF design
SOC ENCOUNTER RTL-TO-GDSII SYSTEM
SPACE-BASED ROUTER
SQA1200.1
SQA 250.2
SQA 500.4
SQA 600.1
SQA 750.6
Subwoofer
SWB8.2BT-B
SWB8.2BT-W

T

T1
Telephony

U

Ultrashock CEQ-600
United Boston
United Chicago
United Dakota
United Olympia
United Phoenix
UNITED series
United Vegas

V

VIRTUOSO ANALOG DESIGN ENVIRONMENT GXL
VIRTUOSO ANALOG DESIGN ENVIRONMENT L
VIRTUOSO ANALOG DESIGN ENVIRONMENT XL
VIRTUOSO ANALOG DESIGN ENVIRONMENT XL - DATASHEET 2
VIRTUOSO CHIP ASSEMBLY ROUTER
VIRTUOSO DIGITAL IMPLEMENTATION
VIRTUOSO LAYOUT MIGRATE
VIRTUOSO LAYOUT SUITE GXL
VIRTUOSO LAYOUT SUITE L
VIRTUOSO LAYOUT SUITE XL
VIRTUOSO MULTI-MODE SIMULATION
Virtuoso Multi-Mode Simulation 7.2
VIRTUOSO SCHEMATIC EDITOR L
VIRTUOSO SCHEMATIC EDITOR XL
VOLTAGESTORM POWER
VoltageStorm Power Rail Verification
VoltageStorm Power Verification

W

WCTL2982.0
WETL21021
Wild Beast 10-2
Wild Beast 10-4
Wild Beast 12-2
Wild Beast 12-4
Wild Beast 15-2
WLTL39810.0
WLTL42570

X

XAM series
Xenith
XENITH series
Xenith Xa125.22
XENITH Xa125.42

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SPACE-BASED ROUTER

4 pgs465.63 Kb0

Table of contents

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Cadence SPACE-BASED ROUTER Datasheet

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Cadence Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

Cadence SPACE-BASED ROUTER Datasheet

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