Burr Brown Corporation DAC7725UB-1K, DAC7725UB, DAC7725U-1K, DAC7725U, DAC7725NB-750 Datasheet

12-Bit Quad Voltage Output

DIGITAL-TO-ANALOG CONVERTER

®

DAC7724
DAC7725

DESCRIPTION

The DAC7724 and DAC7725 are 12-bit quad voltage
output digital-to-analog converters with guaranteed
12-bit monotonic performance over the specified tem­perature range. They accept 12-bit parallel input data,
have double-buffered DAC input logic (allowing simul­taneous update of all DACs), and provide a readback
mode of the internal input registers. An asynchronous
reset clears all registers to a mid-scale code of 800

H

(DAC7724) or to a zero-scale of 000H (DAC7725). The
DAC7724 and DAC7725 can operate from a single
+15V supply, or from +15V and –15V supplies.

Low power and small size per DAC make the DAC7724
and DAC7725 ideal for automatic test equipment,
DAC-per-pin programmers, data acquisition systems,
and closed-loop servo-control. The DAC7724 and
DAC7725 are available in a PLCC-28 or a SO-28
package, and offer guaranteed specifications over the
–40°C to +85°C temperature range.

FEATURES

● LOW POWER: 250mW max

● SINGLE SUPPLY OUTPUT RANGE: +10V

● DUAL SUPPLY OUTPUT RANGE: ±10V

● SETTLING TIME: 10µs to 0.012%

● 12-BIT LINEARITY AND MONOTONICITY:

–40°C to +85°C

● RESET TO MID-SCALE (DAC7724) OR

ZERO-SCALE (DAC7725)

● DATA READBACK

● DOUBLE-BUFFERED DATA INPUTS

APPLICATIONS

● PROCESS CONTROL

● CLOSED-LOOP SERVO-CONTROL

● MOTOR CONTROL

● DATA ACQUISITION SYSTEMS

© 1999 Burr-Brown Corporation PDS-1517B Printed in U.S.A. April, 2000

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone]

Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

DAC A

DAC

Register A

Input

Register A

I/O

Buffer

Control

Logic

DAC B

DAC

Register B

Input

Register B

DAC C

DAC

Register C

Input

Register C

DAC D

DAC

Register D

Input

Register D

V

REFH

V

CC

V

DD

V

SS

V

OUTD

V

OUTC

V

OUTB

V

OUTA

V

REFL

RESET LDAC

GND

A0
A1

R/W

CS

DB0-DB11

12

For most current data sheet and other product

information, visit www.burr-brown.com

DAC7724

DAC7725

2

®

DAC7724, 7725

SPECIFICATION (DUAL SUPPLY)

At TA = –40°C to +85°C, VCC = +15V, VDD = +5V, VSS = –15V, V

REFH

= +10V, V

REFL

= –10V, unless otherwise noted.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

DAC7724N, U DAC7724NB, UB

DAC7725N, U DAC7725NB, UB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
ACCURACY

Linearity Error ±2 ±1 LSB

(1)

Linearity Matching

(2)

±2 ±1 LSB
Differential Linearity Error ±1 ±1 LSB
Monotonicity T

MIN

to T

MAX

12 ✻ Bits

Zero-Scale Error Code = 000

H

±2 ✻ LSB
Zero-Scale Drift 1 ✻ ppm/°C
Zero-Scale Matching

(2)

±2 ±1 LSB
Full-Scale Error Code = FFF

H

±2 ✻ LSB
Full-Scale Matching

(2)

±2 ±1 LSB
Power Supply Sensitivity At Full Scale 10 ✻ ppm/V

ANALOG OUTPUT

Voltage Output

(3)

V

REFL

V

REFH

✻✻V
Output Current ±5 ✻✻mA
Load Capacitance No Oscillation 500 ✻ pF
Short-Circuit Current ±20 ✻ mA
Short-Circuit Duration To V

SS

, VCC, or GND Indefinite ✻

REFERENCE INPUT

V

REFH

Input Range

V

REFL

+1.25

+10 ✻✻V

V

REFL

Input Range –10

V

REFH

– 1.25

✻✻V
Ref High Input Current –0.5 3.0 ✻✻mA
Ref Low Input Current –3.5 0 ✻✻mA

DYNAMIC PERFORMANCE

Settling Time To ±0.012%, 20V Output Step 8 10 ✻✻ µs
Channel-to-Channel Crosstalk

Full-Scale Step

0.25 ✻ LSB
Digital Feedthrough 2 ✻ nV-s
Output Noise Voltage f = 10kHz 65 ✻ nV/√Hz

DIGITAL INPUT/OUTPUT

Logic Family TTL-Compatible CMOS ✻
Logic Levels

V

IH

IIH ≤ ±10µA 2.4 VDD +0.3 ✻✻V

V

IL

IIL ≤ ±10µA –0.3 0.8 ✻✻V

V

OH

IOH = –0.8mA 3.6 V

DD

✻✻V

V

OL

IOL = 1.6mA 0.0 0.4 ✻✻V

Data Format Straight Binary ✻

POWER SUPPLY REQUIREMENTS

V

DD

+4.75 +5.25 ✻✻V

V

CC

+14.25 +15.75 ✻✻V

V

SS

–14.25 –15.75 ✻✻V

I

DD

50 ✻✻ µA

I

CC

6 8.5 ✻✻ mA

I

SS

–8 –6 ✻✻ mA

Power Dissipation 180 250 ✻✻ mW

TEMPERATURE RANGE

Specified Performance –40 +85 ✻✻°C

NOTES: (1) LSB means Least Significant Bit, when V

REFH

equals +10V and V

REFL

equals –10V, then one LSB equals 4.88mV. (2) All DAC outputs will match within

the specified error band. (3) Ideal output voltage, does not take into account zero or full-scale error.

3

®

DAC7724, 7725

SPECIFICATION (SINGLE SUPPLY)

At TA = –40°C to +85°C, VCC = +15V, VDD = +5V, VSS = GND, V

REFH

= +10V, V

REFL

= 0V, unless otherwise noted.

DAC7724N, U DAC7724NB, UB

DAC7725N, U DAC7725NB, UB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
ACCURACY

Linearity Error

(1)

±2 ±1 LSB

(2)

Linearity Matching

(3)

±2 ±1 LSB
Differential Linearity Error ±1 ±1 LSB
Monotonicity T

MIN

to T

MAX

12 ✻ Bits

Zero-Scale Error Code = 004

H

±4 ✻ LSB
Zero-Scale Drift 2 ✻ ppm/°C
Zero-Scale Matching

(3)

±4 ±2 LSB
Full-Scale Error Code = FFF

H

±4 ✻ LSB
Full-Scale Matching

(3)

±4 ±2 LSB
Power Supply Sensitivity At Full Scale 20 ✻ ppm/V

ANALOG OUTPUT

Voltage Output

(4)

V

REFL

V

REFH

✻✻V
Output Current ±5 ✻ mA
Load Capacitance No Oscillation 500 ✻ pF
Short-Circuit Current ±20 ✻ mA
Short-Circuit Duration To V

CC

or GND Indefinite ✻

REFERENCE INPUT

V

REFH

Input Range

V

REFL

+1.25

+10 ✻✻V

V

REFL

Input Range 0

V

REFH

– 1.25

✻✻V
Ref High Input Current –0.3 1.5 ✻✻mA
Ref Low Input Current –2.0 0 ✻✻mA

DYNAMIC PERFORMANCE

Settling Time

(5)

To ±0.012%, 10V Output Step 8 10 ✻✻ µs
Channel-to-Channel Crosstalk 0.25 ✻ LSB
Digital Feedthrough 2 ✻ nV-s
Output Noise Voltage f = 10kHz 65 ✻ nV/√Hz

DIGITAL INPUT/OUTPUT

Logic Family TTL-Compatible CMOS ✻
Logic Levels

V

IH

IIH ≤ ±10µA 2.4 VDD +0.3 ✻✻V

V

IL

IIL ≤ ±10µA –0.3 0.8 ✻✻V

V

OH

IOH = –0.8mA 3.6 V

DD

✻✻V

V

OL

IOL = 1.6mA 0.0 0.4 ✻✻V

Data Format Straight Binary ✻

POWER SUPPLY REQUIREMENTS

V

DD

+4.75 +5.25 ✻✻V

V

CC

14.25 15.75 ✻✻V

I

DD

50 ✻✻ µA

I

CC

3.0 ✻✻ mA

Power Dissipation 45 ✻ mW

TEMPERATURE RANGE

Specified Performance –40 +85 ✻✻°C

NOTES: (1) If V

SS

= 0V, specification applies at code 004H and above. (2) LSB means Least Significant Bit, when V

REFH

equals +10V and V

REFL

equals 0V, then
one LSB equals 2.44mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error.
(5) Full-scale positive 10V step and negative step from code FFF

H

to 004H.

4

®

DAC7724, 7725

RefH

V

SS

V

CC

V

DD

V

CC

V

SS

V

DD

GND

V

OUT

RefL

1 of 4

Typ of Each

Logic Input Pin

Typ of Each

I/O Pin

ABSOLUTE MAXIMUM RATINGS

(1)

V

CC

to VSS........................................................................... –0.3V to +32V

V

CC

to GND......................................................................... –0.3V to +16V

V

SS

to GND ......................................................................... +0.3V to –16V

V

DD

to GND............................................................................. –0.3V to 6V

V

REF

H to GND ....................................................................... –9V to +11V

V

REF

L to GND (VSS = –15V) ................................................. –11V to +9V

V

REF

L to GND (VSS = 0V) .................................................... –0.3V to +9V

V

REFH

to V

REFL

....................................................................... –1V to +22V

Digital Input Voltage to GND ................................... –0.3V to V

DD

+ 0.3V

Digital Output Voltage to GND ................................. –0.3V to V

DD

+ 0.3V

Maximum Junction Temperature................................................... +150°C

Operating Temperature Range ........................................–40°C to +85°C

Storage Temperature Range ......................................... –65°C to +150°C

Lead Temperature (soldering, 10s) ............................................... +300°C

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.

PACKAGE/ORDERING INFORMATION

MAXIMUM MAXIMUM

LINEARITY DIFFERENTIAL PACKAGE SPECIFICATION

ERROR NONLINEARITY ERROR DRAWING TEMPERATURE ORDERING TRANSPORT

PRODUCT (LSB) (LSB) PACKAGE NUMBER RANGE NUMBER

(1)

MEDIA

DAC7724N ±2 ±1 PLCC-28 251 –40°C to +85°C DAC7724N Rails

"" " "" "DAC7724N/750 Tape and Reel

DAC7724NB ±1 ±1 PLCC-28 251 –40°C to +85°C DAC7724NB Rails

"" " "" "DAC7724NB/750 Tape and Reel

DAC7724U ±2 ±1 SO-28 217 –40°C to +85°C DAC7724U Rails

"" " "" "DAC7724U/1K Tape and Reel

DAC7724UB ±1 ±1 SO-28 217 –40°C to +85°C DAC7724UB Rails

"" " "" "DAC7724UB/1K Tape and Reel

DAC7725N ±2 ±1 PLCC-28 251 –40°C to +85°C DAC7725N Rails

"" " "" "DAC7725N/750 Tape and Reel

DAC7725NB ±1 ±1 PLCC-28 251 –40°C to +85°C DAC7725NB Rails

"" " "" "DAC7725NB/750 Tape and Reel

DAC7725U ±2 ±1 SO-28 217 –40°C to +85°C DAC7725U Rails

"" " "" "DAC7725U/1K Tape and Reel

DAC7725UB ±1 ±1 SO-28 217 –40°C to +85°C DAC7725UB Rails

"" " "" "DAC7725UB/1K Tape and Reel

NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /750 indicates 750 devices per reel). Ordering 750 pieces
of “DAC7724/750” will get a single 750-piece Tape and Reel.

ESD PROTECTION CIRCUITS

5

®

DAC7724, 7725

Top View

PIN CONFIGURATIONS

PIN DESCRIPTIONS

PIN NAME DESCRIPTION

1V

REFH

Reference Input Voltage High. Sets maximum output voltage for all DACs.

2V

OUTB

DAC B Voltage Output.

3V

OUTA

DAC A Voltage Output.

4V

SS

Negative Analog Supply Voltage, 0V or –15V.
5 GND Ground.
6 RESET Asynchronous Reset Input. Sets DAC and input registers to either mid-scale (800

H

, DAC7724) or zero-scale (000H, DAC7725)

when LOW.
7 LDAC Load DAC Input. All DAC Registers are transparent when LOW.
8 DB0 Data Bit 0. Least significant bit of 12-bit word.
9 DB1 Data Bit 1

10 DB2 Data Bit 2
11 DB3 Data Bit 3
12 DB4 Data Bit 4
13 DB5 Data Bit 5
14 DB6 Data Bit 6
15 DB7 Data Bit 7
16 DB8 Data Bit 8
17 DB9 Data Bit 9
18 DB10 Data Bit 10
19 DB11 Data Bit 11. Most significant bit of 12-bit word.
20 R/W Read/Write Control Input (read = HIGH, write = LOW).
21 A1 Register/DAC Select (C or D = HIGH, A or B = LOW).
22 A0 Register/DAC Select (B or D = HIGH, A or C = LOW).
23 CS Chip Select Input.
24 V

DD

Positive Digital Supply, +5V.

25 V

CC

Positive Analog Supply Voltage, +15V nominal.

26 V

OUTD

DAC D Voltage Output.

27 V

OUTC

DAC C Voltage Output.

28 V

REFL

Reference Input Voltage Low. Sets minimum output voltage for all DACs.

1
2
3
4
5
6
7
8

9
10
11
12
13
14

V

REFH

V

OUTB

V

OUTA

V

SS

GND

RESET

LDAC

(LSB) DB0

DB1
DB2
DB3
DB4
DB5
DB6

V

REFL

V

OUTC

V

OUTD

V

CC

V

DD

CS
A0
A1
R/W
DB11 (MSB)
DB10
DB9
DB8
DB7

28
27
26
25
24
23
22
21
20
19
18
17
16
15

DAC7724
DAC7725

GND

RESET

LDAC

(LSB) DB0

DB1
DB2
DB3

5

6

7

8

9

10

11

25

24

23

22

21

20

19

V

CC

V

DD

CS
A0
A1
R/W
DB11 (MSB)

VSSV

OUTAVOUTBVREFHVREFLVOUTCVOUTD

DB4

DB5

DB6

DB7

DB8

DB9

DB10

4 3 2 1 28 27 26

12 13 14 15 16 17 18

DAC7724
DAC7725

SO PLCC