Burr Brown Corporation ADS800U-1K, ADS800U, ADS800E-1K, ADS800 Datasheet

ADS800U

ADS800E

®

ADS800

12-Bit, 40MHz Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

● LOW POWER: 390mW

● INTERNAL REFERENCE

● WIDEBAND TRACK/HOLD: 65MHz

● SINGLE +5V SUPPLY

● PACKAGE: 28-Lead SOIC and

28-Lead SSOP

APPLICATIONS

● IF AND BASEBAND DIGITIZATION

● DIGITAL COMMUNICATIONS

● ULTRASOUND IMAGING

● GAMMA CAMERAS

● TEST INSTRUMENTATION

● CCD IMAGING

Copiers
Scanners
Cameras

● VIDEO DIGITIZING

TM

DESCRIPTION

The ADS800 is a low power, monolithic 12-bit, 40MHz
analog-to-digital converter utilizing a small geometry
CMOS process. This COMPLETE converter includes
a 12-bit quantizer, wideband track/hold, reference and
three-state outputs. It operates from a single +5V
power supply and can be configured to accept either
differential or single-ended input signals.

The ADS800 employs digital error correction to pro­vide excellent Nyquist differential linearity perfor­mance for demanding imaging applications. Its low
distortion, high SNR and high oversampling capability
give it the extra margin needed for telecommunications,
test instrumentation and video applications.

This high performance A/D converter is specified over
temperature for AC and DC performance at a 40MHz
sampling rate. The ADS800 is available in 28-lead
SOIC and SSOP packages.

CLK

Timing

Circuitry

MSBI OE

IN

IN

REFT

CM

REFB

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone] • Twx: 910-952-1111

Internet: http://www.burr-brown.com/ • FAXLine: [phone] (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

©

1995 Burr-Brown Corporation PDS-1286E Printed in U.S.A. November, 1996

T/H

+3.25V

+1.25V

Pipeline

A/D

Error

Correction

Logic

3-State

Outputs

12-Bit
Digital

Data

SPECIFICATIONS

At TA = +25°C, VS = +5V, Sampling Rate = 40MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.

ADS800U (SOIC) ADS800E (SSOP)

PARAMETER CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS

Resolution 12 ✻ Bits
Specified Temperature Range T
Operating Temperature Range T

AMBIENT
AMBIENT

0 +70 ✻

–40 +85 ✻✻°C

ANALOG INPUT

Differential Full Scale Input Range Both Inputs, +1.25 +3.25 ✻✻V

180° Out of Phase
Common-Mode Voltage +2.25 ✻ V
Analog Input Bandwidth (–3dB)

Small Signal –20dBFS

(2)

Input +25°C 400 ✻ MHz

Full Power 0dBFS Input +25°C65 ✻ MHz

Input Impedance 1.25 || 4 ✻ MΩ || pF

DIGITAL INPUT

Logic Family
Convert Command Start Conversion

ACCURACY

(3)

TTL/HCT Compatible CMOS

Falling Edge

Gain Error +25°C ±0.4 ±1.5 ✻✻ %

Full ±0.6 ±2.5 ✻✻ %
Gain Drift ±95 ✻ ppm/°C
Power Supply Rejection of Gain Delta +V
Input Offset Error Full ±2.6 ±3.5 ✻✻ %
Power Supply Rejection of Offset Delta +V

= ±5% +25°C 0.01 0.15 ✻✻%FSR/%

S

= ±5% +25°C 0.02 0.15 ✻✻%FSR/%

S

CONVERSION CHARACTERISTICS

Sample Rate 10k 40M ✻✻Sample/s
Data Latency 6.5 ✻ Convert Cycle

DYNAMIC CHARACTERISTICS

Differential Linearity Error

f = 500kHz t

= 13ns

H

(4)

+25°C ±0.6 ±1.0 ✻ LSB

Full ±0.8 ✻ LSB

f = 12MHz +25°C ±0.4 ±1.0 ±0.7 LSB

No Missing Codes t
Integral Linearity Error at f = 500kHz Full ±1.9 ✻ LSB

= 13ns

H

(4)

Full ±0.5 ±0.8 LSB

+25°C Guaranteed Guaranteed LSB

Spurious-Free Dynamic Range (SFDR)

f = 500kHz (–1dBFS input) +25°C6572 ✻✻ dBFS

Full 60 66 ✻✻ dBFS

f = 12MHz (–1dBFS input) +25°C5861 ✻✻ dBFS

Two-Tone Intermodulation Distortion (IMD)

(5)

Full 55 61 ✻✻ dBFS

f = 4.4MHz and 4.5MHz (–7dBFS each tone) +25°C –63 ✻ dBc

Full –62 ✻ dBc
Signal-to-Noise Ratio (SNR)

f = 500kHz (–1dBFS input) +25°C6164 59✻ dB

Full 57 63 ✻✻ dB

f = 12MHz (–1dBFS input) +25°C6162 59✻ dB

Full 56 62 ✻✻ dB
Signal-to-(Noise + Distortion) (SINAD)

f = 500kHz (–1dBFS input) +25°C5963 57✻ dB

Full 54 64 ✻✻ dB

f = 12MHz (–1dBFS input) +25°C5658 54✻ dB

Full 51 57 ✻✻ dB
Differential Gain Error NTSC or PAL +25°C 0.5 ✻ %
Differential Phase Error NTSC or PAL +25°C 0.1 ✻ degrees
Aperture Delay Time +25°C2 ✻ ns
Aperture Jitter +25°C7 ✻ps rms
Overvoltage Recovery Time

(6)

1.5x Full Scale Input +25°C2 ✻ ns

NOTE: (1) An asterisk (✻) indicates same specifications as the ADS800U. (2) dBFS refers to dB below Full Scale. (3) Percentage accuracies are referred to the
internal A/D Full Scale Range of 4Vp-p. (4) Refer to Timing Diagram footnotes for the guaranteed differential linearity performance and no missing codes condition
for the SOIC and SSOP packages. (5) IMD is referred to the larger of the two input signals. If referred to the peak envelope signal (≈0dB), the intermodulation
products will be 7dB lower. (6) No “rollover” of bits.

(1)

✻ °C

TTL/HCT Compatible CMOS

Falling Edge

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

®

ADS800

2

SPECIFICATIONS (CONT)

At TA = +25°C, VS = +5V, Sampling Rate = 40MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.

ADS800U (SOIC) ADS800E (SSOP)
PARAMETER CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS
OUTPUTS

Logic Family
Logic Coding Logic Selectable
Logic Levels Logic “LO”, Full 0 0.4 ✻✻V

3-State Enable Time 20 40 ✻✻ ns
3-State Disable Time Full 2 10 ✻✻ ns

POWER SUPPLY REQUIREMENTS

Supply Voltage: +V
Supply Current: +I

Power Consumption Operating +25°C 390 465 ✻✻ mW

Thermal Resistance,
28-Lead SOIC 75 °C/W
28-Lead SSOP 50 °C/W

✻ Specifications same as ADS800U.

S

S

θ

JA

C

= 15pF max

L

Logic “HI”, Full +2.5 +V

C

= 15pF max

L

Operating Full +4.75 +5.0 +5.25 ✻✻✻ V
Operating +25°C7893 ✻✻ mA
Operating Full 78 97 ✻✻ mA

Operating Full 390 485 ✻✻ mW

TTL/HCT Compatible CMOS

SOB or BTC

S

TTL/HCT Compatible CMOS

SOB or BTC

✻✻V

ABSOLUTE MAXIMUM RATINGS

+VS.......................................................................................................+6V

Analog Input..............................................................0V to (+V

Logic Input ................................................................ 0V to (+V

Case Temperature ......................................................................... +100°C

Junction Temperature .................................................................... +150°C

Storage Temperature..................................................................... +125°C

External Top Reference Voltage (REFT) .................................. +3.4V Max

External Bottom Reference Voltage (REFB)..............................+1.1V Min

NOTE: (1) Stresses above these ratings may permanently damage the device.

+ 300mV)

S

+ 300mV)

S

PACKAGE/ORDERING INFORMATION

PACKAGE
DRAWING TEMPERATURE

PRODUCT PACKAGE NUMBER

ADS800U 28-Lead SOIC 217 –40°C to +85°C
ADS800E 28-Lead SSOP 324 –40°C to +85°C

NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.

(1)

RANGE

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap­propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.

Electrostatic discharge can cause damage ranging from
performance degradation to complete device failure. Burr­Brown Corporation recommends that all integrated circuits be
handled and stored using appropriate ESD protection
methods.

®

3

ADS800

PIN CONFIGURATION

TOP VIEW SOIC/SSOP

GND

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12

GND

1
2
3
4
5
6
7

ADS800

8

9
10
11
12
13
14

28

GND

27

IN

26

IN

25

GND

24

+V

S

23

REFT

22

CM

21

REFB

20

+V

S

19

MSBI

18

OE

17

+V

S

16

CLK

15

+V

S

PIN DESCRIPTIONS

PIN DESIGNATOR DESCRIPTION

1 GND Ground
2 B1 Bit 1, Most Significant Bit
3 B2 Bit 2
4 B3 Bit 3
5 B4 Bit 4
6 B5 Bit 5
7 B6 Bit 6
8 B7 Bit 7
9 B8 Bit 8
10 B9 Bit 9
11 B10 Bit 10
12 B11 Bit 11
13 B12 Bit 12, Least Significant Bit
14 GND Ground
15 +V
16 CLK Convert Clock Input, 50% Duty Cycle
17 +V
18 OE HI: High Impedance State. LO or Floating: Nor-

19 MSBI Most Significant Bit Inversion, HI: MSB inverted

20 +V
21 REFB Bottom Reference Bypass. For external bypass-

22 CM Common-Mode Voltage. It is derived by (REFT +

23 REFT Top Reference Bypass. For external bypassing

24 +V
25 GND Ground
26 IN Input
27 IN Complementary Input
28 GND Ground

+5V Power Supply

S

+5V Power Supply

S

mal Operation. Internal pull-down resistors.

for complementary output. LO or Floating: Straight
output. Internal pull-down resistors.
+5V Power Supply

S

ing of internal +1.25V reference.

REFB)/2.

of internal +3.25V reference.
+5V Power Supply

S

TIMING DIAGRAM

CONVERT

CLOCK

INTERNAL

TRACK/HOLD

OUTPUT

DATA

Data Valid

N-8

Data Invalid

t

CONV

t

t

Track

Data Valid

D

Hold

N-7

(1)

Hold

Track Track Track Track

"N"

"N + 1"

Data Valid

N-6

LtH

Hold

"N + 2"

DATA LATENCY

(6.5 Clock Cycles)

Hold

Track

"N + 3"

Hold

"N + 4"

N-3N-5 N-4 N-2 N-1

Hold

Track Track

"N + 5

"

SYMBOL DESCRIPTION MIN TYP MAX UNITS

t

CONV

t

L

t

H

t

D

t

1

t

2

Convert Clock Period 25 100µsns

Clock Pulse Low 12 12.5 ns

Clock Pulse High 12

(2)

12.5 ns

Aperture Delay 2 ns

Data Hold Time, CL = 0pF 3.9 ns

New Data Delay Time, CL = 15pF max 12.5 ns

NOTE: (1) “ ” indicates the portion of the waveform that will stretch out at slower sample rates.
(2) t

must be 13ns minimum if no missing codes is desired only for the conditions of t

H

and f

<2MHz for the SOIC package. For best performance in the SSOP package, tH must be 13ns

IN

minimum for all input frequencies and t
clock skew circuit for this condition.

≤28ns. Refer to the Clock Requirements for a possible

CONV

CONV

"N + 6"

≤28ns

Hold

t

1

t

2

N

®

ADS800

4

TYPICAL PERFORMANCE CURVES

0

–20

–40

–60

–80

–100

–120

TWO-TONE INTERMODULATION

Amplitude (dB)

0.0 5.0 10.0 15.0 20.0
Frequency (MHz)

f1 = 12.5MHz
f

2

= 12.0MHz

At TA = +25°C, VS = +5V, Sampling Rate = 40MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.

0

–20

–40

–60

Amplitude (dB)

–80

–100

–120

0 5 10 15 20

0

–20

–40

–60

SPECTRAL PERFORMANCE

Frequency (MHz)

SPECTRAL PERFORMANCE

fIN = 5MHz

fIN = 500kHz

0

–20

–40

–60

Amplitude (dB)

–80

–100

–120

0 5 10 15 20

0

–20

–40

–60

SPECTRAL PERFORMANCE

fIN = 1MHz

Frequency (MHz)

SPECTRAL PERFORMANCE

fIN = 12MHz

Amplitude (dB)

–80

–100

–120

0 5 10 15 20

Frequency (MHz)

0

–20

–40

–60

Amplitude (dB)

–80

–100

–120

0 1.0 2.0 3.0 4.0 5.0

SPECTRAL PERFORMANCE

Frequency (MHz)

fIN = 1MHz

= 10MHz

f

S

Amplitude (dB)

–80

–100

–120

0 5 10 15 20

Frequency (MHz)

®

5

ADS800