Burr Brown Corporation ADS7831U, ADS7831 Datasheet

®

®

ADS7831

FPO

ADS7831

ADS7831

12-Bit 600kHz Sampling CMOS

ANALOG-to-DIGITAL CONVERTER

FEATURES

● 600kHz THROUGHPUT RATE

● STANDARD

● 69dB min SINAD WITH 250kHz INPUT

● COMPLETE WITH S/H, REF, CLOCK, ETC.

● PARALLEL DATA w/LATCHES

● FULLY SPECIFIED –40°C TO +85°C

● 15MHz –3dB BANDWIDTH

● 28-PIN 0.3" PDIP AND SOIC

±2.5V INPUT RANGE

0
–10
–20
–30
–40
–50
–60
–70
–80

Amplitude (dB)

–90

–100
–110
–120

2nd Harmonic : –98dB

3rd Harmonic : –94dB

0 300

FREQUENCY SPECTRUM

(16384 Point FFT; f

THD : –91dB
SNR : 72dB

SFDR : 94dB

2

75 150 225

DESCRIPTION

The ADS7831 is a complete 12-bit sampling A/D
using state-of-the-art CMOS structures. It contains a
complete 12-bit capacitor-based SAR A/D with inher­ent S/H, reference, clock, interface for microprocessor
use, and three-state output drivers.

The ADS7831 is specified at a 600kHz sampling rate,
and guaranteed over the full temperature range. A
±2.5V input range and excellent Nyquist performance
provide an optimum solution in ±5V supply systems.

The 28-pin ADS7831 is available in a plastic 0.3" DIP
and in an SOIC, both fully specified for operation over
the industrial –40°C to +85°C range.

= 250kHz, –0.5dB)

IN

3

SFDR: 94dBc

Frequency (kHz)

International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706

Tel: [phone] • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

© 1994 Burr-Brown Corporation PDS-1275 Printed in U.S.A. March, 1995

1

ADS7831

SPECIFICATIONS

At TA = –40°C to +85°C, fS = 600kHz, +V

PARAMETER CONDITIONS MIN TYP MAX UNITS
RESOLUTION 12 Bits

ANALOG INPUT

Voltage Range ±2.5 V
Impedance 3.1 kΩ
Capacitance 5pF

THROUGHPUT SPEED

Conversion Time 1.3 µs
Complete Cycle Acquire & Convert 1.66 µs
Throughput Rate 600 kHz

DC ACCURACY

Integral Linearity Error ±1 LSB
Differential Linearity Error ±1 LSB
No Missing Codes Guaranteed
Total Unadjusted Error

(2, 3)

(Includes Bipolar Zero Error and Full Scale Error)

Power Supply Sensitivity

(+V

= +V

DIG

= VD) +4.75V < VD < +5.25V ±5 LSB

ANA

AC ACCURACY

Spurious-Free Dynamic Range f
Total Harmonic Distortion f
Signal-to-(Noise+Distortion) f
Signal-to-Noise f
Usable Bandwidth

(5)

Full-Power Bandwidth 15 MHz

SAMPLING DYNAMICS

Aperture Delay 20 ns
Aperture Jitter 10 ps
Transient Response FS Step 200 ns
Overvoltage Recovery

(6)

REFERENCE

Reference Voltage 2.45 2.5 2.55 V
Reference DC Source Current 100 µA

(External load should be static)

DIGITAL INPUTS

Logic Levels

V

IL

V

IH

I

IL

I

IH

DIGITAL OUTPUTS

Data Format
Data Coding

V

OL

V

OH

Leakage Current High-Z State, ±5 µA

Output Capacitance High-Z State 15 pF

DIGITAL TIMING

Bus Access Time 62 ns
Bus Relinquish Time 83 ns

POWER SUPPLIES

Specified Performance

+V

= +V

DIG

–V
+I
+I
–I

Power Dissipation f

ANA

ANA
DIG
ANA
ANA

TEMPERATURE RANGE

Specified Performance –40 +85 °C
Storage –65 +150 °C
Thermal Resistance (

Plastic DIP 75 °C/W

θ

)

JA

SOIC 75 °C/W

NOTES: (1) LSB means Least Significant Bit. For the 12-bit, ±2.5V input ADS7831, one LSB is 1.22mV. (2) Measured with 50Ω in series with analog input. Adjustable
to zero with external potentiometers. (3) Total unadjusted error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code
transitions and includes the effect of offset error. (4) All specifications in dB are referred to a full-scale ±2.5V input. (5) Usable Bandwidth defined as Full-Scale input
frequency at which Signal-to-(Noise+Distortion) degrades to 60dB, or 10 bits of accuracy. 6) Recovers to specified performance after 2 x FS input over voltage.

®

ADS7831

= +V

= +5V, –V

DIG

ANA

= –5V, using internal reference and the 50Ω input resistor shown in Figure 4b, unless otherwise specified.

ANA

ADS7831P, U

(1)

±10 LSB

–5.25V < –V

< –4.75V

ANA

= 250kHz 77 87 dB

IN

= 250kHz –85 –77 dB

IN

= 250kHz 69 71 dB

IN

= 250kHz 69 72 dB

IN

1.6 MHz

(4)

250 ns

–0.3 +0.8 V

+2.4 VD + 0.3 V
VIL = 0V ±10 µA
VIH = 5V ±10 µA

Parallel 12-bits

Binary Two's Complement

I

= 1.6mA +0.4 V

SINK

I

= 500µA +2.8 V

SOURCE

V

= 0V to V

OUT

DIG

+4.75 +5 +5.25 V
–5.25 –5 –4.75 V

+16 mA
+16 mA
–12 mA

= 600kHz 220 275 mW

S

2

®

BLOCK DIAGRAM

Successive Approximation Register and Control Logic

CDAC

8.6kΩ

±2.5V Input

Cap

2.5V Ref Out

575Ω

2.5kΩ

18kΩ

Clock

Buffer

4.8kΩ

ABSOLUTE MAXIMUM RATINGS

Analog Inputs: VIN.............................................................................. ±25V

Ground Voltage Differences: DGND, AGND1, AGND2 ................... ±0.3V

+V

ANA

+V

DIG

+V

DIG

–V

ANA

Digital Inputs ............................................................. –0.3V to +V

Maximum Junction Temperature ................................................... +165°C

Internal Power Dissipation ............................................................. 825mW

Lead Temperature (soldering, 10s)................................................ +300°C

REF ..................................... +V

CAP ...........................................Indefinite Short to AGND2

....................................................................................................+7V

to +V

...................................................................................+0.3V

ANA

...................................................................................................... 7V

.................................................................................................... –7V

+0.3V to AGND2 –0.3V

ANA

Momentary Short to +V

DIG

+0.3V

ANA

Internal

Ref

Comparator

Output

Latches

and

Three

State

Drivers

BUSY
Three

State

Parallel

Data

Bus

PACKAGE AND ORDERING INFORMATION

MODEL PACKAGE NUMBER

ADS7831P 28-Pin Plastic DIP 246
ADS7831U 28-Pin SOIC 217

NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.

PACKAGE DRAWING

ELECTROSTATIC
DISCHARGE SENSITIVITY

(1)

Electrostatic discharge can cause damage ranging from
performance degradation to complete device failure. Burr­Brown Corporation recommends that all integrated circuits be
handled and stored using appropriate ESD protection
methods.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

3

ADS7831