Burr Brown Corporation ADS7813UB-1K, ADS7813UB, ADS7813U-1K, ADS7813U, ADS7813PB Datasheet

1

®

ADS7813

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone] • Twx: 910-952-1111

Internet: http://www.burr-brown.com/ • FAXLine: [phone] (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

ADS7813

®

©

1997 Burr-Brown Corporation PDS-1302A Printed in U.S.A. March, 1997

Low-Power, Serial 16-Bit Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

● 20µs max CONVERSION TIME

● SINGLE +5V SUPPLY OPERATION

● PIN-COMPATIBLE WITH 12-BIT ADS7812

● EASY-TO-USE SERIAL INTERFACE

● 16-PIN 0.3" PLASTIC DIP AND SOIC

●

±2.0LSB max INL

● 87dB min SINAD

● USES INTERNAL OR EXTERNAL

REFERENCE

● MULTIPLE INPUT RANGES

● 35mW max POWER DISSIPATION

● NO MISSING CODES

● 50

µW POWER DOWN MODE

APPLICATIONS

● MEDICAL INSTRUMENTATION

● DATA ACQUISITION SYSTEMS

● ROBOTICS

● INDUSTRIAL CONTROL

● TEST EQUIPMENT

● DIGITAL SIGNAL PROCESSING

● DSP SERVO CONTROL

ADS7813

ADS7813

DESCRIPTION

The ADS7813 is a low-power, single +5V supply, 16­bit sampling analog-to-digital converter. It contains a
complete 16-bit capacitor-based SAR A/D with a
sample/hold, clock, reference, and serial data inter­face.

The converter can be configured for a variety of input
ranges including ±10V, ±5V, 0V to 10V, and 0.5V to

4.5V. A high impedance 0.3V to 2.8V input range is
also available (input impedance > 10MΩ). For most
input ranges, the input voltage can swing to +16.5V or
–16.5V without damage to the converter.

A flexible SPI compatible serial interface allows data
to be synchronized to an internal or external clock.
The ADS7813 is specified at a 40kHz sampling rate
over the –40°C to +85°C temperature range. It is
available in a 16-pin 0.3" plastic DIP or a 16-lead
SOIC package.

8kΩ

(1)

CDAC

4kΩ

(1)

40kΩ

(1)

20kΩ

(1)

Internal

+2.5V Ref

Clock

EXT/INT

DATACLK

DATA

Successive Approximation Register and Control Logic

Serial

Data

Out

Comparator

Buffer

BUSY PWRD

CONV

R1IN



R3

IN

REF

BUF

CAP

CS

R2

IN

NOTE: (1) Actual value may vary ±30%.

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ADS7813

SPECIFICATIONS

At TA = –40°C to +85°C, fS = 40kHz, VS = +5V ±5%, using internal reference, unless otherwise specified.

ADS7813P, U ADS7813PB, UB

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
RESOLUTION 16 ✻ Bits
ANALOG INPUT

Voltage Range

See Table I

✻

Impedance

See Table I

✻

Capacitance 35 ✻ pF

THROUGHPUT SPEED

Conversion Time 20 ✻ µs
Complete Cycle Acquire and Convert 25 ✻ µs
Throughput Rate 40 ✻ kHz

DC ACCURACY

Integral Linearity Error ±3 ✻ ±2 LSB

(1)

Differential Linearity Error +3, –2 ✻ +2, –1 LSB
No Missing Codes 15 16 Bits
Transition Noise

(2)

0.6 ✻ LSB

Full Scale Error

(3)

±0.5 ±0.25 %
Full Scale Error Drift ±14 ✻ ppm/°C
Full Scale Error

(3)

Ext. 2.5000V Ref ±0.5 ±0.25 %
Full Scale Error Drift Ext. 2.5000V Ref ±5 ✻ ppm/°C
Bipolar Zero Error Bipolar Ranges ±10 ✻ mV
Bipolar Zero Error Drift Bipolar Ranges ±3 ✻ ppm/°C
Unipolar Zero Error Unipolar Ranges ±6 ✻ mV
Unipolar Zero Error Drift Unipolar Ranges ±3 ✻ ppm/°C
Recovery Time to Rated Accuracy 1.0µF Capacitor to CAP 300 ✻ µs

from Power Down

(4)

Power Supply Sensitivity +4.75V < (VS = +5V) < +5.25 ±12 ✻ LSB

AC ACCURACY

Spurious-Free Dynamic Range f

IN

= 1kHz 90 100 96 102 dB

(5)

Total Harmonic Distortion f

IN

= 1kHz –98 –90 –100 –96 dB

Signal-to-(Noise+Distortion) f

IN

= 1kHz 85 89 87 ✻ dB

Signal-to-Noise f

IN

= 1kHz 85 89 87 ✻ dB

Useable Bandwidth

(6)

130 ✻ kHz

Full Power –3dB Bandwidth 600 ✻ kHz

SAMPLING DYNAMICS

Aperture Delay 40 ✻ ns
Aperture Jitter 20 ✻ ps
Transient Response FS Step 5 ✻ µs
Overvoltage Recovery

(7)

750 ✻ ns

REFERENCE

Internal Reference Voltage 2.48 2.5 2.52 ✻✻ ✻ V
Internal Reference Source Current 100 ✻ µA
Internal Reference Drift 8 ✻ ppm/°C
External Reference Voltage Range 2.3 2.5 2.7 ✻✻ ✻ V
External Reference Current Drain V

REF

= +2.5V 100 ✻ µA

DIGITAL INPUTS

Logic Levels

V

IL

–0.3 +0.8 ✻✻V

V

IH

+2.0 VS +0.3V ✻✻V

I

IL

±10 ✻ µA

I

IH

±10 ✻ µA

DIGITAL OUTPUTS

Data Format
Data Coding

V

OL

I

SINK

= 1.6mA +0.4 ✻ V

V

OH

I

SOURCE

= 500µA+4 ✻ V

Leakage Current High-Z State, ±1 ✻ µA

V

OUT

= 0V to V

S

Output Capacitance High-Z State 15 15 pF

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

Serial

Binary Two’s Complement

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ADS7813

POWER SUPPLY

V

S

+4.75 +5 +5.25 ✻✻✻ V

Power Dissipation f

S

= 40kHz 35 ✻ mW

TEMPERATURE RANGE

Specified Performance –40 +85 ✻✻ °C
Derated Performance –55 +125 ✻✻ °C

✻ Same specification as grade to the left.
NOTES: (1) LSB means Least Significant Bit. For the ±10V input range, one LSB is 305µV. (2) Typical rms noise at worst case transitions and temperatures.

(3) Full scale error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided by the transition voltage
(not divided by the full-scale range) and includes the effect of offset error. (4) After the ADS7813 is initially powered on and fully settles, this is the time delay
after it is brought out of Power Down Mode until all internal settling occurs and the analog input is acquired to rated accuracy, and normal conversions can begin
again. (5) All specifications in dB are referred to a full-scale input. (6) Useable Bandwidth defined as Full-Scale input frequency at which Signal-to­(Noise+Distortion) degrades to 60dB, or 10 bits of accuracy. (7) Recovers to specified performance after 2 x FS input overvoltage.

SPECIFICATIONS (CONT)

At TA = –40°C to +85°C, fS = 40kHz, VS = +5V ±5%, using internal reference, unless otherwise specified.

ADS7813P, U ADS7813PB, UB

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

ABSOLUTE MAXIMUM RATINGS

Analog Inputs: R1IN......................................................................... ±16.5V

R2

IN

.....................................................................

GND – 0.3V to +16.5V

R3

IN

.......................................................................................................

±16.5V

REF ............................................ GND – 0.3V to V

S

+ 0.3V

CAP ............................................... Indefinite Short to GND

Momentary Short to V

S

VS...........................................................................................................7V

Digital Inputs ...................................................... GND – 0.3V to V

S

+ 0.3V

Maximum Junction Temperature ................................................... +165°C

Internal Power Dissipation ............................................................. 825mW

Lead Temperature (soldering, 10s)................................................ +300°C

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.

PACKAGE/ORDERING INFORMATION

MAXIMUM GUARANTEED MINIMUM
INTEGRAL NO MISSING SIGNAL-TO- SPECIFICATION PACKAGE
LINEARITY CODE LEVEL (NOISE + DISTORTION) TEMPERATURE DRAWING

PRODUCT ERROR (LSB) (LSB) RATIO (dB) RANGE PACKAGE NUMBER

(1)

ADS7813P ±3 15 85 –40°C to +85°C Plastic DIP 180
ADS7813PB ±2 16 87 –40°C to +85°C Plastic DIP 180
ADS7813U ±3 15 85 –40°C to +85°C SOIC 211
ADS7813UB ±2 16 87 –40°C to +85°C SOIC 211

NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.

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ADS7813

PIN CONFIGURATION

PIN # NAME DESCRIPTION

1R1

IN

Analog Input. See Tables I and IV.
2 GND Ground
3R2

IN

Analog Input. See Tables I and IV.
4R3

IN

Analog Input. See Tables I and IV.
5 BUF Reference Buffer Output. Connect to R1

IN

, R2IN, or R3IN, as needed.
6 CAP Reference Buffer Compensation Node. Decouple to ground with a 1µF tantalum capacitor in parallel with a 0.01µF ceramic capacitor.
7 REF Reference Input/Output. Outputs internal +2.5V reference via a series 4kΩ resistor. Decouple this voltage with a 1µF to 2.2µF

tantalum capacitor to ground. If an external reference voltage is applied to this pin, it will override the internal reference.
8 GND Ground
9 DATACLK Data Clock Pin. With EXT/INT LOW, this pin is an output and provides the synchronous clock for the serial data. The output

is tri-stated when CS is HIGH. With EXT/INT HIGH, this pin is an input and the serial data clock must be provided externally.

10 DATA Serial Data Output. The serial data is always the result of the last completed conversion and is synchronized to DATACLK.

If DATACLK is from the internal clock (EXT/INT LOW), the serial data is valid on both the rising and falling edges of DATACLK.

DATA is tri-stated when CS is HIGH.

11 EXT/INT External or Internal DATACLK Pin. Selects the source of the synchronous clock for serial data. If HIGH, the clock must be

provided externally. If LOW, the clock is derived from the internal conversion clock. Note that the clock used to time the

conversion is always internal regardless of the status of EXT/INT.

12 CONV Convert Input. A falling edge on this input puts the internal sample/hold into the hold state and starts a conversion regardless

of the state of CS. If a conversion is already in progress, the falling edge is ignored. If EXT/INT is LOW, data from the previous

conversion will be serially transmitted during the current conversion.

13 CS Chip Select. This input tri-states all outputs when HIGH and enables all outputs when LOW. This includes DATA, BUSY, and

DATACLK (when EXT/INT is LOW). Note that a falling edge on CONV will initiate a conversion even when CS is HIGH.

14 BUSY Busy Output. When a conversion is started, BUSY goes LOW and remains LOW throughout the conversion. If EXT/INT is

LOW, data is serially transmitted while BUSY is LOW. BUSY is tri-stated when CS is HIGH.

15 PWRD Power Down Input. When HIGH, the majority of the ADS7813 is placed in a low power mode and power consumption is

significantly reduced. CONV must be taken LOW prior to PWRD going LOW in order to achieve the lowest power

consumption. The time required for the ADS7813 to return to normal operation after power down depends on a number of

factors. Consult the Power Down section for more information.

16 V

S

+5V Supply Input. For best performance, decouple to ground with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum

capacitor.

ANALOG CONNECT CONNECT CONNECT INPUT

INPUT R1

IN

R2

IN

R3

IN

IMPEDANCE

RANGE (V) TO TO TO (kΩ)

±10V V

IN

BUF GND 45.7

0.3125V to

2.8125V V

IN

V

IN

V

IN

> 10,000

±5V GND BUF V

IN

26.7

0V to 10V BUF GND V

IN

26.7

0V to 4V BUF V

IN

GND 21.3

±3.33V V

IN

BUF V

IN

21.3

0.5V to

4.5V GND V

IN

GND 21.3

TABLE I. ADS7813 Input Ranges.

PIN CONFIGURATION

Top View DIP, SOIC

VS
PWRD
BUSY
CS
CONV
EXT/INT
DATA
DATACLK

R1

IN



GND

R2

IN



R3

IN


BUF
CAP
REF

GND

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

ADS7813



5

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ADS7813

TYPICAL PERFORMANCE CURVES

At TA = +25°C, fS = 40kHz, VS = +5V, ±10V input range, using internal reference, unless otherwise noted.

SNR AND SINAD vs TEMPERATURE

(f

IN

= 1kHz, 0dB)

Temperature (°C)

SNR and SINAD (dB)

92

91

90

89

88

87

86

–25–50 0 25 50 75 100

SINAD

SNR

SFDR AND THD vs TEMPERATURE

(f

IN

= 1kHz, 0dB)

Temperature (°C)

SFDR (dB)

THD (dB)

106

105

104

103

102

101

100

–106

–105

–104

–103

–102

–101

–100

–25–50 0 25 50 75 100

THD

SFDR

SIGNAL-TO-(NOISE + DISTORTION)

vs INPUT FREQUENCY (f

IN

= 0dB)

Input Signal Frequency (Hz)

SINAD (dB)

90



89



88



87



86



85



84



83

100 1k 10k 20k

FREQUENCY SPECTRUM

(8192 Point FFT; f

IN

= 980Hz, 0dB)

02051510

Frequency (kHz)

Amplitude (dB)

0

–20

–40

–60

–80

–100

–120

–140



FREQUENCY SPECTRUM

(8192 Point FFT; f

IN

= 9.8kHz, 0dB)

02051510

Frequency (kHz)

Amplitude (dB)

0

–20

–40

–60

–80

–100

–120

–140

INTERNAL REFERENCE VOLTAGE

vs TEMPERATURE

Temperature (°C)

Internal Reference (V)

2.515

2.510

2.505

2.500

2.495

2.490

2.485
–25–50 0 25 50 75 100

6

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ADS7813

TYPICAL PERFORMANCE CURVES (CONT)

At TA = +25°C, fS = 40kHz, VS = +5V, ±10V input range, using internal reference, unless otherwise noted.

POWER SUPPLY RIPPLE SENSITIVITY

ILE/DLE DEGRADATION PER LSB OF P-P RIPPLE

Power Supply Ripple Frequency (Hz)

10

1

10

2

10

3

10

4

10

5

10

6

10

7

1

10

–1



10

–2



10

–3



10

–4



10

–5

Linearity Degradation (LSB/LSB)

ILE

DLE

ILE (LSB)

ILE AND DLE AT –40°C

2
1

0
–1
–2

DLE (LSB)

2

1

0
–1
–2

C000h8000h 0000h 4000h 7FFFh

Hex BTC Code

ILE (LSB)

ILE AND DLE AT +25°C

2
1

0
–1
–2

DLE (LSB)

2

1

0
–1
–2

C000h8000h 0000h 4000h 7FFFh

Hex BTC Code

ILE (LSB)

ILE AND DLE AT +85°C

2
1

0
–1
–2

DLE (LSB)

2

1

0
–1
–2

C000h8000h 0000h 4000h 7FFFh

Hex BTC Code