®
ADS7809
3
SPECIFICATIONS (CONT)
ELECTRICAL
At TA = –40°C to +85°C, fS = 100kHz, V
DIG
= V
ANA
= +5V, using internal reference and fixed resistors as shown in Figure 4, unless otherwise specified.
ADS7809P, U ADS7809PB, UB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
DIGITAL OUTPUTS
Data Format Serial 16 bits
Data Co Binary Two’s Complement or Straight Binary
Pipeline Delay Conversion results only available after completed conversion.
Data Clock Selectable for internal or external data clock
Internal EXT/INT LOW 2.3 ✻ MHz
(Output Only When
Transmitting Data)
External EXT/INT HIGH 0.1 10 ✻✻MHz
(Can Run Continually)
V
OL
I
SINK
= 1.6mA +0.4 ✻ V
V
OH
I
SOURCE
= 500µA+4 ✻ V
Leakage Current High-Z State, ±5 ✻ µA
V
OUT
= 0V to V
DIG
Output Capacitance High-Z State 15 ✻ pF
POWER SUPPLIES
Specified Performance
V
DIG
Must be ≤ V
ANA
+4.75 +5 +5.25 ✻✻✻ V
V
ANA
+4.75 +5 +5.25 ✻✻✻ V
I
DIG
0.3 ✻ mA
I
ANA
16 ✻ mA
Power Dissipation: PWRD LOW V
ANA
= V
DIG
= 5V, fS = 100kHz 100 ✻ mW
PWRD HIGH 50 ✻ µW
TEMPERATURE RANGE
Specified Performance –40 +85 ✻✻°C
Derated Performance –55 +125 ✻✻°C
Storage –65 +150 ✻✻°C
Thermal Resistance (
θ
JA
)
Plastic DIP 75 ✻ °C/W
SOIC 75 ✻ °C/W
✻Same as specification for ADS7809P, U.
NOTES: (1) LSB means Least Significant Bit. For the ±10V input range, one LSB is 305µV. (2) Typical rms noise at worst case transitions and temperatures. (3)
As measured with fixed resistors shown in Figure 4. Adjustable to zero with external potentiometer. (4) For bipolar input ranges, full scale error is the worst case
of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and
includes the effect of offset error. For unipolar input ranges, full scale error is the deviation of the last code transition divided by the transition voltage. It also includes
the effect of offset error. (5) All specifications in dB are referred to a full-scale ±10V input. (6) Full-Power Bandwidth defined as Full-Scale input frequency at which
Signal-to-(Noise+Distortion) degrades to 60dB. (7) Recovers to specified performance after 2 x FS input overvoltage.
Analog Inputs: R1IN.......................................................................... ±25V
R2
IN
.......................................................................... ±25V
R3
IN
.......................................................................... ±25V
CAP ..................................... V
ANA
+0.3V to AGND2 –0.3V
REF ....................................... Indefinite Short to AGND2,
......................................................................... Momentary Short to V
ANA
Ground Voltage Differences: DGND, AGND2 .................................±0.3V
V
ANA
......................................................................................................7V
V
DIG
to V
ANA
....................................................................................... +0.3
V
DIG
.......................................................................................................7V
Digital Inputs .............................................................–0.3V to V
DIG
+0.3V
Maximum Junction Temperature .................................................. +165°C
Internal Power Dissipation ............................................................700mW
Lead Temperature (soldering, 10s) .............................................. +300°C
ABSOLUTE MAXIMUM RATINGS
GUARANTEED MINIMUM
MAXIMUM NO MISSING SIGNAL-TO- SPECIFICATION PACKAGE
LINEARITY CODE LEVEL (NOISE + DISTORTION) TEMPERATURE DRAWING
PRODUCT ERROR (LSB) (LSB) RATIO (dB) RANGE (
°C) PACKAGE NUMBER
(1)
ADS7809P ±3 15 83 –40 to +85 20-Pin Plastic DIP 222
ADS7809PB ±2 16 86 –40 to +85 20-Pin Plastic DIP 222
ADS7809U ±3 15 83 –40 to +85 20-Lead SOIC 221
ADS7809UB ±2 16 86 –40 to +85 20-Lead SOIC 221
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.