Burr Brown Corporation ADS7807UB-1K, ADS7807UB, ADS7807U-1K, ADS7807U, ADS7807PB Datasheet

®

ADS7807

Low-Power 16-Bit Sampling CMOS
ANALOG-to-DIGITAL CONVERTER

FEATURES

● 35mW max POWER DISSIPATION

µW POWER DOWN MODE

● 50

µs max ACQUISITION AND

● 25

CONVERSION

±1.5LSB max INL

●

● DNL: 16 bits “No Missing Codes”

● 86dB min SINAD WITH 1kHz INPUT

±10V, 0V TO +5V, AND 0V TO +4V INPUT

●

RANGES

● SINGLE +5V SUPPLY OPERATION

● PARALLEL AND SERIAL DATA OUTPUT

● PIN-COMPATIBLE WITH 12-BIT ADS7806

● USES INTERNAL OR EXTERNAL

REFERENCE

● 28-PIN 0.3" PLASTIC DIP AND SOIC

Clock

DESCRIPTION

The ADS7807 is a low-power, 16-bit, sampling A/D
using state-of-the-art CMOS structures. It contains a
complete 16-bit, capacitor-based, SAR A/D with S/H,
clock, reference, and microprocessor interface with
parallel and serial output drivers.

The ADS7807 can acquire and convert 16-bits to
within ±1.5LSB in 25µs max while consuming only
35mW max. Laser-trimmed scaling resistors provide
standard industrial input ranges of ±10V and 0V to
+5V. In addition, a 0V to +4V range allows develop­ment of complete single supply systems.

The 28-pin ADS7807 is available in a plastic 0.3" DIP
and in an SOIC, both fully specified for operation over
the industrial –40°C to +85°C temperature range.

Successive Approximation Register and Control Logic

R/C
CS
BYTE
Power
Down

40kΩ

R1



IN



R2

IN

International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706

Tel: [phone] • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

©

1992 Burr-Brown Corporation PDS-1159C Printed in U.S.A. November, 1994

10kΩ

CAP

REF

20kΩ

40kΩ

Buffer

6kΩ

CDAC

+2.5V Ref

Internal

Comparator

Reference
Power
Down

Parallel

and

Serial

Data

Out

BUSY
Serial Data

Clock

Serial Data

Parallel Data

8

SPECIFICATIONS

ELECTRICAL

At TA = –40°C to +85°C, fS = 40kHz, V

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
RESOLUTION 16 * Bits
ANALOG INPUT

Voltage Ranges ±10, 0 to +5, 0 to +4 V
Impedance (See Table II)
Capacitance 35 * pF

THROUGHPUT SPEED

Conversion Time 20 * µs
Complete Cycle Acquire and Convert 25 * µs
Throughput Rate 40 * kHz

DC ACCURACY

Integral Linearity Error ±3 ±1.5 LSB
Differential Linearity Error +3, –2 +1.5, –1 LSB
No Missing Codes 15 16 Bits
Transition Noise
Gain Error ±0.2 ±0.1 %
Full Scale Error
Full Scale Error Drift ±7 ±5 ppm/°C
Full Scale Error
Full Scale Error Drift Ext. 2.5000V Ref ±0.5 * ppm/°C
Bipolar Zero Error
Bipolar Zero Error Drift ±10V Range ±0.5 * ppm/°C
Unipolar Zero Error

(2)

(3,4)

(3,4)

(3)

(3)

Unipolar Zero Error Drift 0V to 5V, 0V to 4V Ranges ±0.5 * ppm/°C
Recovery Time to Rated Accuracy 2.2µF Capacitor to CAP 1 * ms

from Power Down

(5)

Power Supply Sensitivity +4.75V < VS < +5.25V ±8 * LSB

(V

= V

ANA

= VS)

DIG

AC ACCURACY

Spurious-Free Dynamic Range f
Total Harmonic Distortion f
Signal-to-(Noise+Distortion) f

Signal-to-Noise f
Usable Bandwidth

(7)

Full Power Bandwidth (–3dB) 600 * kHz

SAMPLING DYNAMICS

Aperture Delay 40 * ns
Aperture Jitter 20 * ps
Transient Response FS Step 5 * µs
Overvoltage Recovery

(8)

REFERENCE

Internal Reference Voltage No Load 2.48 2.5 2.52 * * * V
Internal Reference Source Current 1 * µA

(Must use external buffer.)

Internal Reference Drift 8 * ppm/°C
External Reference Voltage Range 2.3 2.5 2.7 * * * V

for Specified Linearity

External Reference Current Drain Ext. 2.5000V Ref 100 * µA

DIGITAL INPUTS

Logic Levels

V

IL

V

IH

I

IL

I

IH

DIGITAL OUTPUTS

Data Format
Data Coding

V

OL

V

OH

Leakage Current High-Z State, ±5*µA

Output Capacitance High-Z State 15 * pF

= V

DIG

= +5V, using internal reference and fixed resistors shown in Figure 7b, unless otherwise specified.

ANA

ADS7807P, U ADS7807PB, UB

(1)

0.8 * LSB

±0.5 ±0.25 %

Ext. 2.5000V Ref ±0.5 ±0.25 %

±10V Range ±10 * mV

0V to 5V, 0V to 4V Ranges ±3*mV

= 1kHz, ±10V 90 100 96 * dB

IN

= 1kHz, ±10V –100 –90 * –96 dB

IN

= 1kHz, ±10V 83 88 86 * dB

IN

–60dB Input 30 32 dB

= 1kHz, ±10V 83 88 86 * dB

IN

130 * kHz

(6)

750 * ns

–0.3 +0.8 * * V

+2.0 VD +0.3V * * V
VIL = 0V ±10 * µA
VIH = 5V ±10 * µA

Parallel 16 bits in 2-bytes; Serial

Binary Two’s Complement or Straight Binary

I

= 1.6mA +0.4 * V

SINK

I

= 500µA+4 * V

SOURCE

V

= 0V to V

OUT

DIG

®

ADS7807

2

®

SPECIFICATIONS (CONT)

ELECTRICAL

At TA = –40°C to +85°C, fS = 40kHz, V

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
DIGITAL TIMING

Bus Access Time R
Bus Relinquish Time R

POWER SUPPLIES

Specified Performance

V

DIG

V

ANA

I

DIG

I

ANA

Power Dissipation V

TEMPERATURE RANGE

Specified Performance –40 +85 * * °C
Derated Performance –55 +125 * * °C
Storage –65 +150 * * °C
Thermal Resistance (

Plastic DIP 75 * °C/W
SOIC 75 * °C/W

NOTES: (1) LSB means Least Significant Bit. One LSB for the ±10V input range is 305µV. (2) Typical rms noise at worst case transition. (3) As measured with
fixed resistors shown in Figure 7b. Adjustable to zero with external potentiometer. (4) Full scale error is the worst case of –Full Scale or +Full Scale untrimmed
deviation from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. (5)
This is the time delay after the ADS7807 is brought out of Power Down Mode until all internal settling occurs and the analog input is acquired to rated accuracy.
A Convert Command after this delay will yield accurate results. (6) All specifications in dB are referred to a full-scale input. (7) Usable Bandwidth defined as Full­Scale input frequency at which Signal-to-(Noise + Distortion) degrades to 60dB. (8) Recovers to specified performance after 2 x FS input overvoltage.

θ

)

JA

= V

DIG

= +5V, using internal reference and fixed resistors shown in Figure 7b, unless otherwise specified.

ANA

ADS7807P, U ADS7807PB, UB

= 3.3kΩ, CL = 50pF 83 * ns

L

= 3.3kΩ, CL = 10pF 83 * ns

L

Must be ≤ V

= V

ANA

DIG

REFD HIGH 23 * mW

PWRD and REFD HIGH 50 * µW

ANA

= 5V, fS = 40kHz 28 35 * * mW

+4.75 +5 +5.25 * * * V
+4.75 +5 +5.25 * * * V

0.6 * mA

5.0 * mA

ABSOLUTE MAXIMUM RATINGS

Analog Inputs: R1IN........................................................................... ±25V

Ground Voltage Differences: DGND, AGND1, and AGND2 ............. ±0.3V

V

ANA

V

to V

DIG

V

........................................................................................................ 7V

DIG

Digital Inputs .............................................................. –0.3V to V

Maximum Junction Temperature ................................................... +165°C

Internal Power Dissipation ............................................................. 825mW

Lead Temperature (soldering, 10s)................................................ +300°C

R2

........................................................................... ±25V

IN

CAP .................................... V

REF .........................................Indefinite Short to AGND2,

....................................................................................................... 7V

......................................................................................+0.3V

ANA

+0.3V to AGND2 –0.3V

ANA

Momentary Short to V

DIG

ANA

+0.3V

Electrostatic discharge can cause damage ranging from
performance degradation to complete device failure. Burr­Brown Corporation recommends that this integrated circuit
be handled and stored using appropriate ESD protection
methods.

ELECTROSTATIC
DISCHARGE SENSITIVITY

ORDERING INFORMATION

MAXIMUM GUARANTEED MINIMUM

INTEGRAL NO MISSING SIGNAL-TO- SPECIFICATION

MODEL ERROR (LSB) (LSB) RATIO (dB) RANGE PACKAGE

ADS7807P ±3 15 83 –40°C to +85°C Plastic DIP
ADS7807PB ±1.5 16 86 –40°C to +85°C Plastic DIP
ADS7807U ±3 15 83 –40°C to +85°C SOIC
ADS7807UB ±1.5 16 86 –40°C to +85°C SOIC

LINEARITY CODE LEVEL (NOISE + DISTORTION) TEMPERATURE

PACKAGE INFORMATION

MODEL PACKAGE NUMBER

PACKAGE DRAWING

ADS7807P Plastic DIP 246
ADS7807PB Plastic DIP 246
ADS7807U SOIC 217
ADS7807UB SOIC 217

NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.

(1)

3

ADS7807

PIN # NAME I/O DESCRIPTION

DIGITAL

1R1
2 AGND1 Analog Sense Ground.
3R2
4 CAP Reference Buffer Output. 2.2µF tantalum capacitor to ground.

IN

IN

Analog Input. See Figure 7.

Analog Input. See Figure 7.

5 REF Reference Input/Output. 2.2µF tantalum capacitor to ground.
6 AGND2 Analog Ground.
7 SB/BTC I Selects Straight Binary or Binary Two’s Complement for Output Data Format.
8 EXT/INT I External/Internal data clock select.
9 D7 O Data Bit 7 if BYTE is HIGH. Data bit 15 (MSB) if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW. Leave

unconnected when using serial output.
10 D6 O Data Bit 6 if BYTE is HIGH. Data bit 14 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
11 D5 O Data Bit 5 if BYTE is HIGH. Data bit 13 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
12 D4 O Data Bit 4 if BYTE is HIGH. Data bit 12 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
13 D3 O Data Bit 3 if BYTE is HIGH. Data bit 11 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
14 DGND Digital Ground.
15 D2 O Data Bit 2 if BYTE is HIGH. Data bit 10 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
16 D1 O Data Bit 1 if BYTE is HIGH. Data bit 9 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
17 D0 O Data Bit 0 (LSB) if BYTE is HIGH. Data bit 8 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
18 DATACLK I/O Data Clock Output when EXT/INT is LOW. Data clock input when EXT/INT is HIGH.
19 SDATA O Serial Output Synchronized to DATACLK.
20 TAG I Serial Input When Using an External Data Clock.
21 BYTE I Selects 8 most significant bits (LOW) or 8 least significant bits (HIGH) on parallel output pins.
22 R/C I With CS LOW and BUSY HIGH, a Falling Edge on R/C Initiates a New Conversion. With CS LOW, a rising edge on R/C

enables the parallel output.
23 CS I Internally OR’d with R/C. If R/C is LOW, a falling edge on CS initiates a new conversion. If EXT/INT is LOW, this same

falling edge will start the transmission of serial data results from the previous conversion.
24 BUSY O At the start of a conversion, BUSY goes LOW and stays LOW until the conversion is completed and the digital outputs

have been updated.
25 PWRD I PWRD HIGH shuts down all analog circuitry except the reference. Digital circuitry remains active.
26 REFD I REFD HIGH shuts down the internal reference. External reference will be required for conversions.
27 V
28 V

ANA

DIG

Analog Supply. Nominally +5V. Decouple with 0.1µF ceramic and 10µF tantalum capacitors.

Digital Supply. Nominally +5V. Connect directly to pin 27. Must be ≤ V

ANA

.

TABLE I. Pin Assignments.

PIN CONFIGURATION

1



R1

IN

R2
CAP
REF

D7
D6
D5
D4
D3

DGND

2
3



IN

4
5
6
7



8

9
10
11
12
13
14

AGND1

AGND2

SB/BTC

EXT/INT

ADS7807

28
27
26
25
24
23
22
21
20
19
18
17
16
15

V



DIG



V

ANA

REFD
PWRD
BUSY
CS
R/C
BYTE
TAG
SDATA
DATACLK
D0
D1
D2

ANALOG CONNECT R1INCONNECT R2

INPUT VIA 200Ω VIA 100Ω

IN

RANGE TO TO IMPEDANCE

±10V V
0V to 5V AGND V
0V to 4V V

IN

IN

CAP 45.7kΩ

IN

V

IN

20.0kΩ

21.4kΩ

TABLE II. Input Range Connections. See also Figure 7.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

®

ADS7807

4

®

TYPICAL PERFORMANCE CURVES

FREQUENCY SPECTRUM

(8192 Point FFT; f

IN

= 15kHz, 0dB)

0
–10
–20
–30
–40
–50
–60
–70
–80
–90

–100
–110
–120
–130

0 5 10 15 20

Amplitude (dB)

Frequency (kHz)

At TA = +25°C, fS = 40kHz, V

DIG

= V

= +5V, using internal reference and fixed resistors shown in Figure 7b, unless otherwise specified.

ANA

FREQUENCY SPECTRUM

0
–10
–20
–30
–40
–50
–60
–70
–80

Amplitude (dB)

–90

–100
–110
–120
–130

0 5 10 15 20



100

90
80
70
60



50

SINAD (dB)

40
30
20
10

100 1k 10k 100k 1M

(8192 Point FFT; f

Frequency (kHz)

SIGNAL-TO-(NOISE + DISTORTION) 

vs INPUT FREQUENCY (f

Input Signal Frequency (Hz)

= 1kHz, 0dB)

IN



= 0dB)

IN



100

90
80
70
60
50

SINAD (dB)

40
30
20
10

02468101214161820

SIGNAL-TO-(NOISE + DISTORTION)

vs INPUT FREQUENCY AND INPUT AMPLITUDE

0dB

–20dB

–60dB

Input Signal Frequency (kHz)

SIGNAL-TO-(NOISE + DISTORTION) vs TEMPERATURE

100

95

90

85

SINAD (dB)

80

75

–75 –50 –25 0 25 50 75 100 125 150

= 1kHz, 0dB; fS = 10kHz to 40kHz)

(f

IN

Temperature (°C)

10kHz

20kHz

30kHz

40kHz

A.C. PARAMETERS vs TEMPERATURE

110

105

100

95

90

85

SFDR, SINAD, and SNR (dB)

80

SFDR

SNR

SINAD

–75 –50 –25 0 25 50 75 100 125 150

5

= 1kHz, 0dB)

(f

IN

Temperature (°C)

ADS7807

THD

–80

–85

–90

–95

THD (dB)

–100

–105

–110

CONVERSION TIME vs TEMPERATURE

Temperature (°C)

–75 –50 –25 0 25 50 75 100 125 150



19.4


19.2


19



18.8


18.6


Conversion Time (µs)

POWER SUPPLY RIPPLE SENSITIVITY

INL/DNL DEGRADATION PER LSB OF P-P RIPPLE

Power Supply Ripple Frequency (Hz)

10

1

10

2

10

3

10

4

10

5

10

6

10

7

1

10–1

10–2

10–3

10

–4



10

–5

Linearity Degradation (LSB/LSB)

INL

DNL

TYPICAL PERFORMANCE CURVES (CONT)

At TA = +25°C, fS = 40kHz, V

3

All Codes INL

2
1
0

–1

16 Bit LSBs

–2
–3

0

3

All Codes DNL

2
1
0

–1

16 Bit LSBs

–2
–3

0 65535573444915240960

DIG

= V

= +5V, using internal reference and fixed resistors shown in Figure 7b, unless otherwise specified.

ANA

3276824576163848192

4915240960

6553557344

Decimal Code

3276824576163848192

Decimal Code

ENDPOINT ERRORS (20V BIPOLAR RANGE)

3

BPZ Error

2
1
0

–1

mV From Ideal

–2

0.20
+FS Error

0

Percent

From Ideal

–0.20

0.20

–FS Error

0

Percent

–0.20

From Ideal

–75

–50 –25 0 25

Temperature (°C)

INTERNAL REFERENCE VOLTAGE vs TEMPERATURE

2.520

2.515

2.510

2.505

2.500

2.495

Internal Reference (V)

2.490

2.485

2.480
–75 –50 –25 0 25 50 75 100 125 150

Temperature (°C)

®

ADS7807

50 75 100 125

150

6

3
2
1
0

–1

mV From Ideal

–2

0.40

0.20

Percent

From Ideal

0

0.40

0.20

Percent

0

From Ideal

–75

ENDPOINT ERRORS (UNIPOLAR RANGES)

UPO Error

+FS Error (4V Range)

+FS Error (5V Range)

–50 –25 0 25

Temperature (°C)

50 75 100 125

150