3
®
OPA685
SPECIFICATIONS: VS = +5V
RF = 348Ω, RL = 100Ω to VS/2, and G = +8, (Figure 3 for AC performance only), unless otherwise noted.
OPA685U, N
TYP GUARANTEED
0°C to –40°C to
MIN/
TEST
PARAMETER CONDITIONS +25°C +25°C
(2)
70°C
(3)
+85°C
(3)
UNITS MAX
LEVEL
(1)
AC PERFORMANCE (Figure 3)
Small-Signal Bandwidth (V
O
= 0.5Vp-p) G = +1, RF = 511Ω 600 MHz typ C
G = +2, R
F
= 487Ω 450 MHz min B
G = +8, R
F
= 348Ω 350 240 220 200 MHz typ C
G = +16, R
F
= 162Ω 250 MHz typ C
Bandwidth for 0.1dB Gain Flatness G = +2, V
O
< 0.5Vp-p, RF = 487Ω 140 80 70 60 MHz min B
Peaking at a Gain of +1 R
F
= 511Ω, VO < 0.5Vp-p 0.4 1.0 1.5 1.5 dB max B
Large Signal Bandwidth G = +8, V
O
= 2Vp-p 350 MHz typ C
Slew Rate G = +8, 2V Step 1900 1300 1200 1100 V/µs min B
Rise/Fall Time G = +8, V
O
= 0.5V Step 0.8 ns typ C
G = +8, VO = 2V Step 1.0 ns typ C
Settling Time to 0.02% G = +8, V
O
= 2V Step 9 ns typ C
0.1% G = +8, V
O
= 2V Step 7 ns typ C
Harmonic Distortion G = +8, f = 10MHz, V
O
= 2Vp-p
2nd Harmonic RL = 100Ω to VS/2 –60 –54 –53 –52 dBc max B
RL ≥ 500Ω to VS/2 –68 –60 –59 –58 dBc max B
3rd Harmonic RL = 100Ω to VS/2 –58 –51 –50 –50 dBc max B
RL ≥ 500Ω to VS/2 –60 –55 –54 –54 dBc max B
Input Voltage Noise f > 1MHz 1.7 1.8 2.2 2.2 nV/√Hz max B
Non-Inverting Input Current Noise f > 1MHz 13 15 15 15 pA/√Hz max B
Inverting Input Current Noise f > 1MHz 19 22 22 22 pA/√Hz max B
DC PERFORMANCE
(4)
Open-Loop Transimpedance Gain (ZOL)
VO = VS/2, RL = 100Ω to VS/2 40 25 23 20 kΩ min A
Input Offset Voltage V
CM
= VS/2 ±1 ±3 ±3.5 ±4.0 mV max A
Average Offset Voltage Drift V
CM
= VS/2 12 15 µV/°C max B
Non-Inverting Input Bias Current V
CM
= VS/2 +40 +110 ±120 ±150 µA max A
Average Non-Inverting Input Bias Current Drift V
CM
= VS/2 –550 –650 nA/°C max B
Inverting Input Bias Current V
CM
= VS/2 ±50 ±100 ±120 ±150 µA max A
Average Inverting Input Bias Current Drift V
CM
= VS/2 –550 –650 nA/°C max B
INPUT
Least Positive Input Voltage
(5)
1.7 1.8 1.9 2.0 V max A
Most Positive Input Voltage
(5)
3.3 3.2 3.1 3.0 V min A
Common-Mode Rejection Ratio (CMRR)
VCM = VS/2 54 48 47 47 dB min A
Non-Inverting Input Impedance 87 || 2 kΩ || pF typ C
Inverting Input Resistance (RI)
Open-Loop 23 Ω typ C
OUTPUT
Most Positive Output Voltage No Load 4.1 3.9 3.7 3.5 V min A
R
L
= 100Ω to VS/2 4.0 3.8 3.6 3.4 V min A
Least Positive Output Voltage No Load 0.9 1.1 1.3 1.5 V max A
R
L
= 100Ω to VS/2 1.0 1.2 1.4 1.6 V max A
Current Output, Sourcing V
O
= VS/2 90 62 60 58 mA min A
Current Output, Sinking V
O
= VS/2 –70 –45 –40 –38 mA min A
Closed-Loop Output Impedance G = +2, f = 100kHz 0.3 Ω typ C
DISABLE (Disable Low)
Power Down Supply Current (+V
S
)V
DIS
= 0 –270 µA typ C
Disable Time 150 ns typ C
Enable Time 150 ns typ C
Off Isolation G = +8, 10MHz 70 dB typ C
Output Capacitance in Disable 3 pF typ C
Turn On Glitch G = +2, R
L
= 150Ω, VIN = VS /2 ±160 mV typ C
Turn Off Glitch G = +2, R
L
= 150Ω, VIN = VS /2 ±20 mV typ C
Enable Voltage 3.3 3.5 3.6 3.7 V min A
Disable Voltage 1.8 1.7 1.6 1.5 V max A
Control Pin Input Bias Current (DIS) V
DIS
= 0 100 µA typ C
POWER SUPPLY
Specified Single-Supply Operating Voltage 5 V typ C
Max Single-Supply Operating Voltage 12 12 12 V max A
Max Quiescent Current V
S
= +5V 10.7 11.3 11.3 11.3 mA max A
Min Quiescent Current V
S
= +5V 10.7 9.0 8.3 8.1 mA min A
Power Supply Rejection Ratio (–PSRR) Input Referred 54 51 49 48 dB min A
TEMPERATURE RANGE
Specification: U, N
–40 to +85
°C typ C
Thermal Resistance,
θ
JA
Junction-to-Ambient
U SO-8 125 °C/W typ C
N SOT23-6 150 °C/W typ C
NOTES: (1) Test levels: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information. (2) Junction temperature = ambient for 25°C guaranteed specifications. (3) Junction temperature = ambient at low temperature
limit: junction temperature = ambient +23°C at high temperature limit for over temperature guaranteed specifications. (4) Current is considered positive out-of-node.
V
CM
is the input common-mode voltage. (5) Tested < 3dB below minimum specified CMRR at ±CMIR limits.