Burr Brown OPA650P, OPA650U-2K5, OPA650U, OPA650N-3K, OPA650N-250 Datasheet

®

OPA6501

FEATURES

● LOW POWER: 50mW

● UNITY GAIN STABLE BANDWIDTH:

560MHz

● LOW HARMONICS: –77dBc at 5MHz

● FAST SETTLING TIME: 20ns to 0.01%

● LOW INPUT BIAS CURRENT: 5

µA

● DIFFERENTIAL GAIN/PHASE ERROR:

0.01%/0.03

°

● HIGH OUTPUT CURRENT: 85mA

DESCRIPTION

The OPA650 is a low power, wideband voltage feed­back operational amplifier. It features a high band­width of 560MHz as well as a 12-bit settling time of
only 20ns. The low distortion allows its use in commu­nications applications, while the wide bandwidth and
true differential input stage make it suitable for use in
a variety of active filter applications. Its low distortion
gives exceptional performance for telecommunica­tions, medical imaging and video applications.

The OPA650 is internally compensated for unity-gain
stability. This amplifier has a fully symmetrical differ­ential input due to its “classical” operational amplifier
circuit architecture. Its unusual combination of speed,
accuracy and low power make it an outstanding choice
for many portable, multi-channel and other high speed
applications, where power is at a premium.

The OPA650 is also available in dual (OPA2650) and
quad (OPA4650) configurations.

Wideband, Low Power Voltage Feedback

OPERATIONAL AMPLIFIER

OPA650

®

APPLICATIONS

● HIGH RESOLUTION VIDEO

● BASEBAND AMPLIFIER

● CCD IMAGING AMPLIFIER

● ULTRASOUND SIGNAL PROCESSING

● ADC/DAC GAIN AMPLIFIER

● ACTIVE FILTERS

● HIGH SPEED INTEGRATORS

● DIFFERENTIAL AMPLIFIER

OPA650

OPA650

Current

Mirror

Output

Stage

C

C

Inverting

Input

Non-Inverting

Input

+V

S

Output

–V

S

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone] • Twx: 910-952-1111

Internet: http://www.burr-brown.com/ • FAXLine: [phone] (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

© 1994 Burr-Brown Corporation PDS-1264F Printed in U.S.A. March, 1998

2

®

OPA650

NOTES: (1) An asterisk (✻) specifies the same value as the grade to the left. (2) Frequency response can be strongly influenced by PC board parasitics. The OPA650
is nominally compensated assuming 2pF parasitic load. The demonstration boards show low parasitic layouts for the different package styles.

SPECIFICATIONS

At TA = +25°C, VS = ±5V, RL = 100Ω, and RFB = 402Ω, unless otherwise noted. RFB = 25Ω for a gain of +1.

OPA650P, U, N OPA650UB, NB

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
FREQUENCY RESPONSE

Closed-Loop Bandwidth

(2)

G = +1 560 ✻

(1)

MHz
G = +2 140 ✻ MHz
G = +5 37 ✻ MHz

G = +10 18 ✻ MHz
Gain Bandwidth Product 180 ✻ MHz
Slew Rate G = +1, 2V Step 240 ✻ V/µs

Over Specified Temperature 220 ✻ V/µs
Rise Time 0.2V Step 1 ✻ ns
Fall Time 0.2V Step 1 ✻ ns
Settling Time 0.01% G = +1, 2V Step 19.6 ✻ ns

0.1% G = +1, 2V Step 10.2 ✻ ns
1% G = +1, 2V Step 6.3 ✻ ns

Spurious Free Dynamic Range G = +1, f = 5.0 MHz, V

O

= 2Vp-p

R

L

= 100Ω 73 ✻ dBc

R

L

= 200Ω 77 ✻ dBc

Differential Gain G = +1, NTSC, V

O

= 1.4Vp, RL = 150Ω 0.01 ✻ %

Differential Phase G = +1, NTSC, V

O

= 1.4Vp, RL = 150Ω 0.03 ✻ Degrees

Bandwidth for 0.1dB Gain Flatness G = +2 25 ✻ MHz

INPUT OFFSET VOLTAGE

Input Offset Voltage ±1 ±5 0.6 ± 2.5 mV

Average Drift ±3 ✻ µV/°C
Power Supply Rejection (+V

S

)|V

S

| = 4.5V to 5.5V 60 76 70 ✻ dB

(–V

S

)475350✻dB

INPUT BIAS CURRENT

Input Bias Current V

CM

= 0V 5 20 ✻ 10 µA

Over Temperature 30 20 µA
Input Offset Current V

CM

= 0V 0.5 1 0.2 0.5 µA

Over Temperature 32µA

NOISE

Input Voltage Noise

Noise Density, f = 100Hz 43 ✻ nV/√Hz

f = 10kHz 9.4 ✻ nV/√Hz
f = 1MHz 8.4 ✻ nV/√Hz
f = 1MHz to 100MHz 8.4 ✻ nV/√Hz

Integrated Noise, BW = 10Hz to 100MHz 84 ✻ µVrms
Input Bias Current Noise
Current Noise Density, f = 0.1MHz to 100MHz 1.2 ✻ pA/√Hz
Noise Figure (NF)

R

S

= 10kΩ 4 ✻ dB

R

S

= 50Ω 19.5 ✻ dB

INPUT VOLTAGE RANGE

Common-Mode Input Range ±2.8 ✻ V

Over Specified Temperature ±2.2 ✻ V
Common-Mode Rejection V

CM

= ±0.5V 65 90 70 ✻ dB

INPUT IMPEDANCE

Differential 15 || 1 ✻ kΩ || pF
Common-Mode 16 || 1 ✻ MΩ || pF

OPEN-LOOP GAIN

Open-Loop Voltage Gain V

O

= ±2V, RL = 100Ω 45 51 46 ✻ dB

Over Specified Temperature V

O

= ±2V, RL = 100Ω 43 44 dB

OUTPUT

Voltage Output

Over Specified Temperature No Load ±2.2 ±3.0 ±2.4 ✻ V

R

L

= 250Ω±2.2 ±2.5 ±2.4 ✻ V

R

L

= 100Ω±2.0 ±2.3 ±2.2 ✻ V

Current Output, Sourcing 75 110 ✻✻ mA

Over Specified Temperature 65 ✻ mA
Current Output, Sinking 65 85 ✻✻ mA

Over Specified Temperature 35 ✻ mA
Short Circuit Current 150 ✻ mA
Output Resistance 0.1MHz, G = +1 0.08 ✻ Ω

POWER SUPPLY

Specified Operating Voltage ±5 ✻ V
Derated Voltage Range ±4.5 ±5.5 ✻✻V
Quiescent Current ±5.1 ±7.75 ±5.1 ±6.5 mA

Over Specified Temperature ±8.75 ±7.5 mA

TEMPERATURE RANGE

Specification: P, U, N, UB, NB –40 +85 ✻✻°C
Thermal Resistance,

θ

JA

P 8-Pin DIP 100 ✻ °C/W

U SO-8 125 ✻ °C/W

N SOT23-5 150 ✻ °C/W

®

OPA6503

1

2

3

54+V

S

–Input

Output

–V

S

+Input

1

2
3
4

8

7
6
5

NC

+V

S

Output
NC

NC

–Input
+Input

–V

S

Supply ...............................................................................................±5.5V

Internal Power Dissipation .................................. See Thermal Conditions

Differential Input Voltage .................................................................. ±1.2V

Input Voltage Range ............................................................................ ±V

S

Storage Temperature Range: P, U, UB, N, NB ............ –40°C to +125°C

Lead Temperature (soldering, 10s) .............................................. +300°C

(soldering, SOIC 3s) ....................................... +260°C

Junction Temperature (T

J

) ............................................................ +175°C

ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION

Top View DIP/SO-8

SOT23-5

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility
for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or
licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support
devices and/or systems.

ELECTROSTATIC
DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per­formance degradation to complete device failure. Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods.

ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published speci­fications.

PACKAGE
DRAWING TEMPERATURE PACKAGE ORDERING

PRODUCT PACKAGE NUMBER

(1)

RANGE MARKING

(2)

NUMBER

(3)

OPA650U SO-8 Surface Mount 182 –40°C to +85°C OPA650U OPA650U
OPA650UB SO-8 Surface Mount 182 –40°C to +85°C OPA650UB OPA650UB
OPA650N 5-pin SOT23-5 331 –40°C to +85°C A50 OPA650N-250

OPA650N-3k

OPA650NB 5-pin SOT23-5 331 –40°C to +85°C A50B OPA650NB-250

OPA650NB-3k

OPA650P 8-Pin Plastic DIP 006 –40°C to +85°C OPA650P OPA650P

NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) The “B” grade of the SO-8 package
will be marked with a “B” by pin 8. The “B” grade of the SOT23-5 will be marked with a “B” near pins 3 and 4. (3) The SOT23-5 is only available on a 7" tape and reel
(e.g. ordering 250 pieces of “OPA650N-250” will get a single 250 piece tape and reel. Ordering 3000 pieces of “OPA650N-3k” will get a single 3000 piece tape and reel).
Please refer to Appendix B of Burr-Brown IC Data Book for detailed Tape and Reel Mechanical information.

PACKAGE/ORDERING INFORMATION

4

®

OPA650

TYPICAL PERFORMANCE CURVES

At TA = +25°C, VS = ±5V, RL = 100Ω, and RFB = 402Ω, unless otherwise noted. RFB = 25Ω for Gain of +1.

INPUT BIAS CURRENT AND OFFSET VOLTAGE

vs TEMPERATURE

7

6

5

4

2

1

0

–1

–50 –25 0 25 50 75 100

Input Bias Current (mA)

Offset Voltage (mV)

Temperature (°C)

V

OS

I

B

INPUT VOLTAGE AND CURRENT NOISE

vs FREQUENCY

Frequency (Hz)

100 1k 10k 100k 1M

100

10

1

Input Current Noise (pA/√Hz)

Input Voltage Noise (nV/√Hz)

Non-inverting and

Inverting Current Noise

Voltage Noise

SUPPLY CURRENT vs TEMPERATURE

7

6

5

4

3

–60 –40 –20 0 20 40 60 80 100

Supply Current (±mA)

Temperature (°C)

OUTPUT CURRENT vs TEMPERATURE

110

100

90

80

–50 –25 0 25 50 75 100

Output Current (±mA)

Temperature (°C)

I

O

+

I

O

–

COMMON-MODE REJECTION

vs INPUT COMMON-MODE VOLTAGE

100

90

80

70

60

–4 –3 –2 –1 0 1 2 3 4

Common Mode-Rejection (dB)

Common-Mode Voltage (V)

AOL, PSR AND CMRR vs TEMPERATURE

100

90

80

70

60

50

40

–50 –25 0 25 50 75 125

A

OL

, PSR and CMRR (dB)

Temperature (°C)

A

OL

PSR–

CMRR

PSR+