Burr Brown OPA642U-2K5, OPA642UB-2K5, OPA642NB-250, OPA642P, OPA642PB Datasheet

...
®
OPA642
1
10MSPS
clk
402
24
1Vp-p 5MHz
OPA642
100pF
+5V
REFB
ADS804
12-Bit
10MSPS
Measured
80dB SFDR
Analog
Input
402
0.1µF
0.1µF
5k
High Dynamic Range 10MSPS Digitizer
5k
0.1µF
2Vp-p
+5V
–5V
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Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
Wideband, Low Distortion, Low Gain
OPERATIONAL AMPLIFIER
APPLICATIONS
ADC/DAC BUFFER AMPLIFIER
LOW DISTORTION IF AMPLIFIER
HIGH RESOLUTION IMAGING
MEDICAL IMAGING
LOW NOISE PREAMPLIFIER
HIGH CMR DIFFERENCING AMPLIFIER
TEST INSTRUMENTATION
PROFESSIONAL AUDIO
FEATURES
LOW DISTORTION: –95dBc at 5MHz
GAIN OF +1 BANDWIDTH: 400MHz
AVAILABLE IN SOT23-5 PACKAGE
HIGH OPEN LOOP GAIN: 95dB
HIGH COMMON-MODE REJECTION: 90dB
FAST 12-BIT SETTLING: 13ns (0.01%)
LOW NOISE: 2.7nV/Hz
HIGH OUTPUT CURRENT:
±60 mA
VERY LOW DIFF GAIN/PHASE ERROR:
0.007%/0.008
°
®
OPA642
OPA642
OPA658
OPA642
DESCRIPTION
The OPA642 provides a level of speed and dynamic range previously unattainable in a monolithic op amp. Using a unity gain stable voltage feedback architec­ture with two internal gain stages, the OPA642 achieves exceptionally low harmonic distortion over a wide frequency range. The “classic” differential input pro­vides all the familiar benefits of precision op amps, such as bias current cancellation and very low invert­ing current noise compared with wideband current
feedback op amps. Fast settling time, excellent differ­ential gain/phase performance, low voltage noise and high output current drive make the OPA642 ideal for most high dynamic range applications.
Unity gain stability makes the OPA642 particularly suitable for low gain differential amplifiers, transimpedance amplifiers, gain of +2 video line driv­ers, wideband integrators and low distortion ADC buff­ers. Where higher gain or even lower harmonic distor­tion is required, consider the OPA643—a higher gain­bandwidth and lower noise version of the OPA642
©
1993 Burr-Brown Corporation PDS-1190F Printed in U.S.A. February, 1998
2
®
OPA642
OPA642P, U, N OPA642PB, UB, NB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
SPECIFICATIONS
ELECTRICAL
At TA = +25°C, VS = ±5V, RL = 100, RF = 402, unless otherwise noted. RF = 25 for a gain of +1.
OFFSET VOLTAGE
Input Offset Voltage ±1.5 ±4 ±0.5 ±1.0 mV
Average Drift 42µV/°C
Power Supply Rejection (PSR) V
S
= ±4.5 to ±5.5V 65 85 73 95 dB
INPUT BIAS CURRENT
Input Bias Current V
CM
= 0V 25 45 ✻✻ µA
Over Specified Temperature 70 ✻✻ µA
Input Offset Current V
CM
= 0V 0.1 2.0 ✻✻ µA
Over Specified Temperature 3.0 ✻✻ µA
NOISE
Input Voltage Noise
Noise Density: f 1MHz 2.7 nV/Hz Integrated Voltage Noise, BW = 100Hz to 100MHz 27 µVrms
Input Bias Current Noise Density
f 1MHz 2.8 pA/Hz
INPUT VOLTAGE RANGE
Common-Mode Input Range ±2.75 ±3.0 ✻✻ V
Over Temperature ±2.5 V
Common-Mode Rejection (CMR) V
CM
= ±0.5V 65 90 80 dB
INPUT IMPEDANCE
Differential 11 || 1 k || pF Common-Mode 650 || 1 k || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain (A
OL
)V
O
= ±2V, RL = 100 80 95 85 98 dB
Over Specified Temperature 80 dB
FREQUENCY RESPONSE
Closed-Loop Response Gain = +1V/V 400 MHz
Gain = +2V/V 150 MHz Gain = +5V/V 45 MHz
Gain = +10V/V 21 MHz Gain Bandwidth Product (GBP) 210 MHz Slew Rate
(1)
G = +1, 2V Step 380 V/µs
At Minimum Specified Temperature G = +1, 2V Step 340 V/µs
Settling Time: 0.01% G = +1, 1V Step 13 ns
0.1% G = +1, 1V Step 11.5 ns 1% G = +1, 1V Step 3.5 ns
Spurious Free Dynamic Range (SFDR) G = +1, f = 5MHz 92 95 dBc
V
O
= 2Vp-p, RL = 100
Diff. Gain Error at 3.58MHz, G = +2V/V V
O
= 0V to 1.4V, RL = 150 0.007 %
Diff. Phase Error at 3.58MHz, G = +2V/V V
O
= 0V to 1.4V, RL = 150 0.008 degrees
OUTPUT
Voltage Output No Load ±3.5 V
Over Specified Temperature ±3.0 V
Voltage Output R
L
= 100Ω±2.75 V
Over Specified Temperature ±2.5 ✻✻ V
Current Output, +25°C ±40 ±60 ±50 ±65 mA
Over Specified Temperature ±35 ±40 mA
Closed-Loop Output Resistance 0.1MHz, G = +1V/V 0.01
POWER SUPPLY
Specified Operating Voltage ±5 V Operating Voltage Range T
MIN
to T
MAX
±4.5 ±5.5 ✻✻V
Quiescent Current ±20 ±25 ±16 ✻✻ mA
Over Specified Temperature ±26 mA
TEMPERATURE RANGE
Specification: P, U, N, PB, UB, NB Ambient –40 +85 ✻✻°C Thermal Resistance
θ
JA
, Junction-to-Ambient °C/W P, PB 8-Pin DIP 100 °C/W U, UB 8-Pin SO-8 125 °C/W N, NB 5-Pin SOT23-5 150 °C/W
Indicates same specification as for OPA642P, U, N. NOTE: (1) Slew rate is rate of change from 10% to 90% of output voltage step.
®
OPA642
3
Top View DIP/SO-8
SOT23-5
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
ABSOLUTE MAXIMUM RATINGS
Supply ..........................................................................................±6.0VDC
Internal Power Dissipation
(1)
.................................. See Thermal Analysis
Differential Input Voltage .................................................................. ±1.2V
Input Voltage Range ............................................................................ ± V
S
Storage Temperature Range: P, PB, U, UB, N, NB ..... –40°C to +125°C
Lead Temperature (soldering, 10s).............................................. +300°C
(soldering, SO-8 3s) ....................................... +260°C
Junction Temperature (T
J
) ............................................................ +175°C
NOTE: (1) Packages must be derated based on specified
θ
JA. Maximum
T
J
must be observed.
PIN CONFIGURATION
1
2 3 4
8
7 6 5
+V
S2
(1)
+V
S1
Output –V
S2
(1)
NC
Inverting Input
Non-Inverting Input
–V
S1
NOTE: (1) Making use of all four power supply pins is recommended, although not required. Using these four pins, instead of just pins 4 and 7, will lower the power supply impedance improving distortion.
PACKAGE DRAWING TEMPERATURE PACKAGE ORDERING
PRODUCT PACKAGE NUMBER
(1)
RANGE MARKING
(2)
NUMBER
(3)
OPA642U SO-8 Surface Mount 182 –40°C to +85°C OPA642U OPA642U OPA642UB SO-8 Surface Mount 182 –40°C to +85°C OPA642UB OPA642UB OPA642N 5-pin SOT23-5 331 –40°C to +85°C A42 OPA642N-250
OPA642N-3k
OPA642NB 5-pin SOT23-5 331 –40°C to +85°C A42B OPA642NB-250
OPA642NB-3k OPA642P 8-Pin Plastic DIP 006 –40°C to +85°C OPA642P OPA642P OPA642PB 8-Pin Plastic DIP 006 –40°C to +85°C OPA642PB OPA642PB
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) The “B” grade of the SO-8 and DIP packages will be marked with a “B” by pin 8. The “B” grade of the SOT23-5 will be marked with a “B” near pins 3 and 4. (3) The SOT23-5 is only available on a 7" tape and reel (e.g. ordering 250 pieces of “OPA642N-250” will get a single 250 piece tape and reel. Ordering 3000 pieces of “OPA642N-3k” will get a single 3000 piece tape and reel). Please refer to Appendix B of Burr-Brown IC Data Book for detailed Tape and Reel Mechanical information.
PACKAGE/ORDERING INFORMATION
ELECTROSTATIC DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from per­formance degradation to complete device failure. Burr­Brown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods.
ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet published specifications.
1
2
3
54+V
S
Inverting Input
Output
–V
S
Non-Inverting Input
4
®
OPA642
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±5V, RL = 100, RF = 402Ω, G = +2, unless otherwise noted. RF = 25 for a gain of +1.
SMALL SIGNAL TRANSIENT RESPONSE
(G = +1, R
L
= 100)
Time (5ns/div)
200 160 120
80 40
0 –40 –80
–120 –160 –200
Output Voltage (mV)
LARGE SIGNAL TRANSIENT RESPONSE
(G = +1, R
L
= 100)
Time (5ns/div)
2.0
1.6
1.2
0.8
0.4 0
–0.4 –0.8 –1.2 –1.4 –2.0
Output Voltage (V)
LARGE SIGNAL FREQUENCY RESPONSE
Frequency
0.5MHz 10MHz 100MHz 500MHz
12
9 6 3 0
–3
–9 –12 –15 –18 –21
Gain (3dB/div)
G = +2 VO = 1Vp-p
VO = 2Vp-p
VO = 4Vp-p
RS vs CAPACITIVE LOAD
Capacitive Load (pF)
101 100
30
25
20
15
10
5
0
R
S
()
SMALL SIGNAL FREQUENCY RESPONSE
Frequency
0.5MHz 10MHz 100MHz 500MHz
6 3
0 –3 –6 –9
–12 –15 –18 –21 –24
Normalized Gain (3dB/div)
VO = 0.1Vp-p
G = +1
G = +2
G = +5
G = +10
FREQUENCY RESPONSE vs CAPACITIVE LOAD
Frequency (20MHz/div)
100MHz0 200MHz
12
9 6 3
0 –3 –6 –9
–12 –15 –18
Gain to Capacitive Load (3dB/div)
CL = 10pFG = +2
CL = 22pF
CL = 47pF
1k
402
(1kis optional)
402
OPA642
R
S
C
L
V
IN
V
O
CL = 100pF
®
OPA642
5
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±5V, RL = 100, RF = 402Ω, G = +2, unless otherwise noted. RF = 25 for a gain of +1.
5MHz 2ND HARMONIC DISTORTION
Output Voltage Swing (Vp-p)
10.1 10
G = +2
–65
–70
–75
–80
–85
–90
–95
–100
2nd Harmonic Distortion (dBc)
RL = 100
RL = 500
RL = 200
5MHz 3RD HARMONIC DISTORTION
Output Voltage Swing (Vp-p)
10.1 10
G = +2
–65
–70
–75
–80
–85
–90
–95
–100
3rd Harmonic Distortion (dBc)
RL = 100, 200, or 500
10MHz 3RD HARMONIC DISTORTION
Output Voltage Swing (Vp-p)
10.1 10
G = +2
–60 –65 –70 –75 –80 –85 –90 –95
–100
3rd Harmonic Distortion (dBc)
RL = 100
RL = 200
RL = 500
20MHz 3RD HARMONIC DISTORTION
Output Voltage Swing (Vp-p)
10.1 10
G = +2
–50 –55 –60 –65 –70 –75 –80 –85 –90
3rd Harmonic Distortion (dBc)
RL = 100
RL = 200
RL = 500
20MHz 2ND HARMONIC DISTORTION
Output Voltage Swing (Vp-p)
10.1 10
G = +2
–50 –55 –60 –65 –70 –75 –80 –85 –90
2nd Harmonic Distortion (dBc)
RL = 200
RL = 500
RL = 100
10MHz 2ND HARMONIC DISTORTION
Output Voltage Swing (Vp-p)
10.1 10
–60 –65 –70 –75 –80 –85 –90 –95
–100
2nd Harmonic Distortion (dBc)
G = +2
RL = 100
RL = 200
RL = 500
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