The OPA128 is an ultra-low bias current monolithic
operational amplifier. Using advanced geometry
dielectrically-isolated FET (
lithic amplifier achieves a performance level exceeding even the best hybrid electrometer amplifiers.
Laser-trimmed thin-film resistors give outstanding voltage offset and drift performance.
A noise-free cascode and low-noise processing give
the OPA128 excellent low-level signal handling capabilities. Flicker noise is very low.
The OPA128 is an improved pin-for-pin replacement
for the AD515.
®
Difet
Burr-Brown Corp.
®
Difet
) inputs, this mono-
Case (Guard)
8
–In
2
3
+In
Trim
Trim
Ω1k
1
5
Ω1k
Noise-Free
Cascode
28kΩ
2kΩ2kΩ
OPA128 Sim
28kΩ
lified Circuit
7
+V
CC
6
Output
4
–V
CC
SBOS148
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Voltage OutputRL = 2kΩ±10±13±10±13±10±13±10±13V
Current OutputV
Output ResistanceDC, Open Loop100100100100Ω
Load Capacitance StabilityGain = +11000100010001000pF
Short Circuit Current103455103455103455103455mA
POWER SUPPLY
Rated Voltage±15±15±15±15VDC
Voltage Range,
Derated Performance±5±18±5±18±5±18±5±18VDC
Current, QuiescentI
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. Bias current doubles approximately every 11°C. (2) Sample
tested. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive.
(4) If it is possible for the input voltage to exceed the supply voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices
can withstand overload currents of 0.3mA indefinitely without damage.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
(1)
R
≥ 10kΩ±150 ±300±75±150±40±75±75±150fA
(1)
(1)
L
R
≥ 10kΩ65303030fA
L
= T
to T
A
MIN
MAX
±20±10±5±10µV/°C
±1±100±1±32±1±32±1±32µV/V
= 10Hz92929292nV/√Hz
O
= 100Hz78787878nV/√Hz
O
= 1kHz27272727nV/√Hz
O
= 10kHz15151515nV/√Hz
O
= 10Hz to 10kHz2.42.42.42.4µVrms
B
= 0.1Hz to 10Hz4444µVp-p
B
= 0.1Hz to 10Hz4.232.33fA, p-p
B
= 0.1Hz to 20kHz0.220.160.120.16fA/√Hz
O
13
|| 11013 || 11013 || 11013 || 1Ω || pF
15
|| 21015 || 21015 || 21015 || 2Ω || pF
(4)
= ±10VDC80118901189011890118dB
IN
(2)
= 2kΩ47474747kHz
L
= ±10V, RL = 2kΩ 0.53131313V/µs
O
(3)
L
Gain = –15555µs
= ±10VDC±5±10±5±10±5±10±5±10mA
O
= 0mADC0.91.50.91.50.91.50.91.5mA
O
0.510.510.510.51MHz
= 2kΩ5555µs
®
OPA128
2
Page 3
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At V
= ±15VDC and TA = T
CC
PARAMETERCONDITIONSMINTYPMAXMINTYPMAXMINTYPMAXMINTYP MAXUNITS
TEMPERATURE RANGE
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (2) If it is possible for the input voltage to exceed the supply
voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices can withstand overload currents of 0.3mA indefinitely without
damage.
Differential Input Voltage ..............................................................±36VDC
Input Voltage Range .....................................................................±18VDC
Storage Temperature Range .......................................... –65°C to +150°C
Operating Temperature Range ....................................... –55°C to +125°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Output Short Circuit Duration
Junction Temperature .................................................................... +175°C
NOTES: (1) Packages must be derated based on
200°C/W. (2) Short circuit may be to power supply common only. Rating
applies to +25°C ambient. Observe dissipation limit and T
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
θ
=
JA
(1)
®
3
OPA128
Page 4
DICE INFORMATION
OPA128 DIE TOPOGRAPHY
PADFUNCTION
1Offset Trim
2–In
3+In
4–V
5Offset Trim
6Output
7+V
8Substrate
NCNo Connection
Substrate Bias: Isolated, normally connected to common.
CC
CC
MECHANICAL INFORMATION
MILS (0.001")MILLIMETERS
Die Size96 x 71 ±52.44 x 1.80 ±0.13
Die Thickness20 ±30.51 ±0.08
Min. Pad Size4 x 40.10 x 0.10
BackingNone
TYPICAL PERFORMANCE CURVES
At TA = +25°C, ±15VDC, unless otherwise noted.
140
120
100
80
60
Voltage Gain (dB)
40
20
0
11k1010010k100k1M10M
120
110
100
OPEN-LOOP FREQUENCY RESPONSE
Gain
Phase
Margin
∼
90°
∼
Frequency (Hz)
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
–45
Ø
–90
–135
Phase Shift (Degrees)
–180
140
120
100
80
60
40
Power Supply Rejection (dB)
20
140
120
100
80
POWER SUPPLY REJECTION vs FREQUENCY
+PSRR
–PSRR
0
11k1010010k100k1M10M
Frequency (Hz)
COMMON-MODE REJECTION
vs FREQUENCY
90
80
Common-Mode Rejection (dB)
70
–15
–10–5051015
Common-Mode Voltage (V)
®
OPA128
60
40
20
Common-Mode Rejection (dB)
0
11k1010010k100k1M10M
4
Frequency (Hz)
Page 5
TYPICAL PERFORMANCE CURVES (CONT)
100
–75–50–2502550125
Ambient Temperature (°C)
140
130
120
110
PSR, CMR, Voltage Gain (dB)
OPEN-LOOP GAIN, PSR, AND CMR vs TEMPERATURE
75
100
PSR
CMR
A
OL
At TA = +25°C, +15VDC, unless otherwise noted.
BIAS AND OFFSET CURRENT
100pA
10pA
1pA
100
10
Bias and Offset Current (fA)
1
–50–250255075125
GAIN-BANDWIDTH AND SLEW RATE
4
3
2
1
Gain-Bandwidth (MHz)
vs TEMPERATURE
SM
Ambient Temperature (°C)
vs TEMPERATURE
I
B
BIAS AND OFFSET CURRENT
10
1
I
OS
0.1
Normalized Bias and Offset Current
0.01
100
4
3
2
Slew Rate (V/µs)
1
3
2
1
Gain-Bandwidth (MHz)
vs INPUT COMMON-MODE VOLTAGE
–15–10–5051015
Common-Mode Voltage (V)
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
+ Slew
– Slew
6
4
2
Slew Rate (V/µs)
0
–75–50–2502550125
Ambient Temperature (°C)
2
1.5
1
Supply Current (mA)
0.5
0
–75–50–2502550125
SUPPLY CURRENT vs TEMPERATURE
Ambient Temperature (°C)
0
75
100
75
100
5
0
051020
Supply Voltage (±V
15
)
CC
OPA128
0
®
Page 6
)
)
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, +15VDC, unless otherwise noted.
LARGE SIGNAL TRANSIENT RESPONSE
10
0
Output Voltage (V)
–10
5V
05025
Time (µs
COMMON-MODE INPUT RANGE
vs SUPPLY VOLTAGE
15
10
5
Common-Mode Voltage (±V)
0
051020
Supply Voltage (±V
5µs
5µs
15
)
CC
SMALL SIGNAL TRANSIENT RESPONSE
80
40
0
Output Voltage (mV)
–40
–80
100pA
10pA
1pA
100
Bias Current (fA)
10
20mV1µs
0108642
Time (µs
BIAS CURRENT
vs ADDITIONAL POWER DISSIPATION
KM
1
050100150200250350
Additional Power Dissipation (mW)
300
INPUT VOLTAGE NOISE SPECTRAL DENSITY
1k
100
Voltage Density (nV/ Hz)
10
1101001k10k100k
Frequency (Hz)
®
OPA128
30
20
10
Output Voltage (Vp-p)
0
1k10k1M
FULL-POWER OUTPUT vs FREQUENCY
100k
Frequency (Hz)
6
Page 7
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
The OPA128 offset voltage is laser-trimmed and will require
no further trim for most applications. As with most amplifiers, externally trimming the remaining offset can change
drift performance by about 0.3µV/°C for each 100µV of
adjusted effort. Note that the trim (Figure 1) is similar to
operational amplifiers such as HA-5180 and AD515. The
OPA128 can replace many other amplifiers by leaving the
external null circuit unconnected.
+V
CC
The amplifier case should be connected to any input shield or
guard via pin 8. This insures that the amplifier itself is fully
surrounded by guard potential, minimizing both leakage and
noise pickup (see Figure 2).
In
Non-Inverting
2
3
8
OPA128
Out
6
In
Buffer
2
OPA128
3
8
Out
6
7
2
6
1
(1)
NOTE: (1) 10kΩ to 1MΩ
Trim Potentiometer
(100kΩ Recommended)
±10mV Typical
Trim Range
3
OPA128
5
4
–V
CC
FIGURE 1. Offset Voltage Trim.
INPUT PROTECTION
Conventional monolithic FET operational amplifiers’ inputs
must be protected against destructive currents that can flow
when input FET gate-to-substrate isolation diodes are forward-biased. Most BIFET® amplifiers can be destroyed by
the loss of –VCC.
Because of its dielectric isolation, no special protection is
needed on the OPA128. Of course, the differential and
common-mode voltage limits should be observed.
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and FET types),
this may cause a noticeable degradation of offset voltage and
drift.
Static protection is recommended when handling any precision IC operational amplifier.
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce “hum” pickup in input
leads. If large feedback resistors are used, they should also be
shielded along with the external input circuitry. Leakage
currents across printed circuit boards can easily exceed the
bias current of the OPA128. To avoid leakage problems, it is
recommended that the signal input lead of the OPA128 be
wired to a Teflon standoff. If the input is to be soldered
directly into a printed circuit board, utmost care must be used
in planning the board layout. A “guard” pattern should
completely surround the high impedance input leads and
should be connected to a low impedance point which is at the
signal input potential.
Inverting
In
2
OPA128
3
Out
6
8
BOARD LAYOUT
FOR INPUT GUARDING
Guard top and bottom of board.
Alternate: use Teflon
for sensitive input pins.
Teflon® E.I. Du Pont de Nemours & Co.
TO-99 Bottom View
5
4
3
2
1
®
standoff
6
7
8
FIGURE 2. Connection of Input Guard.
Triboelectric charge (static electricity generated by friction)
can be a troublesome noise source from cables connected to
the input of an electrometer amplifier. Special low-noise cable
will minimize this effect but the optimum solution is to mount
the signal source directly at the electrometer input with short,
rigid, wiring to preclude microphonic noise generation.
TESTING
Accurately testing the OPA128 is extremely difficult due to its
high level of performance. Ordinary test equipment may not
be able to resolve the amplifier’s extremely low bias current.
Inaccurate bias current measurements can be due to:
1. Test socket leakage
2. Unclean package
3. Humidity or dew point condensation
4. Circuit contamination from fingerprints or anti-static
treatment chemicals
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(2)
Lead/Ball Finish MSL Peak Temp
(3)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
Page 11
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty . Except where mandated by government requirements, testing of all
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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