The OPA124 is a precision monolithic FET operational amplifier using a
manufacturing process. Outstanding DC and AC performance characteristics allow its use in the most
critical instrumentation applications.
Bias current, noise, voltage offset, drift, open-loop
gain, common-mode rejection and power supply rejection are superior to BIFET and CMOS amplifiers.
Difet
fabrication achieves extremely low input bias
currents without compromising input voltage noise
performance. Low input bias current is maintained
over a wide input common-mode voltage range with
unique cascode circuitry. This cascode design also
allows high precision input specifications and reduced
susceptibility to flicker noise. Laser trimming of thinfilm resistors gives very low offset and drift.
Compared to the popular OPA111, the OPA124 gives
comparable performance and is available in an 8-pin
PDIP and 8-pin SOIC package.
BIFET® National Semiconductor Corp.,
®
Difet
Burr-Brown Corp.
µV max
µV/°C max
Difet
(dielectrical isolation)
OPA124
OPA124
Difet
APPLICATIONS
● PRECISION PHOTODIODE PREAMP
● MEDICAL EQUIPMENT
● OPTOELECTRONICS
● DATA ACQUISITION
● TEST EQUIPMENT
Substrate
8
–In
2
+In
3
(1)
Trim
1
(1)
Trim
5
NOTES: (1) Omitted on SOIC. (2) Patented.
Noise-Free Cascode
10kΩ
10kΩ
2kΩ
2kΩ
OPA124 Simplified Circuit
®
(2)
2kΩ
2kΩ
+V
CC
7
Output
6
–V
CC
4
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Voltage OutputR
Current OutputV
Output ResistanceDC, Open Loop100✻✻Ω
Load Capacitance StabilityGain = +11000✻✻pF
Short Circuit Current1040✻✻✻✻mA
POWER SUPPLY
Rated Voltage±15✻✻VDC
Voltage Range, Derated±5±18✻✻✻✻VDC
Current, QuiescentI
TEMPERATURE RANGE
Specification T
Storage–65+125✻✻✻✻°C
θ
Junction-Ambient: PDIP90✻✻°C/W
SOIC100✻✻°C/W
✻ Specification same as OPA124U, P
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. For performance at other temperatures see Typical Performance
Curves. (2) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive.
(3) For performance at other temperatures see Typical Performance Curves. (4) Sample tested, 98% confidence. (5) Guaranteed by design.
(4)
= 10Hz
O
f
O
f
O
f
O
f
B
f
B
B
f
O
(4)
= 100Hz
(4)
= 1kHz
(5)
= 10kHz
= 10Hz to 10kHz
(5)
= 0.1Hz to 10Hz1.63.3✻✻✻✻µVp-p
= 0.1Hz to 10Hz9.515✻✻✻✻fAp-p
= 0.1Hz thru 20kHz0.50.8✻✻✻✻fA/√Hz
(1)
= T
to T
A
MIN
= ±10V to ±18V8811090✻100✻dB
CC
= T
(1)
(1)
(2)
A
IN
= T
A
= ±10V, RL = 2kΩ11.6✻✻✻✻V/µs
O
O
O
MAX
MIN
to T
MAX
8410086✻90✻dB
= ±10VDC9211094✻100✻dB
to T
MIN
MAX
≥ 2kΩ106125✻✻120✻dB
L
= 2kΩ1632✻✻✻✻kHz
L
= 2kΩ6✻✻µs
L
86100✻✻90✻dB
Gain = –15✻✻µs
= 2kΩ±11±12✻✻✻✻V
L
= ±10VDC±5.5±10✻✻✻✻mA
= 0mADC2.53.5✻✻✻✻mA
MIN
and T
MAX
–25+85✻✻✻✻°C
4080✻✻✻✻nV/√Hz
1540✻✻✻✻nV/√Hz
815✻✻✻✻nV/√Hz
68✻✻✻✻nV/√Hz
0.71.2✻✻✻✻µVrms
±4±7.5±2±4±1±2µV/°C
13
|| 1✻✻Ω || pF
14
|| 3✻✻Ω || pF
®
OPA124
2
CONNECTION DIAGRAMS
Top ViewDIP
Top ViewSOIC
Offset Trim
–In
+In
–V
1
–V
NC
–In
+In
2
3
4
S
NC = No Connect
1
2
3
4
S
8
7
6
5
Substrate
+V
S
Output
Offset Trim
8
7
6
5
Substrate
+V
S
Output
NC
PACKAGE/ORDERING INFORMATION
PRODUCTPACKAGEDRAWING NUMBER
OPA124U8-Lead SOIC182–25°C to +85°C57.5
OPA124P8-Pin Plastic DIP006–25°C to +85°C57.5
OPA124UA8-Lead SOIC182–25°C to +85°C24
OPA124PA8-Pin Plastic DIP006–25°C to +85°C24
OPA124PB8-Pin Plastic DIP006–25°C to +85°C12
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
Internal Power Dissipation
Differential Input Voltage
Input Voltage Range
Storage Temperature Range .......................................... –65°C to +150°C
Operating Temperature Range ....................................... –40°C to +125°C
Lead Temperature (soldering, 10s)................................................ +300°C
Output Short Circuit Duration
Junction Temperature .................................................................... +175°C
NOTES: (1) Stresses above these ratings may cause permanent damage.
(2) Packages must be derated based on
for SOIC. (3) For supply voltages less than ±18VDC, the absolute maximum
input voltage is equal to +18V > V
may be to power supply common only. Rating applies to +25°C ambient.
Observe dissipation limit and T
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
BIASOFFSET
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
3
OPA124
®
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