BURR-BROWN OPA124 User Manual

查询OPA124供应商
®
Low Noise Precision
OPERATIONAL AMPLIFIER
FEATURES
LOW NOISE: 6nV/Hz (10kHz)
LOW BIAS CURRENT: 1pA max
LOW OFFSET: 250
HIGH OPEN-LOOP GAIN: 120dB min
HIGH COMMON-MODE REJECTION:
100dB min
AVAILABLE IN 8-PIN PLASTIC DIP
AND 8-PIN SOIC PACKAGES
DESCRIPTION
The OPA124 is a precision monolithic FET opera­tional amplifier using a manufacturing process. Outstanding DC and AC per­formance characteristics allow its use in the most critical instrumentation applications.
Bias current, noise, voltage offset, drift, open-loop gain, common-mode rejection and power supply re­jection are superior to BIFET and CMOS amplifiers.
Difet
fabrication achieves extremely low input bias currents without compromising input voltage noise performance. Low input bias current is maintained over a wide input common-mode voltage range with unique cascode circuitry. This cascode design also allows high precision input specifications and reduced susceptibility to flicker noise. Laser trimming of thin­film resistors gives very low offset and drift.
Compared to the popular OPA111, the OPA124 gives comparable performance and is available in an 8-pin PDIP and 8-pin SOIC package.
BIFET® National Semiconductor Corp.,
®
Difet
Burr-Brown Corp.
µV max
µV/°C max
Difet
(dielectrical isolation)
OPA124
OPA124
Difet
APPLICATIONS
PRECISION PHOTODIODE PREAMP
MEDICAL EQUIPMENT
OPTOELECTRONICS
DATA ACQUISITION
TEST EQUIPMENT
Substrate
8
–In
2
+In
3
(1)
Trim
1
(1)
Trim
5
NOTES: (1) Omitted on SOIC. (2) Patented.
Noise-Free Cascode
10k
10k
2k
2k
OPA124 Simplified Circuit
®
(2)
2k
2k
+V
CC
7
Output
6
–V
CC
4
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
© 1993 Burr-Brown Corporation PDS-1203C Printed in U.S.A. March, 1998
1
OPA124
SPECIFICATIONS
ELECTRICAL
At V
= ±15VDC and TA = +25°C, unless otherwise noted.
CC
OPA124U, P OPA124UA, PA OPA124PB PARAMETER CONDITION MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS INPUT NOISE
Voltage,f
Current, f
OFFSET VOLTAGE
Input Offset Voltage VCM = 0VDC ±200 ±800 ±150 ±500 ±100 ±250 µV vs Temperature T Supply Rejection V vs Temperature T
BIAS CURRENT
Input Bias Current VCM = 0VDC ±1 ±5 ±0.5 ±2 ±0.35 ±1pA
OFFSET CURRENT
Input Offset Current VCM = 0VDC ±1 ±5 ±0.5 ±1 ±0.25 ±0.5 pA
IMPEDANCE
Differential 10 Common-Mode 10
VOLTAGE RANGE
Common-Mode Input Range ±10 ±11 ✻✻ ✻✻ V Common-Mode Rejection V vs Temperature T
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain R
FREQUENCY RESPONSE
Unity Gain, Small Signal 1.5 ✻✻MHz Full Power Response 20Vp-p, R Slew Rate V THD 0.0003 ✻✻% Settling Time, 0.1% Gain = –1, R
0.01% 10V Step 10 ✻✻µs Overload Recovery, 50% Overdrive
RATED OUTPUT
Voltage Output R Current Output V Output Resistance DC, Open Loop 100 ✻✻ Load Capacitance Stability Gain = +1 1000 ✻✻pF Short Circuit Current 10 40 ✻✻ ✻✻ mA
POWER SUPPLY
Rated Voltage ±15 ✻✻VDC Voltage Range, Derated ±5 ±18 ✻✻✻✻VDC Current, Quiescent I
TEMPERATURE RANGE
Specification T Storage –65 +125 ✻✻✻✻°C
θ
Junction-Ambient: PDIP 90 ✻✻°C/W
SOIC 100 ✻✻°C/W
Specification same as OPA124U, P NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. For performance at other temperatures see Typical Performance
Curves. (2) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive. (3) For performance at other temperatures see Typical Performance Curves. (4) Sample tested, 98% confidence. (5) Guaranteed by design.
(4)
= 10Hz
O
f
O
f
O
f
O
f
B
f
B B
f
O
(4)
= 100Hz
(4)
= 1kHz
(5)
= 10kHz = 10Hz to 10kHz
(5)
= 0.1Hz to 10Hz 1.6 3.3 ✻✻ ✻✻µVp-p = 0.1Hz to 10Hz 9.5 15 ✻✻ ✻✻fAp-p = 0.1Hz thru 20kHz 0.5 0.8 ✻✻ ✻✻fA/Hz
(1)
= T
to T
A
MIN
= ±10V to ±18V 88 110 90 100 dB
CC
= T
(1)
(1)
(2)
A
IN
= T
A
= ±10V, RL = 2k 1 1.6 ✻✻ ✻✻ V/µs
O
O
O
MAX
MIN
to T
MAX
84 100 86 90 dB
= ±10VDC 92 110 94 100 dB
to T
MIN
MAX
2k 106 125 ✻✻ 120 dB
L
= 2k 16 32 ✻✻ ✻✻ kHz
L
= 2k 6 ✻✻µs
L
86 100 ✻✻ 90 dB
Gain = –1 5 ✻✻µs
= 2kΩ±11 ±12 ✻✻ ✻✻ V
L
= ±10VDC ±5.5 ±10 ✻✻ ✻✻ mA
= 0mADC 2.5 3.5 ✻✻ ✻✻mA
MIN
and T
MAX
–25 +85 ✻✻✻✻°C
40 80 ✻✻ ✻✻nV/Hz 15 40 ✻✻ ✻✻nV/Hz
815 ✻✻ ✻✻nV/Hz 68 ✻✻ ✻✻nV/Hz
0.7 1.2 ✻✻ ✻✻µVrms
±4 ±7.5 ±2 ±4 ±1 ±2 µV/°C
13
|| 1 ✻✻ || pF
14
|| 3 ✻✻ || pF
®
OPA124
2
CONNECTION DIAGRAMS
Top View DIP
Top View SOIC
Offset Trim
–In +In
–V
1
–V
NC –In +In
2 3 4
S
NC = No Connect
1 2 3 4
S
8 7 6 5
Substrate +V
S
Output Offset Trim
8 7 6 5
Substrate +V
S
Output NC
PACKAGE/ORDERING INFORMATION
PRODUCT PACKAGE DRAWING NUMBER
OPA124U 8-Lead SOIC 182 –25°C to +85°C 5 7.5 OPA124P 8-Pin Plastic DIP 006 –25°C to +85°C 5 7.5 OPA124UA 8-Lead SOIC 182 –25°C to +85°C2 4 OPA124PA 8-Pin Plastic DIP 006 –25°C to +85°C2 4 OPA124PB 8-Pin Plastic DIP 006 –25°C to +85°C1 2
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
ABSOLUTE MAXIMUM RATINGS
Supply ........................................................................................... ±18VDC
Internal Power Dissipation Differential Input Voltage Input Voltage Range
Storage Temperature Range .......................................... –65°C to +150°C
Operating Temperature Range ....................................... –40°C to +125°C
Lead Temperature (soldering, 10s)................................................ +300°C
Output Short Circuit Duration
Junction Temperature .................................................................... +175°C
NOTES: (1) Stresses above these ratings may cause permanent damage. (2) Packages must be derated based on for SOIC. (3) For supply voltages less than ±18VDC, the absolute maximum input voltage is equal to +18V > V may be to power supply common only. Rating applies to +25°C ambient. Observe dissipation limit and T
(2)
......................................................... 750mW
(3)
..........................................................±36VDC
(3)
.................................................................±18VDC
(4)
............................................... Continuous
> –VCC – 6V. See Figure 2. (4) Short circuit
IN
.
J
(1)
θ
= 90°C/W for PDIP and 100°C/W
JA
PACKAGE TEMPERATURE CURRENT DRIFT
(1)
RANGE pA, max µV/° C, max
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
BIAS OFFSET
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
3
OPA124
®
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