Burr Brown LOG100JP Datasheet

®

LOG100

Precision

LOGARITHMIC AND LOG RATIO AMPLIFIER

FEATURES

● ACCURACY

0.37% FSO max Total Error
Over 5 Decades

● LINEARITY

0.1% max Log Conformity
Over 5 Decades

● EASY TO USE

Pin-selectable Gains
Internal Laser-trimmed Resistors

● WIDE INPUT DYNAMIC RANGE

6 Decades, 1nA to 1mA

● HERMETIC CERAMIC DIP

DESCRIPTION

The LOG100 uses advanced integrated circuit tech­nologies to achieve high accuracy, ease of use, low
cost, and small size. It is the logical choice for your
logarithmic-type computations. The amplifier has guar­anteed maximum error specifications over the full six­decade input range (1nA to 1mA) and for all possible
combinations of I
that involved error computations are not necessary.

The circuit uses a specially designed compatible thin­film monolithic integrated circuit which contains am­plifiers, logging transistors, and low drift thin-film

and I2. Total error is guaranteed so

1

APPLICATIONS

● LOG, LOG RATIO AND ANTILOG

COMPUTATIONS

● ABSORBANCE MEASUREMENTS

● DATA COMPRESSION

● OPTICAL DENSITY MEASUREMENTS

● DATA LINEARIZATION

● CURRENT AND VOLTAGE INPUTS

resistors. The resistors are laser-trimmed for maxi­mum precision. FET input transistors are used for the
amplifiers whose low bias currents (1pA typical) per­mit signal currents as low as 1nA while maintaining
guaranteed total errors of 0.37% FSO maximum.

Because scaling resistors are self-contained, scale
factors of 1V, 3V or 5V per decade are obtained
simply by pin selections. No other resistors are re­quired for log ratio applications. The LOG100 will
meet its guaranteed accuracy with no user trimming.
Provisions are made for simple adjustments of scale
factor, offset voltage, and bias current if enhanced
performance is desired.

Q

9

–V

CC

1

I

1

14

I

2

6

+V

CC

10

Com

International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706

Tel: [phone] • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

© 1981 Burr-Brown Corporation PDS-437E Printed in U.S.A. January, 1995

1

A

1

V

= K LOG

OUT

Q

2

A

2

7.5kΩ
24kΩ

I

1

I

2

PDS-437E

270Ω

220Ω

Resistor values nominal only;
laser-trimmed for precision gain.

39kΩ

7

3

4

5

2

V

OUT

K = 1

K = 3

K = 5

Scale
Factor
Trim

SPECIFICATIONS

ELECTRICAL

TA = +25°C and ±VCC = ±15V, after 15 minute warm-up, unless otherwise specified.

LOG100JP

PARAMETER CONDITIONS MIN TYP MAX UNITS
TRANSFER FUNCTION V

Log Conformity Error
Initial 1nA to 100µA (5 decades) 0.04 0.1 %

(1)

Either I1 or I

2

1nA to 1mA (6 decades) 0.15 0.25 %

Over Temperature 1nA to 100µA (5 decades) 0.002 %/°C

K Range

(2)

1nA to 1mA (6 decades) 0.001 %/°C

Accuracy 0.3 %
Temperature Coefficient 0.03 %/°C

ACCURACY

Total Error
Initial I

vs Temperature I

vs Supply I

INPUT CHARACTERISTICS (of Amplifiers A
Offset Voltage

(3)

K = 1,

and A2)

1

(4)

Current Input Operation

, I2 = 1mA ±55 mV

1

I

, I2 = 100µA ±30 mV

1

I

, I2 = 10µA ±25 mV

1

I

, I2 = 1µA ±20 mV

1

I

, I2 = 100nA ±25 mV

1

I

, I2 = 10nA ±30 mV

1

I

, I2 = 1nA ±37 mV

1

, I2 = 1mA ±0.20 mV/°C

1

I

, I2 = 100µA ±0.37 mV/°C

1

I

, I2 = 10µA ±0.28 mV/°C

1

I

, I2 = 1µA ±0.033 mV/°C

1

I

, I2 = 100nA ±0.28 mV/° C

1

I

, I2 = 10nA ±0.51 mV/°C

1

I

, I2 = 1nA ±1.26 mV/°C

1

, I2 = 1mA ±4.3 mV/V

1

I

, I2 = 100µA ±1.5 mV/V

1

I

, I2 = 10µA ±0.37 mV/V

1

I

, I2 = 1µA ±0.11 mV/V

1

I

, I2 = 100nA ±0.61 mV/V

1

I

, I2 = 10nA ±0.91 mV/V

1

I

, I2 = 1nA ±2.6 mV/V

1

Initial ±0.7 ±5mV
vs Temperature ±80 µV/°C
Bias Current
Initial 15
vs Temperature Doubles Every 10 °C
Voltage Noise 10Hz to 10kHz, RTI 3 µVrms
Current Noise 10Hz to 10kHz, RTI 0.5 pArms

AC PERFORMANCE

3dB Response
1nA C
1µAC
10µAC
1mA C
Step Response

(6)

, I2 = 10µA

(6)

= 4500pF 0.11 kHz

C

= 150pF 38 kHz

C

= 150pF 27 kHz

C

= 50pF 45 kHz

C

Increasing CC = 150pF
1µA to 1mA 11 µs
100nA to 1µA 7 µs
10nA to 100nA 110 µs
Decreasing C
1mA to 1µA 45 µs

= 150pF

C

1µA to 100nA 20 µs
100nA to 10nA 550 µs

OUTPUT CHARACTERISTICS

Full Scale Output (FSO) ±10 V
Rated Output
Voltage I
Current V
Current Limit

= ±5mA ±10 V

OUT

= ±10V ±5mA

OUT

Positive 12.5 mA
Negative 15 mA
Impedance 0.05 Ω

= K Log (I1/I2)

OUT

1, 3, 5 V/decade

(5)

pA

®

LOG100

2

®

SPECIFICATIONS (CONT)

ELECTRICAL

TA = +25°C and ±VCC = ±15V, after 15 minute warm-up, unless otherwise specified.

LOG100JP
PARAMETER CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY REQUIREMENTS

Rated Voltage ±15 VDC
Operating Range Derated Performance ±12 ±18 VDC
Quiescent Current ±7 ±9mA

AMBIENT TEMPERATURE RANGE

Specification 0 +70 °C
Operating Range Derated Performance –25 +85 °C
Storage –40 +85 °C

NOTES: (1) Log Conformity Error is the peak deviation from the best-fit straight line of the V
output. (2) May be trimmed to other values. See Applications section. (3) The worst-case Total Error for any ratio of I
I

and I2 are considered separately. (4) Total Error at other values of K is K times Total Error for K = 1. (5) Guaranteed by design. Not directly measurable due to

1

amplifier’s committed configuration. (6) 3dB and transient response are a function of both the compensation capacitor and the level of input current. See Typical
Performance Curves.

ABSOLUTE MAXIMUM RATINGS

Supply ................................................................................................ ±18V

Internal Power Dissipation .............................................................. 600mV

Input Current..................................................................................... 10mA

Input Voltage Range .......................................................................... ±18V

Storage Temperature Range ........................................... –40°C to +85°C

Lead Temperature (soldering, 10s) ............................................... +300°C

Output Short-circuit Duration .................................. Continuous to ground

Junction Temperature...................................................................... 175° C

PIN CONFIGURATION

SCALE FACTOR PIN CONNECTIONS

K, V/DECADE CONNECTIONS

5 5 to 7
3 4 to 7

1.9 4 and 5 to 7
1 3 to 7

0.85 3 and 5 to 7

0.77 3 and 4 to 7

0.68 3 and 4 and 5 to 7

FREQUENCY COMPENSATION

vs Log IIN curve expressed as a percent of peak-to-peak full scale

OUT

Bottom View

I

Common

2

–V

Input

NC
NC
NC

CC 

NC

14
13
12
11
10

9
8

NC = No Connection

is the largest of the two errors when

1/I2

1

I1 Input

2

Scale Factor Trim

3

K = 1

4

K = 3

5

K = 5



6

+V

CC

7

Output

ELECTROSTATIC
DISCHARGE SENSITIVITY

Any integral circuit can be damaged by ESD. Burr-Brown

9

1

LOG100

14

6

543

7

10

recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small

C

C

parametric changes could cause the device not to meet
published specifications.

ORDERING INFORMATION

SPECIFIED

TEMPERATURE

MODEL PACKAGE RANGE

LOG100JP 14-Pin Hermetic Ceramic DIP 0°C to +70°C

PACKAGE INFORMATION

MODEL PACKAGE NUMBER

LOG100JP 14-Pin Hermetic Ceramic DIP 148

NOTES: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book. (2) During 1994, the package
was changed from plastic to hermetic ceramic. Pinout, model number, and
specifications remained unchanged. The metal lid of the new package is
internally connected to common, pin 10.

3

PACKAGE DRAWING

(2)

LOG100

(1)