Burr-Brown DAC7731 User Manual

DAC7731
SBAS249 – DECEMBER 2001
16-Bit, Voltage Output, Serial Input
DIGITAL-TO-ANALOG CONVERTER
DAC7731
FEATURES
LOW POWER: 150mW MAXIMUM
+10V INTERNAL REFERENCE
UNIPOLAR OR BIPOLAR OPERATION
SETTLING TIME: 5µs to ±0.003% FSR
16-BIT MONOTINICITY, –40°C TO +85°C
±10V, ±5V, OR +10V CONFIGURABLE VOLTAGE
OUTPUT
RESET TO ZERO OR MID-SCALE
DOUBLE-BUFFERED DATA INPUT
DAISY-CHAIN FEATURE FOR MULTIPLE
DAC7731s ON A SINGLE BUS
SMALL SSOP-24 PACKAGE
APPLICATIONS
PROCESS CONTROL
ATE PIN ELECTRONICS
CLOSED-LOOP SERVO CONTROL
MOTOR CONTROL
DATA ACQUISITION SYSTEMS
DESCRIPTION
The DAC7731 is a 16-bit Digital-to-Analog Converter (DAC) which provides 16 bits of monotonic performance over the specified operating temperature range and offers a +10V internal reference. Designed for automatic test equipment and industrial process control applications, the DAC7731’s output swing can be configured in a ±10V, ±5V, or +10V range. The flexibility of the output configuration allows the DAC7731 to provide both unipolar and bipolar operation by pin strapping. The DAC7731 includes a high-speed output amplifier with a maximum settling time of 5µs to ±0.003% FSR for a 20V full-scale change and only consumes 100mW (typical) of power.
The DAC7731 features a standard 3-wire, SPI-compatible serial interface with double buffering to allow asynchronous updates of the analog output as well as a serial data output line for daisy-chaining multiple DAC7731’s. A user program­mable reset control forces the DAC output to either min-scale (0000
) or mid-scale (8000H), overriding both the input and
H
DAC register values. The DAC7731 is available in a SSOP-24 package and three performance grades specified to operate from –40°C to +85°C.
V
DDVSSVCC
REFEN
RSTSEL
RST
LDAC
SCLK
CS
SDO
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Enable
SDI
AGND DGND
REFADJ
Control
Logic
Input
Register
REF
+10V
Reference
Register
REF
OUT
DAC
www.ti.com
IN
Buffer
V
DAC
REF
R
OFFSET
RFB2
RFB1
SJ
V
OUT
Copyright © 2001, Texas Instruments Incorporated
ABSOLUTE MAXIMUM RATINGS
V
to VSS...........................................................................–0.3V to +32V
CC
V
to AGND ...................................................................... –0.3V to +16V
CC
V
to AGND ...................................................................... –16V to +0.3V
SS
AGND
to DGND................................................................... –0.3V to 0.3V
REF
to AGND .............................................................. 0V to VCC – 1.4V
IN
V
to DGND ........................................................................ –0.3V to +6V
DD
Digital Input Voltage to DGND ................................. –0.3V to V
Digital Output Voltage to DGND .............................. –0.3V to V
Operating Temperature Range ........................................ –40°C to +85°C
Storage Temperature Range ......................................... –65°C to +150°C
Junction Temperature (TJ Max) .................................................... +150°C
NOTE: (1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
(1)
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru­ments recommends that all integrated circuits be handled with
+ 0.3V
DD
+ 0.3V
DD
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
PRODUCT PACKAGE-LEAD DESIGNATOR
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
DAC7731E SSOP-24 DB –40°C to +85°C DAC7731E DAC7731E Rails, 60
(1)
"" " " "DAC7731E/1K Tape and Reel,1000
DAC7731EB SSOP-24 DB –40°C to +85°C DAC7731EB DAC7731EB Rails, 60
"" " " "DAC7731EB/1K Tape and Reel, 1000
DAC7731EC SSOP-24 DB –40°C to +85°C DAC7731EC DAC7731EC Rails, 60
"" " " "DAC7731EC/1K Tape and Reel, 1000
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “DAC7731EC/1K” will get a single 1000-piece Tape and Reel.
SPECIFIED
RANGE MARKING NUMBER
(2)
MEDIA, QUANTITY
ELECTRICAL CHARACTERISTICS
All specifications at TA = T
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS ACCURACY
Linearity Error (INL) ±6 ±4 ±3LSB
Differential Linearity Error Monotonicity 14 15 16 Bits Offset Error Offset Error Drift Gain Error With Internal REF ±0.4 ±0.25 ±0.15 % of FSR
Gain Error Drift With Internal REF ±15 ±10 ±7 ppm/°C PSRR (V
ANALOG OUTPUT
Voltage Output
Output Current ±5 ✻✻ mA Output Impeadance 0.1 ✻✻ Maximum Load Capacitance 200 ✻✻pF Short-Circuit Current ±15 ✻✻mA Short-Circuit Duration AGND Indefinite ✻✻
REFERENCE
Reference Output 9.96 10 10.04 9.975 10.025 ✻✻✻ V REF REF REF REF REF REFADJ Input Range
REFADJ Input Impedance 50 V
REF
V
REF
or VSS) At Full-Scale 50 200 ✻✻ ✻✻ppm/V
CC
(2)
Impedance 400 ✻✻
OUT
Voltage Drift ±15 ±10 ±7 ppm/°C
OUT
Voltage Adjustment
OUT
Input Range
IN
Input Current 10 ✻✻nA
IN
Output Current –2+2✻✻✻ ✻mA Impedance 1 ✻✻
to T
MIN
(DNL)
(1)
(4)
, VCC = +15V, VSS = –15V, VDD = +5V, Internal refience enabled, unless otherwise noted.
MAX
DAC7731E DAC7731EB DAC7731EC
TA = 25°C ±5 ±3 ±2LSB
±2 ✻✻ppm/°C
With External REF ±0.25 ±0.1 % of FSR
+11.4/–4.75 0 to 10 ✻✻V +11.4/–11.4 ±10 ✻✻V
+11.4/–6.4 ±5 ✻✻V
(3)
Absolute Max Value that
can be applied is V
±25 ✻✻ mV
4.75 V
010✻✻✻✻V
CC
±4 ±2 ±1LSB
±0.1 ✻✻% of FSR
– 1.4 ✻✻✻✻V
CC
✻✻k
2
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DAC7731
SBAS249
ELECTRICAL CHARACTERISTICS (Cont.)
All specifications at TA = T
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS DYNAMIC PERFORMANCE
Settling Time to ±0.003% 20V Output Step 3 5 ✻✻ ✻✻ µs
Digital Feedthrough 2 ✻✻nV-s Output Noise Voltage at 10kHz 100 ✻✻nV/Hz
DIGITAL INPUT
V
IH
V
IL
DIGITAL OUTPUT
V
OH
V
OL
POWER SUPPLY
V
DD
V
CC
V
SS
I
DD
I
CC
I
SS
Power
TEMPERATURE RANGE
Specified Performance 40 +85 ✻✻✻ ✻°C
Specifications same as grade to the left.
NOTES: (1)
With minimum VCC/VSS requirements, internal reference enabled. (2) Please refer to the "Theory of Operation" section for more information with respect to output voltage configurations. (3) See Figure 11 for gain and offset adjustment connection diagrams when using the internal reference. (4) The minimum value for REF of V
+14V and +4.75V, where +4.75V is the minimum voltage allowed. (5) Reference low-pass filter values: 100k, 1.0µF (see Figure 14).
SS
to T
MIN
, VCC = +15V, VSS = –15V, VDD = +5V, Internal reference enabled, unless otherwise noted.
MAX
R
= 5k, CL = 200pF,
L
with external REF
to REF
|IH| < 10µA0.7 • V |IL| < 10µA0.3 • V
OUT
(5)
filter
IN
DD
IOH = –0.8mA 3.6 ✻✻ V
IOL = 1.6mA 0.4 ✻✻V
+4.75 +5.0 +5.25 ✻✻✻✻✻✻ V +11.4 +15.75 ✻✻✻✻V
Bipolar Operation –15.75 –11.4 ✻✻✻✻V
Unipolar Opeation –15.75 –4.75 ✻✻✻✻V
Unloaded 4 6 ✻✻ ✻✻ mA
Unloaded –4 2.5 ✻✻ ✻✻ mA No Load, Ext. Reference No Load, Int. Reference 100 150
DAC7731E DAC7731EB DAC7731EC
✻✻ V
DD
✻✻V
100 ✻✻µA
85 ✻✻mW
✻✻ ✻✻mW
must be equal to the greater
IN
PIN CONFIGURATION
Top View SSOP
V
1
CC
REF
REFADJ
R
OFFSET
AGND
OUT
REF
V
REF
RFB2 RFB1
V
OUT
V
SJ
2 3
IN
4 5 6
DAC7731
7 8 9
10
11
12
DD
NOTE: (1) RST, LDAC, SDI, CS and SCK are Schmitt-triggered inputs.
24 23 22 21 20 19 18 17 16 15 14 13
V
SS
REFEN RSTSEL SCLK CS SDO SDI LDAC RST NC TEST DGND
PIN DESCRIPTIONS
PIN NAME DESCRIPTION
1V 2REF 3 REF 4 REFADJ Internal Reference Trim. (Acts as a gain adjustment
5V
6R
OFFSET
7 AGND Analog ground 8 RFB2 Feedback Resistor 2, used to configure DAC output
9 RFB1 Feedback Resistor 1, used to configure DAC output
10 SJ Summing Junction of the Output Amplifier 11 V 12 V 13 DGND Digital Ground 14 TEST Reserved, Connect to DGND 15 NC No Connection 16 RST V
17 LDAC DAC register load control, rising dege triggered. Data
18 SDI Serial Data Input. Data is latched into the input
19 SDO Serial Data Output, delayed 16 SCLK clock cycles. 20 CS Chip Select, Active LOW 21 SCLK Serial Clock Input 22 RSTSEL Reset Select; determines the action of RST. If HIGH,
23 REFEN Enables internal +10V reference (REF
24 V
Positive Analog Power Supply
CC
Internal Reference Output
OUT
Reference Input
IN
input when the internal reference is used.) Buffered Output from REFIN, can be used to drive
REF
external devices. Internally, this pin directly drives the DAC's circuitry. Offsetting Resistor
range.
range.
DAC Voltage Output
OUT
Digital Power Supply
DD
reset; active LOW, depending on the state of
OUT
RSTSEL, the DAC register is either reset to mid­scale or min-scale.
is loaded from the input register to the DAC register.
register on the rising edge of SCLK.
RST will reset the DAC register to mid-scale. If LOW, RST will reset the DAC register to min-scale.
LOW. Negative Analog Power Supply
SS
OUT
), active
DAC7731
SBAS249
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3
TIMING CHARACTERISTICS
VCC = +15V, V
PARAMETER DESCRIPTION MIN TYP MAX UNITS
t
WH
t
WL
t
SDI
t
HDI
t
SCS
t
HSC
t
DDO
t
HDO
t
DDOZ
t
WCSH
t
WLDL
t
WLDH
t
SLD
t
DLD
t
SCLK
t
SRS
t
HRS
t
WRL
t
INTERFACE TIMING
= –15V, VDD = 5V; RL = 2k to AGND; CL = 200pF to AGND; all specifications –40°C to +85°C, unless otherwise noted.
SS
DAC7731
SCLK HIGH Time 25 ns SCLK LOW Time 25 ns Setup Time: Data in valid before rising SCLK 5 ns Hold Time: Data in valid after rising SCLK 20 ns Setup Time: CS falling edge before first rising SCLK 15 ns Hold Time: CS rising edge after 16th rising SCLK 0 ns Delay Time: CS Falling Edge to Data Out valid, CL = 20pF on SDO 50 ns Hold Time: Data Out valid after SCLK rising edge, CL 20pF on SDO 50 ns Delay Time: CS rising edge to SDO = High Impedance 70 ns CS HIGH Time 50 ns LDAC LOW Time 20 ns LDAC HIGH Time 20 ns Setup Time: 16th Rising SCLK Before LDAC Rising Edge 15 ns Delay Time: LDAC rising edge to first SCLK rising edge of next 15 ns transfer cycle. Setup Time: CS High before falling SCLK edge following 16th 5 ns rising SCLK edge Setup Time: RSTSEL Valid Before RST LOW 0 ns Hold Time: RSTSEL valid after RST HIGH 20 ns RST LOW Time 30 ns
S
DAC V
Settling Time 5 µs
OUT
SCLK
SDO
LDAC
V
RESET TIMING
SDI
OUT
CS
t
SCS
t
WH
12 16
t
Word B
Word A
t
SRS
WL
t
t
HDI
HDO
t
SDI
B15 B14 B13 B0
t
DDO
A15 A14 A13 A0
RSTSEL
RST
+FS
(RSTSEL = LOW)
V
OUT
–FS +FS
(RSTSEL = HIGH)
V
OUT
–FS
t
HCS
t
t
HRS
WRL
t
DDOZ
t
WCSH
t
SCLK
C15 C14 C13 C12
Word C
B15 B14 B13 B12
t
t
WLDL
t
SLD
DLD
t
WLDH
±0.003% of FSR
Error Bands
t
S
t
S
Word B
Min-Scale
Mid-Scale
4
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DAC7731
SBAS249
TYPICAL CHARACTERISTICS
TA = +25°C (unless otherwise noted).
6 4 2 0
–2
INL (LSB)
Bipolar Configuration: V
–4
T
= 85°C, Internal Reference Enabled
A
–6
2.0
1.5
1.0
0.5
0.0
–0.5
DNL (LSB)
1.01.52.0
0000
H
6 4 2 0
–2
INL (LSB)
Bipolar Configuration: V
–4
T
= –40°C, Internal Reference Enabled
A
–6
2.0
1.5
1.0
0.5
0.0
–0.5
DNL (LSB)
1.01.52.0
0000
H
LINEARITY ERROR AND DIFFERENTIAL
LINEARITY ERROR vs DIGITAL INPUT CODE
= –10V to +10V
OUT
2000H4000H6000H8000
A000
H
C000HE000HFFFF
H
Digital Input Code
LINEARITY ERROR AND DIFFERENTIAL
LINEARITY ERROR vs DIGITAL INPUT CODE
= –10V to +10V
OUT
2000H4000H6000H8000
H
A000
C000HE000HFFFF
H
Digital Input Code
LINEARITY ERROR AND DIFFERENTIAL
6
LINEARITY ERROR vs DIGITAL INPUT CODE
4 2 0
–2
INL (LSB)
Bipolar Configuration: V
–4
T
= 25°C, Internal Reference
A
–6
2.0
1.5
1.0
0.5
0.0
–0.5
DNL (LSB)
1.01.52.0
H
2000H4000H6000H8000
0000
H
= –10V to +10V
OUT
Enabled
A000
H
C000HE000HFFFF
H
H
Digital Input Code
1.00
OFFSET ERROR vs TEMPERATURE
0.75 V
= –10 to +10V
0.50
0.25
V
OUT
= 0 to +10V
OUT
0.00
–0.25
Error (mV)
0.500.751.00
H
–40 –15 10 35 60 85
Temperature (°C)
0.000
0.0100.0200.0300.0400.050
Error (%)
–0.060
Ext. Ref, Unipolar Mode: V
Int. Ref, Unipolar Mode: V
GAIN ERROR vs TEMPERATURE
= 0 to +10V
OUT
Ext. Ref, Bipolar Mode: V
= 0 to +10V
OUT
0.0700.0800.0900.100
Load = 200pF, 2k
Int. Ref, Bipolar Mode: V
–40 –15 10 35 60 85
Temperature (°C)
DAC7731
SBAS249
= –10 to +10V
OUT
= –10 to +10V
OUT
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VCC SUPPLY CURRENT vs DIGITAL INPUT CODE
4.4
4.3
Bipolar Configuration: V Internal Reference Enabled, T
4.2
4.1
(mA)
4.0
CC
I
3.9
3.8
3.7
0000H2000H4000H6000H8000
A000
H
Digital Input Code
= –10V to +10V
OUT
= 25°C
A
C000HE000HFFFF
H
H
5
TYPICAL CHARACTERISTICS (Cont.)
TA = +25°C (unless otherwise noted).
VCC SUPPLY CURRENT vs DIGITAL INPUT CODE
3.4
3.3
Bipolar Configuration: V External Reference, REFEN = 5V, T
= –10V to +10V
OUT
3.2
3.1
(mA)
3.0
CC
I
2.9
2.8
2.7
0000H2000H4000H6000H8000
A000
H
C000HE000HFFFF
H
Digital Input Code
7 6 5
SUPPLY CURRENT vs TEMPERATURE
Load Current Excluded V
= +15V, VSS = –15V
CC
Bipolar V
Configuration: –10V to +10V
OUT
4 3
I
(mA)
SS
, I
CC
I
12
CC
2 1 0
I
SS
3
40 15 10 35 60 85
Temperature (°C)
= 25°C
A
–1.50
VSS SUPPLY CURRENT vs DIGITAL INPUT CODE
1.75
2.00
(mA)
SS
I
2.25
2.50
Bipolar Configuration: V T
= 25°C
–2.75
H
A
0000H2000H4000H6000H8000
= –10V to +10V
OUT
A000
H
C000HE000HFFFF
H
H
Digital Input Code
1800 1600 1400 1200
SUPPLY CURRENT vs LOGIC INPUT VOLTAGE
TA = 25°C, Transition Shown for a Single Input (Applies to CS, SCLK,D inputs)
and LDAC
IN
1000
(µA)
800
DD
I
600 400 200
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 V
(V)
LOGIC
HISTOGRAM OF VCC CURRENT CONSUMPTION
100
Bipolar Output Configuration
90
Internal Reference Enabled Code = 5555
80
H
70 60 50 40
Frequency
30 20 10
0
3.000 3.500 4.000 4.500 5.000 (mA)
I
CC
6
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100
HISTOGRAM OF VSS CURRENT CONSUMPTION
Bipolar Output Configuration
90
Internal Reference Enabled Code = 5555
80
H
70 60 50 40
Frequency
30 20 10
0
–3.50 –3.00 –2.50 –2.00 –1.50
I
(mA)
SS
DAC7731
SBAS249
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