BURR-BROWN DAC7621 User Manual

®
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12-Bit, Parallel Input
DIGITAL-TO-ANALOG CONVERTER
DAC7621
®
DAC7621
FEATURES
LOW POWER: 2.5mW
FAST SETTLING: 7µs to 1 LSB
1mV LSB WITH 4.095V FULL-SCALE
RANGE
COMPLETE WITH REFERENCE
12-BIT LINEARITY AND MONOTONICITY
OVER INDUSTRIAL TEMP RANGE
ASYNCHRONOUS RESET TO 0V
APPLICATIONS
PROCESS CONTROL
DATA ACQUISITION SYSTEMS
CLOSED-LOOP SERVO-CONTROL
PC PERIPHERALS
PORTABLE INSTRUMENTATION
DESCRIPTION
The DAC7621 is a 12-bit digital-to-analog converter (DAC) with guaranteed 12-bit monotonicity perfor­mance over the industrial temperature range. It re­quires a single +5V supply and contains an input register, latch, 2.435V reference, DAC, and high speed rail-to-rail output amplifier. For a full-scale step, the output will settle to 1 LSB within 7µs. The device consumes 2.5mW (0.5mA at 5V).
The parallel interface is compatible with a wide variety of microcontrollers. The DAC7621 accepts a 12-bit parallel word, has a double-buffered input logic struc­ture and provides data readback. In addition, two control pins provide a chip select (CS) function and asynchronous clear (CLR) input. The CLR input can be used to ensure that the DAC7621 output is 0V on power-up or as required by the application.
The DAC7621 is available in a 20-lead SSOP package and is fully specified over the industrial temperature range of –40°C to +85°C.
V
DD
SBAS107
Ref
CLR
LOADDAC
CS
R/W
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1998 Burr-Brown Corporation PDS-1502B Printed in U.S.A. March, 1999
12-Bit DAC
12
DAC Register
12
Input Register
12
I/O Buffer
DGND
DAC7621
V
OUT
SPECIFICATIONS
ELECTRICAL
At TA = –40°C to +85°C, and VDD = +5V, unless otherwise noted.
DAC7621E DAC7621EB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS RESOLUTION 12 Bits
ACCURACY
Relative Accuracy Differential Nonlinearity Guaranteed Monotonic –1 ±1/2 +1 –1 ±1/4 +1 LSB Zero-Scale Error Code 000 Full Scale Voltage Code FFF
ANALOG OUTPUT
Output Current Code 800 Load Regulation R Capacitive Load No Oscillation 500 pF Short-Circuit Current ±20 mA Short-Circuit Duration GND or V
DIGITAL INPUT
Data Format Parallel Data Coding Straight Binary Logic Family CMOS Logic Levels
V
IH
V
IL
I
IH
I
IL
DYNAMIC PERFORMANCE
Settling Time DAC Glitch 5 nV-s Digital Feedthrough 2 nV-s
POWER SUPPLY
V
DD
I
DD
Power Dissipation V Power Supply Sensitivity ∆V
TEMPERATURE RANGE
Specified Performance –40 +85 ✻✻°C
(1)
H H
402, Code 800
LOAD
H
H
DD
–2 ±1/2 +2 –1 ±1/4 +1 LSB
–1 +1 +3 ✻✻✻ LSB
4.079 4.095 4.111 4.087 4.095 4.103 V
±5 ±7 ✻✻ mA
13 ✻✻ LSB
Indefinite
0.7 • V
DD
0.3 • V
±10 µA
V
DD
V
±10 µA
(2)
(tS) To ±1 LSB of Final Value 7 µs
+4.75 +5.0 +5.25 ✻✻✻ V
VIH = 5V, VIL = 0V, No Load, at Code 000
= 5V, VIL = 0V, No Load 2.5 5 ✻✻ mW
IH
= ±5% 0.001 0.004 ✻✻%/%
DD
H
0.5 1 ✻✻ mA
Same specification as for DAC7621E. NOTES: (1) This term is sometimes referred to as Linearity Error or Integral Nonlinearity (INL). (2) Specification does not apply to negative-going transitions where
the final output voltage will be within 3 LSBs of ground. In this region, settling time may be double the value indicated.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
DAC7621
2
PIN CONFIGURATION
PIN DESCRIPTIONS
Top View SSOP
CLR
V
V
OUT
AGND DGND
DB11 (MSB)
DB10
DB9 DB8 DB7
1 2
DD
3 4 5
DAC7621E
6 7 8 9
10
20 19 18 17 16 15 14 13 12 11
LOADDAC CS R/W DB0 (LSB) DB1 DB2 DB3 DB4 DB5 DB6
PIN LABEL DESCRIPTION
1 CLR Reset. Resets the DAC register to zero. Active
2V 3V 4 AGND Analog Ground 5 DGND Digital Ground 6 DB11 Data Bit 11, MSB 7 DB10 Data Bit 10 8 DB9 Data Bit 9 9 DB8 Data Bit 8 10 DB7 Data Bit 7 11 DB6 Data Bit 6 12 DB5 Data Bit 5 13 DB4 Data Bit 4 14 DB3 Data Bit 3 15 DB2 Data Bit 2 16 DB1 Data Bit 1 17 DB0 Data Bit 0, LSB 18 R/W Read and Write Control 19 CS Chip Select. Active LOW. 20 LOADDAC Loads the internal DAC register. The DAC register
LOW. Asynchronous input. Postive Power Supply
DD
DAC Output Voltage
OUT
is a transparent latch and is transparent when LOADDAC is LOW (regardless of the state of CS or CLK).
ABSOLUTE MAXIMUM RATINGS
VDD to GND .......................................................................... –0.3V to 6V
Digital Inputs to GND .............................................. –0.3V to V
to GND ........................................................... –0.3V to VDD + 0.3V
V
OUT
Power Dissipation ........................................................................ 325mW
Thermal Resistance,
Maximum Junction Temperature.................................................. +150°C
Operating Temperature Range ...................................... –40°C to +85°C
Storage Temperature Range ....................................... –65°C to +150°C
Lead Temperature (soldering, 10s) .............................................. +300°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
θ
........................................................... 150°C/W
JA
(1)
+ 0.3V
DD
ELECTROSTA TIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
MINIMUM
RELATIVE DIFFERENTIAL SPECIFICATION PACKAGE
PRODUCT (LSB) (LSB) RANGE PACKAGE NUMBER
ACCURACY NONLINEARITY TEMPERATURE DRAWING ORDERING TRANSPORT
DAC7621E ±2 ±1 –40°C to +85°C 20-Lead SSOP 334 DAC7621E Rails
"" " " ""DAC7621E/1K Tape and Reel
DAC7621EB ±1 ±1 –40°C to +85°C 20-Lead SSOP 334 DAC7621EB Rails
"" " " ""DAC7621EB/1K Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “DAC7621E/1K” will get a single 1000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
(1)
NUMBER
(2)
MEDIA
3 DAC7621
®
TIMING DIAGRAMS
CS
t
RDS
R/W
Data Out
t
RCS
Data Valid
t
CSD
t
t
RDH
DZ
CS
R/W
LOADDAC
Data In
t
WCS
t
WS
t
DS
t
WH
t
LWD
t
DH
Data Output Timing
TIMING SPECIFICATIONS
TA = –40°C to +85°C
SYMBOL
t
RCS
t
RDS
t
RDH
t
DZ
t
CSD
t
WCS
t
WS
t
WH
t
DS
t
DH
t
LWD
DESCRIPTION MIN TYP MAX UNITS
CS LOW for Read 200 ns
R/W HIGH to CS LOW 10 ns
R/W HIGH after CS HIGH 0 ns
CS HIGH to Data Bus 100 ns
in High Impedance
CS LOW to Data Bus Valid 100 160 ns
CS LOW for Write 50
R/W LOW to CS LOW 0 ns
R/W LOW after CS HIGH 5 ns
Data Valid to CS LOW 0 ns
Data Valid after CS HIGH 5 ns
LOADDAC LOW 50 ns
Digital Input Timing
LOGIC TRUTH TABLE
INPUT DAC
R/W CS LOADDAC REGISTER REGISTER MODE
L L L Write Write Write
L L H Write Hold Write Input H L H Read Hold Read Input X H L Hold Update Update X H H Hold Hold Hold
X = Don’t Care.
®
DAC7621
4
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