BURR-BROWN DAC701 User Manual

®

DAC701

DAC701

DAC703

Monolithic 16-Bit

DIGITAL-TO-ANALOG CONVERTERS

FEATURES

● V

● HIGH ACCURACY:

DESCRIPTION

The DAC70X family comprise of complete 16-bit
digital-to-analog converters that includes a precision
buried-zener voltage reference and a low-noise, fast­settling output operational amplifier (voltage output
models), all on one small monolithic chip. A combina­tion of current-switch design techniques accomplishes
not only 15-bit monotonicity over the entire specified
temperature range, but also a maximum end-point
linearity error of ±0.0015% of full-scale range. Total
full-scale gain drift is limited to ±10ppm/°C maximum
(LH and CH grades).

AND I

OUT

Linearity Error

MODELS

OUT

±0.0015% of FSR max

Differential Linearity Error
max

±0.003% of FSR

DAC702

DAC702
DAC703

● MONOTONIC (at 15 bits) OVER FULL

SPECIFICATION TEMPERATURE RANGE

● PIN-COMPATIBLE WITH DAC70, DAC71,

DAC72

● DUAL-IN-LINE PLASTIC AND HERMETIC

CERAMIC AND SOIC

Digital inputs are complementary binary coded and
are TTL-, LSTTL-, 54/74C- and 54/74HC-compatible
over the entire temperature range. Outputs of 0 to
+10V, ±10V, 0 to –2mA, and ±1mA are available.

These D/A converters are packaged in hermetic 24-pin
ceramic side-brazed or molded plastic. The DIP-pack­aged parts are pin-compatible with the voltage and
current output DAC71 and DAC72 model families.
The DAC702 is also pin-compatible with the DAC70
model family. In addition, the DAC703 is offered in a
24-pin SOIC package for surface mount applications.

SBAS143

16-Bit

Ladder

Digital
Inputs

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone] • Twx: 910-952-1111

Internet: http://www.burr-brown.com/ • FAXLine: [phone] (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

© 1983 Burr-Brown Corporation PDS-494M Printed in U.S.A. March, 1998

Resistor
Network

And

Current

Switches

Reference

Circuit

Voltage Models
Only

1

Gain Adjust
+V

CC

–V

CC

V

DD

Reference Output

Common

Summing Junction
Output

®

DAC701, 702, 703

SPECIFICATIONS

At +25°C and rated power supplies, unless otherwise noted.

DAC702/703J DAC701/702/703K DAC701/702/703B, S DAC701/702/703L, C
PARAMETER MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
INPUT
DIGITAL INPUT

Resolution 16 ✻✻✻Bits
Digital Inputs

V

IH

V

IL

I

IH

I

IL

TRANSFER CHARACTERISTICS
ACCURACY

Linearity Error
Differential Linearity

Error

Differential Linearity

Error at Bipolar Zero

(DAC702/703)
Gain Error
Zero Error
Monotonicity Over Spec.

Temp Range 13 14 ✻ 15 Bits
DRIFT (over specification

temperature range)
Total Error Over

Temperature Range

(all models)
Total Full Scale Drift:

DAC701 ±10 ✻ ±30 ±8.5 ±18 ±6 ±13 ppm of FSR/°C

DAC702/703 ±10 ✻ ±25 ±7 ±15 ✻✻ppm of FSR/°C
Gain Drift (all models) ±10 ±30 ✻ ±25 ±7 ±15 ±5 ±10 ppm/°C
Zero Drift:

DAC701 ±2.5 ±5 ±1.5 ±3 ✻✻ppm of FSR/°C

DAC702/703 ±5 ±15 ✻ ±12 ±4 ±10 ±2.5 ±5 ppm of FSR/°C
Differential Linearity

Over Temp.

Linearity Error
Over Temp.

SETTLING TIME (to

±0.003% of FSR)
DAC701/703 (V

Full Scale Step, 2kΩ Load 4 ✻ 8 ✻✻ ✻✻ µs

1LSB Step at

Worst-Case Code
Slew Rate 10 ✻✻✻V/µs
DAC702 (I
Full Scale Step (2mA),

10 to 100Ω Load 350 ✻ 1000 ✻✻ ✻✻ ns

1kΩ Load 1 ✻ 3 ✻✻ ✻✻ µs

OUTPUT
VOLTAGE OUTPUT

MODELS

DAC701 (CSB Code) 0 to +10 ✻ V
DAC703 (COB Code) ±10 ✻✻✻V

Output Current ±5 ✻✻✻ mA

Output Impedance 0.15 ✻✻✻Ω

Short Circuit to

CURRENT OUTPUT

MODELS

DAC702 (COB Code)

Output Impedance
Compliance Voltage ±2.5 ✻✻✻V

(1)

+2.4 +V
–1.0 +0.8 ✻✻✻✻✻✻V

✻✻✻✻✻✻V

CC

, VI = +2.7V +40 ✻✻✻µA

, VI = +0.4V –0.35 –0.5 ✻ ✻ ✻✻ ✻✻ mA

(2)

(4)

(4)

(4)
(5)
(5, 6)

(7)

(4)

±0.0015 ±0.006 ✻ ±0.003 ✻✻ ±0.00075 ±0.0015 % of FSR

±0.003 ±0.012 ✻ ±0.006 ✻✻ ±0.0015 ±0.003 % of FSR

±0.003 ±0.006 ±0.0015 ±0.003 ✻✻% of FSR
±0.07 ±0.30 ✻ ±0.15 ±0.05 ±0.10 ✻✻ %
±0.05 ±0.10 ✻ ✻ ✻✻ ✻✻% of FSR

±0.08 ✻ ±0.15 ±0.05 ±0.10 ✻✻% of FSR

±0.012 +0.009, ✻ +0.006, % of FSR

(3)

–0.006 –0.003

(4)

OUT

(8)

Models)

OUT

Models)

(9)

±0.012 ±0.006 ✻ ±0.003 % of FSR

2.5 ✻✻✻µs

Common Duration Indefinite ✻✻✻

(10)

(10)

±1 ✻✻✻mA

2.45 ✻✻✻kΩ

®

DAC701, 702, 703

2

SPECIFICATIONS (CONT)

At +25°C and rated power supplies, unless otherwise noted.

DAC702/703J DAC701/702/703K DAC701/702/703B, S DAC701/702/703L, C

PARAMETER MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
REFERENCE VOLTAGE

Voltage +6.3 +6.0 +6.3 +6.6 +6.24 +6.3 +6.36 ✻✻✻ V
Source Current Available

for External Loads +2.5 +1.5 ✻✻✻✻✻ mA
Temperature Coefficient ±10 ✻ ±25 ✻ ±15 ✻✻ ppm/°C
Short Circuit to Common

Duration Indefinite ✻✻✻

POWER SUPPLY REQUIREMENTS

Voltage: +V

Current (No Load):

CC

–V

CC

V

DD

DAC702

(I

Models)

OUT

+V

CC

–V

CC

V

DD

DAC701/703

(V

Models)

OUT

+V

CC

–V

CC

V

DD

Power Dissipation:

(V

DD

DAC702 365 ✻ 790 ✻ 630 ✻✻ mW

= +5.0V)

(11)

DAC701/703 530 ✻ 940 ✻ 780 ✻✻ mW

Power Supply Rejection:

+V

CC

–V

CC

V

DD

TEMPERATURE RANGE

Specification:

B, C Grades –25 +85 ✻✻°C

S Grades –55 +125 °C

J, K, L Grades 0 +70 ✻✻ 0 +70 °C
Storage: Ceramic –60 +150 ✻✻✻✻°C

Plastic, SOIC –60 +100 ✻✻ °C

✻ Specification same as model to the left.
NOTES: (1) Digital inputs are TTL, LSTTL, 54/74C, 54/74HC, and 54/74HTC compatible over the operating voltage range of V

temperature range. The input switching threshold remains at the TTL threshold of 1.4V over the supply range of V
0V to +0.8V and +2.4V to +10V respectively, the change in the D/A converter output voltage will not exceed ±0.0015% of FSR for the LH and CH grades, ±0.003% of FSR for
the BH grade and ±0.006% of FSR for the KG grade. (2) DAC702 (current-output models) is specified and tested with an external output operational amplifier connected using
the internal feedback resistor in all parameters except settling time. (3) FSR means full-scale range and is 20V for the ±10V range (DAC703), 10V for the 0 to +10V range
(DAC701). FSR is 2mA for the ±1mA range (DAC702). (4) ±0.0015% of full-scale range is equivalent to 1LSB in 15-bit resolution. ±0.003% of full-scale range is equivalent to
1LSB in 14-bit resolution. ±0.006% of full-scale range is equivalent to 1LSB in 13-bit resolution. (5) Adjustable to zero with external trim potentiometer. Adjusting the gain
potentiometer rotates the transfer function around the zero point. (6) Error at input code FFFF
adjusted to zero at +25°C. (8) Maximum represents the 3σ limit. Not 100% tested for this parameter. (9) At the major carry, 7FFF
on output impedance and output current is ±30%. (11) Power dissipation is an additional 40mW when V

13.5 15 16.5 ✻✻✻✻✻✻✻✻✻ V

13.5 15 16.5 ✻✻✻✻✻✻✻✻✻ V
+4.5 +5 +16.5 ✻✻✻✻✻✻✻✻✻ V

+10 +25 ✻✻ ✻✻ ✻✻ mA
–13 –25 ✻✻ ✻✻ ✻✻ mA

+4 +8 ✻✻ ✻✻ ✻✻ mA

+16 +30 ✻✻ ✻✻ ✻✻ mA
–18 –30 ✻✻ ✻✻ ✻✻ mA

+4 +8 ✻✻ ✻✻ ✻✻ mA

±0.0015 ±0.006 ✻✻ ✻±0.003 ✻✻% of FSR/%V
±0.0015 ±0.006 ✻✻ ✻±0.003 ✻✻% of FSR/%V
±0.0001 ±0.001 ✻✻ ✻✻ ✻✻% of FSR/%V

= +5V to +15V and over the specified

= +5V to +15V. As logic “0” and logic “1” inputs vary over

DD

for DAC701, 7FFFH for DAC702 and DAC703. (7) With gain and zero errors

H

is operated at +15V.

DD

DD

to 8000H and 8000H to 7FFFH. (10) Tolerance

H

CC
CC
DD

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no
responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice.
No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN
product for use in life support devices and/or systems.

3

DAC701, 702, 703

®

CONNECTION DIAGRAMS

Digital
Inputs

MSB

1
2
3
4
5

16-Bit

Ladder

6

Resistor
Network

7
8

9
10
11
12

and

Current

Switches

Reference

Circuit

Voltage Models

Only

PIN ASSIGNMENTS

ALL PACKAGES

PIN # DAC702 DAC701/703

1 Bit 1 (MSB) Bit 1 (MSB)
2 Bit 2 Bit 2
3 Bit 3 Bit 3
4 Bit 4 Bit 4
5 Bit 5 Bit 5
6 Bit 6 Bit 6
7 Bit 7 Bit 7
8 Bit 8 Bit 8

9 Bit 9 Bit 9
10 Bit 10 Bit 10
11 Bit 11 Bit 11
12 Bit 12 Bit 12
13 Bit 13 Bit 13
14 Bit 14 Bit 14
15 Bit 15 Bit 15
16 Bit 16 (LSB) Bit 16 (LSB)
17 R
18 V
19 –V
20 Common Common
21 I
22 Gain Adjust Gain Adjust
23 +V
24 +6.3V Reference Output +6.3V Reference Output

FEEDBACK

DD

CC

OUT

CC

Summing Junction (Zero Adjust)

V

–V

+V

OUT

V

DD

CC

CC

24
23
22

0.0022µF

21

LSB

20
19
18
17
16
15

Digital
Inputs

14
13

(4)

R

F

ABSOLUTE MAXIMUM RATINGS

+VCC to Common ........................................................................ 0V, +18V

–V

CC

V

DD

Digital Data Inputs to Common ................................................ –1V, +18V

Reference Out to Common ...........................Indefinite Short to Common

External Voltage Applied to R

External Voltage Applied to D/A Output (DAC701/703).......... –5V to +5V

V

OUT

Power Dissipation .................................................................................1W

Storage Temperature ...................................................... –60°C to +150°C

Lead Temperature (soldering, 10s) ................................................. 300°C

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.

(2)

+V

–V

V

CC

CC

(1)

DD

270kΩ

3.9MΩ

(2)

(2)

NOTES: (1) Can be tied to +VCC instead of having
separate V

0.1µF to 1.0µF. (3) Potentiometers are 10kΩ to
100kΩ. (4) 5kΩ (DAC701), 10kΩ (DAC702/703).

(3)

(3)

supply. (2) Decoupling capacitors are

DD

(1)

to Common ........................................................................ 0V, –18V

to Common .......................................................................... 0V, +18V

(DAC702) ......................................... ±18V

F

(DAC701/703) .......................................Indefinite Short to Common

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.

®

DAC701, 702, 703

4