BOE HV320WX2-201 Specification

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TITLE:

HV320WX2-201 Product Specification

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PROPRIETARY NOTE

BEIJING BOE DISPLAY TECHNOLOGY

SPEC. NUMBER

S63-8001

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PRODUCT GROUP

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REV.

ISSUE DATE

2011.11. 07

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REV ISSUE DATE

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REVISION HISTORY

REV. ECN NO. DESCRIPTION OF CHANGES DATE PREPARED

O - Initial Release 2011.11.07 S. M. Lee

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Contents

No ITEM Page

REVISIONS HISTORY 2

CONTENTS

1 GENERAL DESCRIPTION

1.1 Introduction

1.2 Features

1.3 Applications

1.4 General Specification

2 ABSOLUTE MAXIMUM RATINGS 6

3 ELECTRICAL SPECIFICATIONS 7

3.1 TFT LCD Open Cell

4 INTERFACE CONNECTION 8

4.1 Open Cell Input Signal & Power

4.2 LVDS Interface

5 SIGNAL TIMING SPECIFICATIONS

5.1 Timing Parameters

5.2 Signal Timing Waveform

5.3 Input Signals, Basic Display Colors & Cray Scale Of Colors

5.4 Power Sequence

6 OPTICAL SPECIFICATIONS 14

7 MECHANICAL CHARACTERISTICS 16

8 RELIABILITY TEST CONDITION 17

9 PRODUCT SERIAL NUMBER 18

10 PACKING INFORMATION

11 HANDING & CAUTIONS 21

12 APPENDIX

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1.0 GENERAL DESCRIPTION

1.1 Introduction

HV320WX2-201 is a color active matrix TFT LCD open cell using amorphous silicon TFT's (Thin Film Transistors) as an active switching devices. This open cell has a 31.51 inch diagonally measured active area with WXGA resolutions (1366 horizontal by 768 vertical pixel array). Each pixel is divided into RED, GREEN, BLUE dots which are arranged in

vertical stripe and this open cell can display 16.7M colors. The TFT-LCD panel used for

this open cell is adapted for a low reflection and higher color type.

RGB(Mini-LVDS)

VDD

+12.0V

LVDS

5pairs

LVDS_SEL

# 9

BIST_

# 27

CN1

(30pin)

Timing Controller

[LVDS Rx & Mini-LVDS

Tx integrated]

Gate Driver Circuit

S1 S1366

Source Driver Circuit

TFT - LCD Panel

(1366 Ý RGB Ý 768 pixels)

Power Circuit

Block

G768

1.2 Features

z LVDS interface with 1 pixel / clock z High-speed response z Low color shift image quality z 8-bit color depth, display 16.7M colors z High luminance and contrast ratio, low reflection and wide viewing angle z DE (Data Enable) only mode z AFFS technology is applied for high display quality z RoHS compliant

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1.3 Application

z Home Alone Multimedia TFT-LCD TV z Display Terminals for Control System z High Definition TV(HD TV) z AV application Products

1.4 General Specification

< Table 1. General Specifications >

REV ISSUE DATE

O 2011.11.07

Parameter Specification Unit Remark

Active area

Number of pixels

Pixel pitch

Pixel arrangement Pixels RGB Vertical stripe

Display colors 16.7M(8bits-true) colors

Display mode Transmission mode, Normally Black

Open Cell

Transmittance

Weight 1180 (typ.) gram

Power Consumption 4.0 (typ.) Watt

Surface Treatment

697.685(H) Ý 392.256(V)

1366(H) ശ768(V)

170.25(H) ശRGBശ510.75(V) ໃ

5.9 (typ.) %

Haze 10%, 3H, Semi-glare or Anti-

glare treatment (Front Polarizer)

Clear (Bottom Polarizer)

pixels

At center point with BOE BLU

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2.0 ABSOLUTE MAXIMUM RATINGS

The followings are maximum values which, if exceed, may cause faulty operation or damage to the unit. The operational and non-operational maximum voltage and current

values are listed in Table 2.

< Table 2. Open Cell Electrical Specifications >

Parameter Symbol Min. Max. Unit Remark

Power Supply Voltage VDD VSS-0.3 13.2 V

0+50

0+60

Operating Temperature

SUR

[VSS=GND=0V]

Ta = 25 ć

Storage Temperature T

Operating Ambient Humidity

Hop 10 80 %RH

-20 +60

Storage Humidity Hst 10 80 %RH

Note 1 : Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39 ć max. and no condensation of water.

ړڋڀ

ڑڋ

ڑڋڀ

ڲۀۏٻڝېۇڽ گۀۈۋۀۍڼۏېۍۀٻڶڞڸ

ڌڋ

ڍڋ

ڐڋ

ڏڋ

ڏڋڀ

ڎڋ

ڣېۈۄڿۄۏ۔ٻڶڃڀڄڭڣڸ

ڌڋڀ

ڮۏۊۍڼۂۀ

ڪۋۀۍڼۏۄۊۉ

Note 1

ڌڋ ڍڋ ڎڋ ڏڋ ڐڋ ڑڋ ڒڋ ړڋڋڈڍڋ

ڟۍ۔ٻڝېۇڽٻگۀۈۋۀۍڼۏېۍۀٻڶ

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3.0 ELECTRICAL SPECIFICATIONS

3.1 TFT LCD Open Cell

< Table 3. Open Cell Electrical Specifications >

Values

Parameter Symbol

Min Typ Max

Power Supply Input Voltage VDD 10.8 12 13.2 Vdc Power Supply Ripple Voltage VRP 300 mV

Power Supply Current IDD - 333 592 mA Power Consumption PDD 4.0 7.1 Watt Rush current IRUSH - - 3.0 A Note 2

Differential Input High

VLVTH +100 +300 mV

Threshold Voltage

LVDS

Interface

Differential Input Low

Threshold Voltage

VLVTL -300 -100 mV

[Ta =25ധ2 ć]

Unit Remark

Note 1

Common Input Voltage VLVC 1.0 1.2 1.4 V

Input High Threshold

VIH 2.7 - 3.3 V

CMOS Interface

Voltage Input Low Threshold

VIL 0 - 0.6 V

Voltage

Note 1 : The supply voltage is measured and specified at the interface connector of LCM.

The current draw and power consumption specified is for VDD=12.0V, Frame rate f Test Pattern of power supply current

a) Typ : Mosaic 8 x 6 Pattern(L0/L255) b) Max : Skip 1H2V Sub Dot

Pattern(L0/L255)

=60Hz and Clock frequency = 75.4MHz.

Note 2 : The duration of rush current is about 2ms and rising time of Power Input is 1ms(min)

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4.0 INTERFACE CONNECTION

4.1 Module Input Signal & Power

- Connector : IS100-L30B-C23(Manufactured by UJU) or Equivalent. < Table 4. Open Cell Input Connector Pin Configuration >

1 VDD Power Supply +12.0V 16 RX1+ LVDS Receiver Signal(+) 2 VDD Power Supply +12.0V 17 GND Ground 3 VDD Power Supply +12.0V 18 RX2- LVDS Receiver Signal(-) 4 VDD Power Supply +12.0V 19 RX2+ LVDS Receiver Signal(+) 5 GND Ground 20 GND Ground 6 GND Ground 21 RCLK- LVDS Receiver Clock Signal(-)

Symbol Description

7 GND Ground 22 RCLK+ LVDS Receiver Clock Signal(+) 8 GND Ground 23 GND Ground

9LVDS_SEL‘L’=JEIDA , ‘H’or NC= VESA 24 RX3- LVDS Receiver Signal(-) 10 NC No Connection 25 RX3+ LVDS Receiver Signal(+) 11 GND Ground 26 GND Ground

12 RX0- LVDS Receiver Signal(-) 27 BIST

13 RX0+ LVDS Receiver Signal(+) 28 NC No Connection 14 GND Ground 29 NC No Connection 15 RX1- LVDS Receiver Signal(-) 30 GND Ground

Notes : 1. NC(Not Connected) : This pins are only used for BOE internal operations.

2. Input Level of LVDS signal is based on the IEA 664 Standard.

3. LVDS_SEL : This pin is used for selecting LVDS signal data format. If this Pin : High (3.3V) or Open (NC) Æ Normal NS LVDS format Otherwise : Low (GND) Æ JEIDA LVDS format

4. BIST : This pin is used for selecting display pattern mode when input DE or input CLOCK quits toggling.

If this Pin : Low (GND) or Open (NC) Æ Free run mode(Black Pattern) Otherwise : High( 3.3V) Æ BIST mode(BIST Pattern)

Sequence : On = VDD ≥LVDS Option , BIST Option ≥Interface signal

Off = Interface signal ≥ LVDS Option , BIST Option ≥ VDD

Rear view of LCM

BIST Pattern

‘L’ or NC=Free run mode ,

‘H’= BIST mode

IS100-L30B-C23 (UJU)

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4.2 LVDS Interface

- LVDS Receiver : Timing Controller (LVDS Rx merged) / LVDS Data : Pixel Data < Table 5. Open Cell Input Connector Pin Configuration >

LVDS Pin Vesa Data format JEIDA Data format Remark

TxIN/RxOUT0 Red0 [LSB] R2

TxIN/RxOUT1 Red1 R3

TxIN/RxOUT2 Red2 R4

TxOUT/RxIN0

TxIN/RxOUT3 Red3 R5

TxIN/RxOUT4 Red4 R6

TxIN/RxOUT6 Red5 R7 [MSB]

TxIN/RxOUT7 Green0 [LSB] G2

TxIN/RxOUT8 Green1 G3

TxOUT/RxIN1

TxOUT/RxIN2

TxIN/RxOUT9 Green2 G4

TxIN/RxOUT12 Green3 G5

TxIN/RxOUT13 Green4 G6

TxIN/RxOUT14 Green5 G7 [MSB]

TxIN/RxOUT15 Blue0 [LSB] B2

TxIN/RxOUT18 Blue1 B3

TxIN/RxOUT19 Blue2 B4

TxIN/RxOUT20 Blue3 B5

TxIN/RxOUT21 Blue4 B6

TxIN/RxOUT22 Blue5 B7 [MSB]

TxIN/RxOUT24 HSYNC HSYNC

TxIN/RxOUT25 VSYNC VSYNC

TxIN/RxOUT26 DEN DEN

TxIN/RxOUT27 Red6 R0 [LSB]

TxIN/RxOUT5 Red7 [MSB] R1

TxIN/RxOUT10 Green6 G0 [LSB]

TxOUT/RxIN3

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TxIN/RxOUT11 Green7 [MSB] G1

TxIN/RxOUT16 Blue6 B0 [LSB]

TxIN/RxOUT17 Blue7 [MSB] B1

TxIN/RxOUT23 Reserved Reserved

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5.0 SIGNAL TIMING SPECIFICATION

5.1 Timing Parameters (DE only mode)

< Table 6. Timing Table >

ITEM Symbol Min Typ Max Unit Note

Period t

CLK

Frequency - 56 75.4 85.0 MHz

Period t

Hsync

Frequency f

CLK

REV ISSUE DATE

O 2011.11.07

11.8 13.3 17.9 ns

1450 1560 2000 t

CLK

39.4 48.4 55 KHz

Period t

778 806 1200 t

Vsync

Horizontal

Frequency f

Valid t

47 60 65 Hz

- 1366 - t

CLK

Active

Display Term

Vertical Active

Display Term

Notes: This product is DE only mode. The input of Hsync & Vsync signal does not have an effect on normal operation.

Tot al t

Valid t

Tot al t

1450 1560 2000 t

- 768 - t

778 806 1200 t

CLK

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5.2 Signal Timing Waveform

tCLK

DCLK

First data

Second data

0.5 VDD

Invalid data

TFT LCD

Valid data

Pixel data

Valid data

Pixel data

REV ISSUE DATE

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Invalid data

DE(Data Enable)

HSync

DE(Data Enable)

VSync

tHP

tHV

tVP

tVV

DE(Data Enable)

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5.3 Input Signals, Basic Display Colors and Gray Scale of Colors

< Table 7. Input Signal and Display Color Table >

Input Data Signal

Color & Gray Scale

0B60B50B40B30B20B10

000Black

Basic

Colors

Gray Scale of Red

Gray Scale of Green

Gray Scale of Blue

Gray Scale of White

୞

୞ ୠ

ୠ

୞

୞ ୠ

ୠ

୞

୞ ୠ

ୠ

୞

୞ ୠ

ୠ

11111

R1 B7G7R7

000000Darker

0R20

0G50G40G30G20G10

Blue DataGreen DataRed Data

000000000000000000000000Black 111111110000000000000000Blue 000000001111111100000000Green

111111111111111100000000Cyan

000000000000000011111111Red 111111110000000011111111Magenta 000000001111111111111111Yellow 111111111111111111111111White 000000000000000000000000Black 000000000000000010000000 000000000000000001

↑↑↑ ↓↓↓

000000000000000010111111Brighter 000000000000000001111111 000000000000000011111111Red

000000000000000000000000Black

000000001000000000000000 000000000100000000

↑↑↑ ↓↓↓

000000001011111100000000Brighter 000000000111111100000000 000000001111111100000000Green 000000000000000000000000Black 100000000000000000000000 010000000000000000

↑↑↑ ↓↓↓

101111110000000000000000Brighter 011111110000000000000000 111111110000000000000000Blue

100000001000000010000000 010000000100000001000000Darker

↑↑↑ ↓↓↓

101111111011111110111111Brighter

011111101111111011

111111111111111111111White

111

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5.4 Power Sequence

To prevent a latch-up or DC operation of the Open Cell, the power on/off sequence shall

be as shown in below

< Table 8. Sequence Table >

Parameter

T1 0.5 - 20 ms T2 0 - 50 ms T3 200 - - ms

T4 200 - - ms

T5 0 - 50 ms T6 1 - - s

Notes: 1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.

2. Back Light must be turn on after power for logic and interface signal are valid.

Min Typ Max

Values

Units

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6.0 OPTICAL SPECIFICATIONS

The test of optical specifications shall be measured in a dark room (ambient luminanced1 lux

and temperature=25r2ć) with the equipment of Luminance meter system (Goniometer system and PR730) and test unit shall be located at an approximate distance 50cm from the

LCD surface at a viewing angle of θ and Φ equal to 0q. We refer to θ o’clock direction (the “right”), θ ) as the 9 o’clock direction (“left”) and θ

(= θ12) as the 12 o’clock direction (“upward”), θ

Ø=90

(= θ6) as the 6 o’clock direction (“bottom”). While

Ø=270

scanning θ and/or Ø, the center of the measuring spot on the Display surface shall stay

fixed. The measurement shall be executed after 30 minutes warm-up period. VDD shall be

12.0V +/-10% at 25qC. Optimum viewing angle direction is 6 ’clock.

< Table 9. Optical Table >

[VDD = 12.0V, Frame rate = 60Hz, Ta =25·2 ć]

(=θ3) as the 3

Ø=0

Ø=180

(= θ

Parameter Symbol Condition Min Typ Max Unit Remark

Viewing

Angle

Contrast ratio CR

Reproduction

of color

Horizontal

Vertical

White

Red

Green

Blue

CR > 10

89 Deg.

Note 1

89 Deg.

900:1 1200:1 - Note 2

Θ = 0q

(Center)

Normal

Viewing

Angle

TYP.

- 0.03

With BOE

Module

0.280

0.290

0.630

0.340

0.300

0.630

0.148

0.068

TYP.

Note 3

+ 0.03

Response Time G to G T

- 8 10 ms Note 4

Gamma Scale 2.0 2.2 2.4

Cell Transmittance 5.9 % Note 5

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Note :

1. Viewing angle is the angle at which the contrast ratio is greater than 10. The viewing are

determined for the horizontal or 3, 9 o’clock direction and the vertical or 6, 12 o’clock

direction with respect to the optical axis which is normal to the LCD surface.

2. Contrast measurements shall be made at viewing angle of T= 0q and at the center of the LCD surface. Luminance shall be measured with all pixels in the view field set first to white, then to the dark (black) state. (See Figure 1 shown in Appendix) Luminance Contrast Ratio (CR) is defined mathematically.

Luminance when displaying a white raster

CR =

Luminance when displaying a black raster

3. The color chromaticity coordinates specified in Table 9.shall be calculated from the spectral data measured with all pixels first in red, green, blue and white. Measurements shall be made at the center of the panel.

4. Response time Tg is the average time required for display transition by switching the input signal as below table and is based on Frame rate fV =60Hz to optimize. Each time in below table is defined as Figure 2and shall be measured by switching the input

signal for “any level of gray(bright)”and “any level of gray(dark)”.

5. Definition of Transmittance (T%) :

Module is with white(L255) signal input

Luminance of LCD Module

Transmittance =

Luminance of BLU

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7.0 MECHANICAL CHARACTERISTICS

7.1 Dimensional Requirements

Figure 3 (located in Appendix) shows mechanical outlines for the model HV320WX2-201.

Other parameters are shown in Table 10.

< Table 10. Dimensional Parameters >

Parameter Specification Unit

Active area

Pixel pitch

Number of pixels

Weight 1180 (typ.) gram

1366(H) ശ768(V) (1 pixel = R + G + B dots)

697.685 (H) ശ392.256(V)

0.51(H) ശ0.51(V)

pixels

7.2 Semi-Glare and Polarizer Hardness

The surface of the LCD has an semi-glare coating to minimize reflection and a coating to

reduce scratching.

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8.0 Reliability Test Condition

< Table 12. Reliability Test Condition >

Item Test Condition

High-Temp/STG

Low-Temp/STG

High-Temp/HMD

High-Temp/OP

Ta = 6 0 ć, 240 hrs

Ta = -2 0 ć, 240 hrs

Ta = 5 0 ć, 80%RH, 240hrs

Ta = 50 ć, 240hrs

TFT LCD

REV ISSUE DATE

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Low-Temp/OP

TST

Vibration

Shock

ESD

Ta = 0 ć, 240hrs

Ta = -2 0 ć ↔ 60 ć (0.5 hr), 100 cycle

Frequency:10-300 Hz Gravity / AMP : 1.0 G rms Period : X, Y, Z 30 min

Gravity : 50G Pulse width : 11msec, Half Sine

ധX, ധY, ധZ Once for each direction

Air:ധ15kV,150pF/330Ω,100Point,1time/Point Contact:ധ8kV,150pF/330Ω,100Point, 1time/Point

This test condition is based on BOE module.

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9.0 PRODCUT SERIAL NUMBER

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1 2 3 4 5 6 7

XX X X XX X XXXX XXXXXX

1. Control Number

2. Rank / Grade

3. Line Classification

4. Year (2011 : 11, 2012 : 12, …)

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5. Month (1,2,3, … , 9, X, Y, Z)

6. Internal Use

7. Serial Number

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10.0 PACKING INFORMATION

BOE provides the standard shipping container for customers, unless customer specifies

their packing information. The standard packing method and Barcode information are shown in below.

10.1 Packing Order

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SPEC. NUMBER

S63-8001

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

B2010-8002-O (3/3)

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SPEC. TITLE

HV320WX2-201 Product Specification

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PRODUCT GROUP

TFT LCD

10.2 Packing Note

y Box Dimension : 875mmLÝ597mmWÝ279mmH y Package Quantity in one Box : 20pcs

10.3 Box Label

y Label Size : 110 mm (L) u 55 mm (W) y Contents

Model : HV320WX2-201 Q`ty : 20 Open Cell in one box. Serial No. : Box Serial No. See next page for detail description. Date : Packing Date FG Code : FG Code of Product

REV ISSUE DATE

O 2011.11.07

00 0 00 0 0 000000 Type Grade Year Month ITEM-CODE Serial_no

SPEC. NUMBER

S63-8001

HV320WX2-201

0000000000000

SPEC. TITLE

HV320WX2-201 Product Specification

XXXX

201X.X.XX

Internal CODE

RoHS Mark

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PRODUCT GROUP

TFT LCD

12.0 HANDLING & CAUTIONS

CAUTIONS

(1) Cautions when taking out the Panel

Pick the pouch only, when taking out panel from a shipping package.

(2) Cautions for handling the panel

As the electrostatic discharges may break the LCD Panel, handle the LCD panel with

care. Peel a protection sheet off from the LCD panel surface as slowly as possible.

As the LCD panel and back -light element are made from fragile glass material, impulse

and pressure to the LCD panel should be avoided.

As the surface of the polarizer is very soft and easily scratched, use a soft dry cloth

without chemicals for cleaning. Do not pull the interface connector in or out while the LCD panel is operating. Put the panel display side down on a flat horizontal plane. Handle connectors and cables with care.

(3) Cautions for the operation

When the panel is operating, do not lose CLK, ENAB signals. If any one of these

signals Is lost, the LCD panel would be damaged.

Obey the supply voltage sequence. If wrong sequence is applied, the panel would be

damaged.

(4) Cautions for the atmosphere

Dew drop atmosphere should be avoided.

Do not store and/or operate the LCD panel in a high temperature and/or humidity atmosphere. Storage in an electro-conductive polymer packing pouch and under relatively low temperature atmosphere is recommended.

(5) Cautions for the panel characteristics

Do not apply fixed pattern data signal to the LCD panel at product aging. Applying fixed pattern for a long time may cause image sticking.

(6) Other cautions

Do not disassemble and/or re-assemble LCD panel. Do not re-adjust variable resistor or switch etc. When returning the panel for repair or etc., Please pack the panel not to be broken. We

recommend to use the original shipping packages.

REV ISSUE DATE

O 2011.11.07

SPEC. NUMBER

S63-8001

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

B2010-8002-O (3/3)

SPEC. TITLE

HV320WX2-201 Product Specification

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13.0 APPENDIX

PRODUCT GROUP

TFT LCD

< Figure 1. Measurement Set Up >

REV ISSUE DATE

O 2011.11.07

wy^ZW

< Figure 2. Response Time Testing >

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SPEC. NUMBER

S63-8001

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

B2010-8002-O (3/3)

SPEC. TITLE

HV320WX2-201 Product Specification

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REV ISSUE DATE

O 2011.11.07

< Figure 3. Open Cell Outline Dimensions (Front View) >

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SPEC. NUMBER

S63-8001

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

B2010-8002-O (3/3)

SPEC. TITLE

HV320WX2-201 Product Specification

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