Document Part N°0127-1031
Document ReferenceNEUTRON\..\01271031.doc
Document Issue Level2.0
Manual covers PCBs with the following Issue1.x & 2.x (x is any alpha/digit)
All rights reserved. No part of this publication may be reproduced, stored in any retrieval
system, or transmitted, in any form or by any means, electronic, mechanical, photocopied,
recorded or otherwise, without the prior permission, in writing, from the publisher. For
permission in the UK contact Blue Chip Technology.
Information offered in this manual is believed to be correct at the time of printing. Blue Chip
Technology accepts no responsibility for any inaccuracies. The information contained herein
is subject to change without notice. There are no express or implied licences granted herein to
any intellectual property rights of Blue Chip Technology Ltd.
All trademarks and registered names acknowledged.
Blue Chip Technology Limited,
Chowley Oak, Tattenhall,
Chester, Cheshire,
CH3 9EX, UK
Telephone: +44 (0)1829 772000
Facsimile: +44 (0)1829 772001
Website: http://www.bluechiptechnology.co.uk
Page 3
Amendment History
Issue
Level
0.129/10/99EWFirst draft
0.26/01/00PMDBIOS settings updated
1.01/09/00EGWRevised format
2.014/12/00EGWECN 2000/151: include E2 and Dig
Issue
Date
AuthorAmendment Details
I/O options in one build. Were 2
builds.
Page 4
CONTENTS
CONTENTS
COMPANY PROFILE1
INTRODUCTION1
MANUAL OBJECTIVES1
LIMITATIONS OF LIABILITY1
PRECAUTIONS2
Electro-Static Discharges2
Off-Board Battery2
RELATED PUBLICATIONS3
TRADEMARKS3
USER GUIDE4
OVERVIEW4
Board Level Features5
CPU5
Bus Expansion Slots5
Electromagnetic Compatibility6
SPECIFICATION7
Cooling7
HARDWARE DESCRIPTION8
CHIPSET8
M1489 CACHE MEMORY PCI CONTROLLER (CMP)8
IDE Support8
M1487 ISA BRIDGE CONTROLLER (IBC)8
Real Time Clock, CMOS RAM and Battery8
VIDEO: CHIPS & TECHNOLOGIES 690008
SMC 37C665 SUPER I/O CONTROLLER9
Floppy Controller9
WATCHDOG FUNCTION9
PROGRAMMABLE DIGITAL INPUT/OUTPUTS9
USER EEPROM9
SOLID STATE DISK SUPPORT10
BIOS11
System Setup Utility11
PCI Support11
ISA Plug and Play11
Auto-Configuration Capabilities11
Advanced Power Management12
Sleep mode Support12
Security features12
CLEARING CMOS MEMORY13
CONNECTORS13
JUMPERS13
Blue Chip Technology Ltd.01271031
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CONTENTS
SOFTWARE DESCRIPTION14
BIOS SETUP14
OVERVIEW OF THE SETUP MENU SCREENS14
Main Screen14
Overview of the Setup Keys16
Standard Setup16
Advanced CMOS Setup19
Advanced Chipset Setup21
Power Management Setup22
PCI / plug and play Setup24
Peripheral Setup26
Watchdog Timer Operation31
EEPROM Access and Control33
Programmable Digital Input/Outputs34
Accessing INT 50h Functions35
DISK-ON-CHIP SUPPORT36
Installing the Disk-On-Chip36
Configuring the Disk-On-Chip as the Boot device37
Configuring the Disk-On-Chip as the first drive37
CONNECTORS38
ERROR MESSAGES45
AMIBIOS Error Beep Codes45
AMIBIOS Error Codes on the POST display46
AMIBIOS Error Messages51
ISA NMI Messages53
PCI Configuration Error Messages54
BOARD LAYOUT55
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PHOTON USER MANUALCOMPANY PROFILE
COMPANY PROFILE
Blue Chip Technology is the leading specialist PC product manufacturer in UK/Europe.
Blue Chip Technology provides innovation with quality design and manufacturing from a
single source.
Based in the Northwest, our purpose built complex contains one of the most advanced
research and development facility, engineering workshop and production lines.
Specialising in the provision of industrial computing and electronic solutions for a wide range
of UK and European organisations, Blue Chip Technology has one of the UK's largest
portfolios of industrial PCs, peripherals and data acquisition cards. This extensive range of
products, coupled with our experience and expertise, enables Blue Chip Technology to offer
an industrial processing solution for any application. The PHOTON Single Board PC is one
of the latest additions to our portfolio, providing a cost effective product development and
volume production tool for OEMs.
A unique customisation and specialised system integration service is also available, delivering
innovative solutions to customers problems. The company's success and reputation in this
area has led to a number of large design and manufacturing projects for companies such as
BNFL, Aston Martin, JaguarSport and British Gas.
British Standards Institute approval (BS EN ISO9001) means that all of Blue Chip
Technology's design and manufacturing procedures are strictly controlled, ensuring the
highest levels of quality, reliability and performance.
Blue Chip Technology are also committed to the single European market and continue to
invest in the latest technology and skills to provide high performance computer and
electronic solutions for a world-wide customer base.
Blue Chip Technology Ltd.01271031
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NEUTRON USER MANUALINTRODUCTION
INTRODUCTION
MANUAL OBJECTIVES
This manual describes in detail the Blue Chip Technology NEUTRON PC104 Single Board
Processor Card (SBPC).
We have tried to include as much information as possible but we have not duplicated
information that is provided in the standard IBM Technical References, unless it proved to be
necessary to aid in the understanding of the NEUTRON.
The manual is sectioned and includes a User Guide that will help the non-technical user to
get the unit up and running. We strongly recommend that you study this manual carefully
before attempting to interface with NEUTRON or change the standard configurations.
Whilst all the necessary information is available in this manual we would recommend that
unless you are confident, you contact your supplier for guidance.
Please be aware that it is possible to create configurations within the CMOS RAM that make
booting impossible. If this should happen, clear the CMOS settings by powering the system
down and disconnecting the external lithium battery (if used).
If you have any suggestions or find any errors concerning this manual and want to inform us
of these, please contact our Customer Support department with the relevant details.
LIMITATIONS OF LIABILITY
In no event shall Blue Chip Technology be held liable for any loss, expenses or damages of
any kind whatsoever, whether direct, indirect, incidental or consequential, arising from the
design or use of this product or the support materials supplied with this product. If this
product proves to be defective, Blue Chip Technology is only obliged to replace or refund
the purchase price at Blue Chip Technology's discretion according to their Terms and
Conditions of Sale.
Blue Chip Technology Ltd.01271031Page 1
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NEUTRON USER MANUALINTRODUCTION
PRECAUTIONS
It is imperative that precautions are taken to avoid electro-static discharges, or any
maltreatment of the off-board lithium battery.
ELECTRO-STATIC DISCHARGES
The devices on this card can be totally destroyed by static electricity. Ensure that you take
necessary static precautions, ideally wear an approved wrist strap or touch a suitable
ground to discharge any static build up. This should be repeated if the handling is for any
length of time.
When carrying the board around, please place it into the non-conductive bag in which it
came. This will prevent any static electricity build up.
OFF-BOARD BATTERY
This board supports an off board a Lithium battery. Great care should be taken with this
type of battery. Under NO circumstances should:
• the outputs be shorted
• be exposed to temperatures in excess of 100°C
• be burnt
• be immersed in water
• be unsoldered
• be recharged
• be disassembled
IF THE BATTERY IS MISTREATED IN ANY WAY THERE IS A
VERY REAL POSSIBILITY OF FIRE, EXPLOSION AND HARM.
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NEUTRON USER MANUALINTRODUCTION
RELATED PUBLICATIONS
The following publications will provide useful information related to the Standard Personal
Computer and can be used in conjunction with this manual.
• IBM Personal Computer AT Technical Reference, 1502494, IBM, 1984.
• IBM Personal System/2 & Personal Computer BIOS Interface Technical Reference,
15F0306, IBM, 1987.
• The Programmers PC Sourcebook, Microsoft
• The Winn L. Rosch Hardware Bible, Brady
• PC104 Consortium Technical Specification
TRADEMARKS
IBM, PC, AT and PS/2 are trademarks of International Business Machines Corporation
(IBM).
AMI Hi-Flex BIOS is a trademark of American Megatrends Inc.Intel is a registered trademark of the Intel Corporation.All 80x86 and Pentium processors are registered trademarks of Intel Corporation.MSDOS and WINDOWS are registered trademarks of the Microsoft Corporation.PC/104-plus and PC/104 are registered trademarks of the PC/104 Consortium.Finali is a registered Trademark of Acer Labs Incorporated
Blue Chip Technology Ltd.01271031Page 3
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NEUTRON USER MANUALUSER GUIDE
USER GUIDEOVERVIEW
The Blue Chip Technology NEUTRON single board PC sets new standards for integration
of the latest advances in processor, memory, and I/O technologies. The NEUTRON
complies with the PC104 interface requirements. NEUTRON is an ideal platform for the
increasing requirements of today and tomorrow's embedded applications.
The design is based on the AMD Am5x86-P75 running at an internal clock rate of 133MHz
providing an equivalent performance to a P75. The memory sub-system supports 16MB of
on-board DRAM.
The NEUTRON single board PC utilises the ALI Finali PCI chipset to provide increased
integration and performance over other single board PC designs. The Finali PCIset contains
an integrated PCI Bus EIDE controller with a high performance IDE interface allowing up to
two IDE devices (such as hard drives, CD-ROM readers, etc.). A Chips & Technologies
69000 video controller supports both CRT and LCD displays, simultaneously if required.
The SMC 37C665 Super I/O controller integrates the standard PC I/O functions: floppy
interface, two FIFO serial ports and one EPP/ECP capable parallel port.
In addition to superior hardware capabilities, a full set of software drivers and utilities are
available to allow advanced operating systems such as Windows 95/98 to take full advantage
of the hardware capabilities. Features such as Windows 95/98-ready Plug and Play (PnP),
PCI EIDE and Advanced Power Management (APM) are available for NEUTRON.
A standard set of cables to cover most common applications is available separately.
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NEUTRON USER MANUALUSER GUIDE
BOARD LEVEL FEATURES
• AMD 5x86-P75 133MHz CPU
• On-board 3.3 V CPU voltage regulator
• ALI Finali PCI chipset:
M1489 Cache Memory PCI Controller (CMP)Also providing dual PCI IDE interfaceM1487 ISA bridge Controller (IBC)
• 16MByte of DRAM on-board
• Chips & Technologies 69000 video controller with 2MB of video DRAM
• Real-time clock with support for off-board Lithium battery
• PS/2 keyboard support.
• 3 programmable digital input/output lines.
• 128 bytes user EEPROM.
• +5v only operation.
• Optional socketed Solid State Disk -
2-288 MByte Flash expansion using Disk On Chip (DOC)
CPU
The NEUTRON PC104 single board PC is designed to operate with AMD Am5x86-P75
CPU running at 3.3 Volts. An on-board voltage regulator circuit provides the required
voltage for the processor from the 5V output of a standard PC power supply.
The Am5x86-P75 processor maintains full backward compatibility with the 8x86
architecture processors. It supports burst mode bus cycles, and includes an integrated
unified 16KB on-chip cache which employs a write-back policy. Also integrated into the
processor is an advanced numeric co-processor which significantly increases the speed of
floating point operations, whilst maintaining backward compatibility with 8x87 math
coprocessor and complying with ANSI/IEEE standard 754-1985.
BUS EXPANSION SLOTS
NEUTRON is designed for use in an embedded application and provides ISA expansion via
the standard PC/104 (ISA) connector. There may be up to four PC/104 bus expansion
cards.
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NEUTRON USER MANUALUSER GUIDE
ELECTROMAGNETIC COMPATIBILITY
This product meets the requirements of the European EMC Directive (89/336/EEC) and is
eligible to bear the CE mark. However, because the board can be installed in a variety of
computers and enclosures, certain conditions have to be applied to ensure that the
compatibility is maintained. Subject to those conditions, it meets the requirements for an
industrial environment (Class A product).
• The board must be installed in a computer system chassis that provides screening
suitable for an industrial environment.
• Any recommendations made by the computer system manufacturer/supplier must be
complied with regarding earthing and the installation of boards.
• The board must be installed with any bulkhead plates securely screwed to the chassis of
the computer to ensure good metal-to-metal (i.e. earth) contact.
• Most EMC problems are caused by cabling external to the board. It is imperative that
any external cabling to the board is totally screened, and that the screen of the cable
connects to the metal enclosure and hence to earth. It is recommended that round
screened cables with a braided wire screen are used in preference to those with a foil
screen and drain wire. Use metal connector shells that connect around the full
circumference of the screen: they are far superior to those that earth the screen by a
simple “pig-tail”.
• The keyboard and mouse will play an important part in the compatibility of the
processor card since it is a port into the board. Similarly, they will affect the
compatibility of the complete system. A fully compatible keyboard and/or mouse must
be used otherwise the complete system could be degraded. The keyboard/mouse
themselves may radiate or behave as if keys are pressed when subject to interference.
Under these circumstances it may be beneficial to add a ferrite clamp on the
keyboard/mouse lead as close as possible to the connector. A suitable type is the
Chomerics type H8FE-1004-AS.
• Ensure that the screens of any external cables are bonded to a good RF earth at the
remote end of the cable.
Failure to observe these recommendations may invalidate the EMC compliance.
Warning
This is a Class A product. In a domestic environment this product may cause
radio interference in which case the user may be required to take adequate
measures.
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NEUTRON USER MANUALUSER GUIDE
SPECIFICATION
NEUTRON Power Requirement +5 V ± 5%Required for processor operation.
+12 V ± 5% Not required for board operation.
-5 V ± 5%The PC/104 voltage rails
-12 V ± 5%are linked on board.
Typical System Consumption8 WattsAm5x86-P75 16 MB RAM
TemperatureNon-Operating-40°C to +80°C
Operating+0°C to +40°C (min. airflow of 15 m3/hour)
+0°C to +50°C (min. airflow of 45 m3/hour)
+0°C to +60°C (min. airflow of 66 m3/hour)
HumidityOperating10 % to 90 % RH, non-condensing
EMCEmissionsEN55022 (A)
ImmunityEN50082-1 in a Blue Chip ICON Industrial PC Chassis
MTBFEstimated100,000 Hrs
DimensionsBoard only108 x 96 mm
Power Consumption figures given are for a typical configuration. This information is
provided only as a guide to calculating approximate total power usage for a system.
COOLING
Efficient cooling is essential for long and reliable operation. The greater the volume of air,
the greater the cooling effect and the lower the temperature rise above the ambient air
temperature. However, the volume produced by any fan will vary with the pressure against
which it has to work. The resistance to airflow (the back-pressure on the fan) will depend
upon the enclosure, the mounting and restrictions. Therefore, when mounting and cabling
the board, it is essential that the free circulation of the cooling airflow is not impeded.
The calculation of airflow through an enclosure is not straightforward, and depends on
many factors. The method of meeting the cooling requirements will be specific for each
system. Consequently, the system builder is responsible for ensuring adequate cooling.
However, interpreting airflow volumes is not intuitive. As an aid to selecting suitable
cooling, the following example is offered. A 60 mm axial fan (such as a Papst type
612NGH) blowing over the board can supply up to 46 m3/hour when unrestricted.
Restrictions to the airflow will reduce this volume.
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NEUTRON USER MANUALHARDWARE DESCRIPTION
HARDWARE DESCRIPTION
CHIPSET
The Ali Finali PCI Chipset consists of the M1489 Cache Memory PCI controller (CMP)
and the M1487 ISA Bridge Controller (IBC).
M1489 CACHE MEMORY PCI CONTROLLER (CMP)
The M1489 provides all control signals necessary to drive a second level cache (not
implemented) and the DRAM array, including multiplexed address signals. The CMP
provides access to memory and generates snoop controls to maintain cache coherency.
The CMP also integrates an intelligent Host to PCI interface buffer to improve system
performance. The high performance Local bus EIDE interface is also provided by the
CMP. The CMP comes in a 208-pin PQFP package.
IDE SUPPORT
The NEUTRON single board PC provides one high performance PCI IDE interfaces
capable of supporting PIO Mode 3 and Mode 4 devices. The system BIOS supports
Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS) translation
modes as well as ATAPI (e.g. CD-ROM) devices. Detection of IDE device transfer rate
and translation mode capability is automatically determined by the system BIOS.
M1487 ISA BRIDGE CONTROLLER (IBC)
The M1487 provides the bridge between the ISA bus, PCI bus and Host Bus. It integrates
the standard PC peripherals such as DMA Interrupt controllers, keyboard, RTC and Timer
functions. The IBC is packaged in a 160 pin PQFP
REAL TIME CLOCK, CMOS RAM AND BATTERY
The integrated Real Time Clock (RTC) is both DS1287 and MC146818 compatible. It
provides a time of day clock and a 100-year calendar with alarm features. The RTC can be
set via the BIOS SETUP program. The RTC also supports128 bytes of battery-backed
CMOS RAM which is reserved for BIOS use. The CMOS RAM can be set to specific
values or cleared to the system default values using the BIOS SETUP program.
A battery is required to maintain the RTC and CMOS memory whilst the power is switched
off. NEUTRON is fitted with a connector to allow the use of an off-board 3.7V Lithium
battery. The CMOS RAM values can be cleared to the system defaults by disconnecting
the external Lithium battery.
VIDEO: CHIPS & TECHNOLOGIES 69000
The NEUTRON provides the latest technology integrated PCI video sub-system. The board
is fitted with a 10-way header providing standard VGA signals, dual headers to interface to a
wide range of LCD panels of up to 36 bits, and a dedicated connector for popular LCDs.
The 69000 integrates 2MB of video memory and DAC into a single BGA device. All the
necessary drivers for most popular operating systems are supplied on a utilities disk.
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NEUTRON USER MANUALHARDWARE DESCRIPTION
SMC 37C665 SUPER I/O CONTROLLER
Control for the integrated serial ports, parallel port and floppy drive controller is
incorporated into a single component, the SMC 37C665. This component provides:
• Two NS16C550-compatible UARTs with send/receive 16 byte FIFO
• Multi-mode bi-directional parallel port
- Standard mode; IBM and Centronics compatible
- Enhanced Parallel Port (EPP) with BIOS support
- High Speed mode; Extended Capabilities Port (ECP) compatible
• Industry standard floppy controller with 16 byte data FIFO (2.88 MB floppy support)
The 37C665 is normally configured by the BIOS automatically, however configuration of
these interfaces is possible via the CMOS Setup program that can be invoked during bootup. The serial ports can be enabled as COM1, COM2, or disabled. The parallel port can be
configured as normal, extended, EPP/ECP, or disabled. The floppy interface is configurable.
Header connectors allow cabling to use these interfaces.
FLOPPY CONTROLLER
The 37C665 is software compatible with the DP8473 and 82077 floppy disk controllers.
The floppy interface can be configured for 360 KB or 1.2 MB 5¼" media or for 720 KB,
1.44 MB, or 2.88 MB 3½" media in the BIOS Setup. By default, the Floppy A interface is
configured for 1.44 MB and Floppy B is disabled.
WATCHDOG FUNCTION
NEUTRON provides both hardware and software watchdog functions.
The hardware watchdog will trigger a reset if the +5V supply drops below 4.6V.
When enabled the software watchdog will trigger a reset if there is a ½ second gap between
reads from I/O port 101h. The software watchdog is enabled by writing 1 to bit 0 of I/O
port101h.
PROGRAMMABLE DIGITAL INPUT/OUTPUTS
NEUTRON provides for three programmable, TTL-compatible digital input/output lines.
They are selected as a BIOS option to the User EEPROM. Digital I/O is not available if the
user EEPROM option is selected.
See the section “Using the Additional IO Functions” on the use of the I/O lines.
USER EEPROM
NEUTRON provides 128 bytes of user accessible non-volatile memory in the form of an
EEPROM. This is selected as an option to the digital I/O function in the BIOS. The
EEPROM is not available if the Digital I/O option is specified.
See the section “Using the Additional IO Functions” on the use of the EEPROM.
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NEUTRON USER MANUALHARDWARE DESCRIPTION
SOLID STATE DISK SUPPORT
NEUTRON supports the use of Solid State Disks using a Disk-on-Chip module fitted into
the 32-pin DIL socket. This permits Hard disk read/write emulation with disk capacities
currently ranging from 2 M to 288 MBytes. See the section “Disk-On-Chip Support” under
Software Description for installation details.
Please contact Blue Chip Technology’s Sales Department for details.
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NEUTRON USER MANUALHARDWARE DESCRIPTION
BIOS
The NEUTRON single board PC uses an AMI system BIOS, which is stored in EPROM. In
addition to the System BIOS, the EPROM also contains the Setup utility, Power-On Self
Test (POST), and the PCI auto-configuration utility. This single board PC supports system
BIOS shadowing, allowing the BIOS to execute from 32-bit on-board write-protected
DRAM.
The BIOS displays a sign-on message during POST identifying the type of BIOS and a
revision code.
Note that the user-configurable parameters are stored in CMOS memory. In order to
maintain the parameters whilst the power is switched off, a battery must be connected to the
board.
SYSTEM SETUP UTILITY
The EPROM-based Setup utility allows the configuration to be modified without opening
the system for most basic changes. The Setup utility is accessible only during the PowerOn Self Test (POST) by pressing the <DEL> key after the POST memory test has started
and before boot begins. A prompt may be enabled that informs users to press the <DEL>
key to access Setup.
PCI SUPPORT
The Neutron board supports Version 2.0 of the PCI BIOS specification for the on-board
PCI devices.
ISA PLUG AND PLAY
The AMI BIOS incorporates ISA Plug and Play capabilities as defined by the Plug and Play
Release 1.0A specification (Plug and Play BIOS Version 1.0A, ESCD Version 1.02). This
allows auto-configuration of Plug and Play ISA cards, and resource management for nonPlug and Play (or legacy) ISA cards, when used in conjunction with Plug and Play aware
operating systems (such as Windows 95/98).
AUTO-CONFIGURATION CAPABILITIES
The auto-configuration utility operates in conjunction with the system Setup utility to allow
the insertion and removal of ISA Plug and Play cards to the system without user
intervention of the BIOS settings (Plug & Play). When the system is turned on after
adding an ISA Plug and Play card, the BIOS automatically configures interrupts, DMA
channels, I/O space, and memory space. The user does not have to configure jumpers or
worry about potential resource conflicts. Because ISA Plug and Play cards use the same
interrupt resources as ISA cards, the user can specify the interrupts used by ISA add-in
cards in the Setup utility. If using Windows 95/98, the auto-configuration utility only
initialises the devices required to boot up, Windows 95/98 initialises all the other devices
since it is a Plug and Play aware operating system.
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NEUTRON USER MANUALHARDWARE DESCRIPTION
ADVANCED POWER MANAGEMENT
The NEUTRON AMI BIOS supports power management through System Management
Mode (SMM) interrupts to the CPU and Advanced Power Management (APM Version
1.1). In general, power management capabilities will allow the system to be put into a
power managed, Stand-by mode either by entering a user configurable hot-key sequence on
the keyboard, or by the expiration of a hardware timer which detects system inactivity for a
user-configurable time. When in the Stand-by mode, the NEUTRON single board PC
reduces power consumption by using the power saving capabilities of the Am5x86-P75
processor and also running down hard drives and turning off DPMS compliant monitors.
Add-in cards supplied with APM-aware drivers can also be put into a power managed state
for further energy savings. The ability to respond to external interrupts is fully maintained
while in Stand-by mode, allowing the system to service requests (such as in-coming Fax’s
or network messages) while unattended, albeit slowly until the system wakes up.
SLEEP MODE SUPPORT
When Advanced Power Management (APM) is activated in the System BIOS and the
Operating System’s APM driver is loaded, Sleep mode (Stand-By) can be entered in one of
three ways.
Sleep/Resume may be activated by using either a momentary-action sleep switch in the
UTILS header (‘external SMI’ input), a keyboard hot-key sequence, or by a time-out of
the system inactivity timer. Both the keyboard hot-key and the inactivity timer are
programmable in the BIOS setup (timer is set to 10 minutes by default). To re-activate the
system, or “Resume”, the user simply uses the keyboard or mouse, or presses the sleep
switch. Note that mouse activity will only “wake up” the system if a mouse driver is
loaded. While the system is in Stand-By or “Sleep” mode it is fully capable of responding
to, and servicing external interrupts. Once in Sleep or Stand-By mode, the monitor will
only turn on if a user interrupt occurs as defined above.
SECURITY FEATURES
Note that the security features are only supported when an off-board battery supports the
CMOS RAM.
SUPERVISOR PASSWORD
If enabled, the supervisor password protects all sensitive Setup options from being
changed by a user unless the password is entered (see appendix).
If the password is forgotten, it may be cleared by turning off the system and clearing the
CMOS RAM by disconnecting the battery (if used).
USER PASSWORD
The User Password feature provides access to all setup options that do not require the
supervisor password. The User Password feature also provides security during the boot
process. The User Password can be enabled using the Setup utility. (At boot-up, the
system will complete the operating system boot up process, but keyboard and mouse
operation will be locked until the User Password is entered.)
If the password is lost, it may be reset by clearing the CMOS RAM, (see below).
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NEUTRON USER MANUALHARDWARE DESCRIPTION
CLEARING CMOS MEMORY
This should be required under exceptional circumstances such as losing the password, or
setting incompatible parameters in the BIOS.
Switch off the system and disconnect the off-board battery from the NEUTRON. Wait for
two minutes to allow the decoupling capacitor to discharge, and then reconnect the battery.
Switch on the system, enter the BIOS setup and set as required.
CONNECTORS
Various connectors are incorporated on the NEUTRON PC board. These provide
connectivity to external peripherals (serial, parallel, keyboard, etc.), in-chassis peripherals
(disk drives, etc.), and bus devices. A complete table of the available connectors and their
pin-outs is given in the appendices.
An optional cable set is available to simplify setting up common applications. The cables
included in the standard cable set are indicated against each connector. For the other
connectors, suitable mating parts are given. The PC board layout at the end of the manual
shows their positions.
ON-BOARD CONNECTORS
There are connectors on-board for Floppy Disk Drive, IDE, LCD, video, sound, serial and
parallel ports, PC/104, digital inputs and utilities. There are also connectors for Power
supply and external battery.
UTILITY CONNECTOR
The NEUTRON PC board provides a connector to support functions such as reset
switch, speaker, Turbo LED, Power LED, keyboard, and external SMI to invoke the
power saving mode of the NEUTRON.
BUS CONNECTORS
The board incorporates the PC/104 bus connector for expansion. See the appendices for
the pin-out details.
JUMPERS
Jumpers are used on the board to select options. Some of the jumpers are factory set to suit
particular semiconductor options. These must not be disturbed, or damage to the board may
ensue.
JUMPERAREA OF INFLUENCELINKACTION
J1
J2
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DRAM voltageN/AHardwired in manufacture to
suit DRAMs fitted.
LCD Panel Power Supply
Note: your LCD may be
damaged if set incorrectly
1-2+3.3 volts selected
2-3+5 volts selected
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NEUTRON USER MANUALSOFTWARE DESCRIPTION
SOFTWARE DESCRIPTION
BIOS SETUP
This section details the BIOS CMOS Setup Utility. The parameters described below are
based on BIOS version 1.00; other BIOS versions may differ from the description below as
new features are added. The BIOS Setup is entered by pressing the <DEL> key during the
Power On Self Test (POST).
OVERVIEW OF THE SETUP MENU SCREENS
The Setup program initially displays the Main menu screen. In each screen there are options
for modifying the system configuration. Select a sub-menu screen by pressing the up <↑> or
down <↓> arrow keys, followed by <Enter>. Within the menu use the up <↑> or down <↓>
keys to select an item, then use <PgUp> or <PgDn> to modify it. Pressing <Enter> may
bring up a sub-screen. After you have selected an item, use the <PgUp> or <PgDn> keys to
modify the setting.
MAIN SCREEN
Shows the following menu:
Auto Configuration with Optimal Settings
Auto Configuration with Fail Safe Settings
Their operation is as follows:
STANDARD CMOS SETUP
Standard CMOS Setup
Advanced CMOS Setup
Advanced Chipset Setup
Power Management Setup
PCI / Plug and Play Setup
Peripheral Setup
Auto Detect Hard Disk
Change User Password
Change Supervisor Password
Save Settings and Exit
Exit without Saving
For setting up and modifying basic items such as floppy disk drives, hard drives, and
system time & date.
ADVANCED CMOS SETUP
Use to modify the more advanced features of the PC (e.g. system bootup options).
ADVANCED CHIPSET SETUP
Use to modify hardware level options.
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POWER MANAGEMENT SETUP
For specifying the “Green PC” features such as IDE and VGA timeouts.
PCI / PLUG AND PLAY SETUP
For specifying Plug and Play options (e.g. IRQ assignments).
PERIPHERAL SETUP
For specifying the system peripheral options such as serial and parallel port modes.
AUTO DETECT HARD DISK
Automatically determines the parameters of any IDE devices connected, and sets up the
parameters for “USER DEFINED” drives.
CHANGE USER PASSWORD
Allows the password for the user level options to be set or changed. This option cannot
be changed unless a supervisor password has been set.
CHANGE SUPERVISOR PASSWORD
Allows the password for the supervisor level options to be changed.
AUTO CONFIGURATION WITH OPTIMAL SETTINGS
Resets the CMOS setup options to a high performance configuration. The optimal
default settings are best case values and should optimise the system performance. If
CMOS RAM is corrupted, the optimal settings are loaded automatically.
AUTO CONFIGURATION WITH FAIL SAFE SETTINGS
Resets the CMOS setup options to a lower performance but guaranteed working
configuration. The fail safe settings provide far from optimal system performance, but
are the most stable settings. Use these settings as a diagnostics aid if the system is
performing erratically.
SAVE SETTINGS AND EXIT
When selected, this allows you to save the change to CMOS and exit the Setup program.
You can also press the <F10> key anywhere in the Setup program to do this. Note that
unless an off-board battery is connected to the NEUTRON board, the CMOS settings
will be lost when power is removed from the board.
EXIT WITHOUT SAVING
When selected, this allows you to exit the Setup program without saving any changes.
This means that any changes made while in the Setup program will be discarded and
NOT SAVED. Pressing the <Esc> key in any of the four main screens will do this.
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OVERVIEW OF THE SETUP KEYS
SETUP
KEY
<Esc>Pressing the <Esc> key takes you back to the previous screen.
Pressing it in the Main, Advanced, Security, or Exit screen allows you
to Exit Discarding Changes (see later in this chapter).
<PgUp>
<PgDn>
< ↑ >Pressing the up < ↑ > key changes the selection to the previous item
< ↓ >Pressing the down < ↓ > key changes the selection the to the next item
< ← > <
→ >
<F10>Pressing the <F10> key allows you to Exit Saving Changes (see later
Pressing either key moves the selection of the current item up or down
the available options.
or option.
or option.
Pressing the left < ← > or right < → > keys in the Main, Advanced,
Security, or Exit menu screens changes the menu screen. Pressing
either key in a subscreen does nothing.
in this chapter).
DESCRIPTION
STANDARD SETUP
This section describes the Setup options found on the standard setup screen.
SYSTEM DATE
When selected, this allows you to set the current date by specifying a date, month and
year.
SYSTEM TIME
When selected, this allows you to set the current time by entering values for hours,
minutes and seconds..
FLOPPY A: TYPE
When selected, this allows you to cycle through the available options to specify the
physical size and capacity of the diskette drive. The options are Not Installed; 360 KB,
5.25-inch; 1.2 MB, 5.25-inch; 720 KB, 3.5-inch; 1.44 MB, 3.5-inch; 2.88 MB, 3.5-inch.
The default is 1.44 MB, 3.5-inch.
FLOPPY B: TYPE
When selected, this allows you to cycle through the available options to specify the
physical size and capacity of the diskette drive. The options are Not Installed, 360 KB,
5.25-inch; 1.2 MB, 5.25-inch; 720 KB, 3.5-inch; 1.44/1.25 MB, 3.5-inch; 2.88 MB, 3.5inch. The default is Not Installed.
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PRIMARY IDE MASTER
This reports if a primary master IDE hard disk is connected to the system and allows for
the configuration of drive parameters.
This allows for the manual configuration of the hard drive or, to have the system auto
configure the drive. The options are Auto Configured, User Definable and Disabled.
There are also options for IDE CD-ROM and 46 predefined hard drive types. If you
select User Definable then the Number of Cylinders, Number of Heads, and Number of
Sectors can each be modified. The default for this is Auto.
PRIMARY IDE SLAVE
This reports if a primary slave IDE hard disk is connected to the system. It is configured
exactly as described under Primary IDE Master above. The default is “Not Installed”.
SECONDARY IDE MASTER
This reports if a secondary master IDE hard disk is connected to the system. It is
configured exactly as described under Primary IDE Master above. The default is “Not
Installed”. (Note: Neutron does not support an on board secondary IDE channel).
SECONDARY IDE SLAVE
This reports if a secondary slave IDE hard disk is connected to the system. It is
configured exactly as described under Primary IDE Master above. The default is “Not
Installed”. (Note: Neutron does not support an on board secondary IDE channel).
NUMBER OF CYLINDERS
If Hard Disk Type is set to User Definable, you must type the correct number of
cylinders for your hard disk. If Hard Disk Type is set to Auto Configured, this reports
the number of cylinders for your hard disk and cannot be modified.
NUMBER OF HEADS
If Hard Disk Type is set to User Definable, you must type the correct number of heads
for your hard disk. If Hard Disk Type is set to Auto Configured, this reports the
number of heads for your hard disk and cannot be modified.
NUMBER OF SECTORS
If Hard Disk Type is set to User Definable, you must type the correct number of
sectors for your hard disk. If Hard Disk Type is set to Auto Configured, this reports
the number of sectors for your hard disk and cannot be modified.
LBA MODE
Selects Logical Block Addressing mode for large capacity drives. Options are On or
Off. The default is On.
BLOCK MODE
Permits multi-sector transfers. Options are On or Off. The default if On.
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PIO MODE
Selects an Advanced PIO mode of operation for faster transfers. Options are 0, 1, 2, 3,
4, 5, or Auto. The default is Auto.
32-BIT MODE
Selects 32-bit transfer mode. The options are On or Off. The default is Off.
BOOT SECTOR VIRUS PROTECTION
Detects if software tries to write to the boot sector. Options are Enabled or Disabled.
The default is Disabled.
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ADVANCED CMOS SETUP
BOOTUP SEQUENCE
This option specifies the sequence of the boot drives. The options are:
This option specifies the type of memory installed i.e. parity or non parity. When this
option is set to Enabled a parity test is performed on all accesses to system DRAM. The
Optimal and Fail-Safe default settings are Disabled.
OS/2 COMPATIBLE MODE
Set this option to Yes to permit AMIBIOS to run with IBM OS/2. The settings are
Enabled or Disabled. The default setting is Disabled.
WAIT FOR ‘F1’ IF ERROR
AMIBIOS POST error messages are followed by:
Press <F1> to continue
If this option is set to Disabled, AMIBIOS does not wait for you to press the <F1> key
after an error message. The settings are Disabled or Enabled. The Optimal and Fail-Safe
default settings are Disabled.
HIT ‘DEL’ MESSAGE DISPLAY
Set this option to Disabled to prevent the
Hit <DEL> if you want to run Setup
message from appearing on the first AMIBIOS screen when the computer boots. The
settings are Disabled or Enabled. The Optimal and Fail-Safe default settings are
Disabled.
INTERNAL CACHE
This option specifies whether or not the L1 internal cache memory is enabled. The
settings are Disabled or WriteBack. If WriteBack is selected, the write-back caching
algorithm is used. The default is WriteBack.
SYSTEM BIOS SHADOW CACHEABLE
When this option is set to Enabled, the contents of the F0000h system memory segment
can be read from or written to L1 cache memory. The contents of the F0000h memory
segment are always copied from the BIOS ROM to system RAM for faster execution.
The settings are Enabled or Disabled. The Optimal and Fail-Safe default settings are
Enabled.
These options control the location of the contents of the 16KB blocks of ROM beginning
at the specified memory location. If no adapter ROM is using the named ROM area, this
area is made available to the local bus. The settings are:
SETTINGDESCRIPTION
EnabledThe contents of the named ROM area (e.g. C0000h - C3FFFh)
are written to the same address in system memory (RAM) for
faster execution.
CacheThe contents of the named ROM area are written to the same
address in system memory (RAM) for faster execution, if an
adapter ROM will be using the named ROM area.
In addition, the contents of the RAM area can be read from and
written to cache memory.
DisabledThe ROM is not copied to RAM. The contents of the ROM cannot
be read from or written to cache memory.
The default settings are Cached for C000 and C400; Disabled for the remainder.
In the AMIBIOS for the ALI Finali chipset, the E000h page is used as ROM during
POST and shadowing is enabled for this region. Thus the E000h page is not available on
the local bus.
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ADVANCED CHIPSET SETUP
AUTO CONFIG FUNCTION
When set to enabled, this option allows the BIOS to automatically determine the best
system timing settings for the AT Bus and the DRAM and cache etc. The default
settings are Enabled and it is strongly recommended that these values are not changed
unless the user is fully aware of the system parameter timings. Changing these values to
an incorrect setting can cause system instability or even prevent the Neutron board from
booting. The options are Enabled or Disabled. The default setting is Enabled.
AT BUS CLOCK
This option is only available when the Auto Config Function is enabled. The options
are 7.16 MHz, Clk/3, Clk/4, Clk/5, Clk/8.
DRAM READ TIMING
This option is only available when the Auto Config Function is enabled. The options
are Slow, Normal, Faster, Fastest.
DRAM WRITE TIMING
Slow, Normal, Faster, Fastest.
SRAM READ TIMING
This option is only available when the Auto Config Function is enabled. The options
are 2-1-1-1, 3-1-1-1, 3-2-2-2, 4-2-2-2.
SRAM WRITE TIMING
This option is only available when the Auto Config Function is enabled. The options
are 0 wait states or 1 wait state.
HIDDEN REFRESH
This option enables or disables ISA refresh cycles. The Optimal and Fail-Safe default
settings are Disabled.
ISA I/O RECOVERY
This option specifies whether or not an additional delay is inserted between consecutive
I/O operations. The settings are Disabled or Enabled. The Optimal and Fail-Safe default
settings are Disabled.
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POWER MANAGEMENT SETUP
POWER MANAGEMENT / APM
Set this option to Enabled to enable the power management and APM (advanced Power
Management) features.
The settings are Enabled, Disabled or Inst-On. The default settings are Disabled.
Note: The following options are only available if Power Management/APM is enabled.
INSTANT ON SUPPORT
If this option is set in Power Management / APM it allows the computer to go to full
power on mode when leaving a power-conserving state. AMIBIOS uses the RTC Alarm
function to wake the computer at a pre-specified time. The settings are Enabled or
Disabled. The default settings are Disabled.
GREEN PC MONITOR POWER STATE
This option specifies the power management state that the Green PC-compliant video
monitor enters after the specified period of display inactivity has expired. The settings
are, Disabled, Standby, Suspend or Off. The default settings are Disabled.
VIDEO POWER DOWN MODE
This option specifies the power management state that the video subsystem enters after
the specified period of display inactivity has expired. The settings are Disabled, Standby
or Suspend. The default settings are Disabled.
HARD DISK POWER DOWN MODE
This option specifies the power management state that the hard disk drive enters after the
specified period of display inactivity has expired. The settings are Disabled, Standby, or
Suspend. The default settings are Disabled.
HARD DISK TIME OUT (MINUTE)
This option specifies the duration of hard disk inactivity. When this period expires, the
hard disk drive enters the power-conserving mode specified in the Hard Disk Power
Down Mode option described above. The settings are Disabled, 1 (minutes), and all one
minute intervals up to and including 14. The default settings are Disabled.
STANDBY TIME OUT (MINUTE)
This option specifies the duration of system inactivity when the computer is in Full-On
mode before the computer is placed in Standby mode. In Standby mode, the power use
is reduced. The settings are Disabled, 1 (minutes), and all one minute intervals up to and
including 14. The default settings are Disabled.
SUSPEND TIME OUT (MINUTE)
This option specifies the duration of system inactivity when the computer is already in
Standby mode before the computer is placed in Suspend mode. In Suspend mode, the
power use is minimised. The settings are Disabled, 1 (minute), and all one minute
intervals up to and including 14. The default settings are Disabled.
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DISPLAY ACTIVITY
This option specifies if AMIBIOS is to monitor activity on the display monitor for power
conservation purposes. When this option is set to Monitor and there is no display
activity for the length of time specified in the value in the (full on to) Standby Timeout
(Minute) option, the computer enters a power saving state. The settings are Monitor or
Ignore. The default settings are Ignore.
IRQ 3, 4, 5, 7, 9, 10, 11, 12, 13, 14, 15
These options enable event monitoring. When the computer is in a power saving mode,
activity on the named interrupt request line is monitored by AMIBIOS. When any
activity occurs, the computer enters Full On mode.
Each of these options can be set to Monitor or Ignore. The default settings are Ignore.
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PCI / PLUG AND PLAY SETUP
PLUG AND PLAY AWARE O/S
AMIBIOS only detects and enables PnP ISA adapter cards that are required for system
boot. Set this option to Yes if the operating system installed in the computer is Plug and
Play-aware. Windows 95/98 is PnP-aware. Windows 95/98 detects and enables all other
PnP-aware adapter cards. Set this option to No if the operating system (such as DOS,
OS/2, Windows 3.x) does not use PnP.
Note: You must set this option correctly or PnP-aware adapter cards installed in your
computer will not be configured properly. The settings are No or Yes. The Optimal and
Fail-Safe default settings are No.
PCI LATENCY TIMER (PCI CLOCKS)
This option sets latency of all PCI devices on the PCI bus. The settings are in PCI clock
units. The settings are 32, 64, 96, 128, 160, 192, 224, or 248. The Optimal and
Fail-Safe default settings are 192.
CPU TO PCI WRITE BUFFER
This option enables or disables a 4-layer double word buffer between the CPU and the
PCI bus. When enabled it significantly improves the system performance. The settings
are Disabled or Enabled. The Optimal and Fail-Safe default settings are Enabled.
BYTE MERGE
This option is only available when the CPU to PCI Write Buffer is enabled. It allows
Neutron to use the 32-bit PCI bus more effectively. When enabled, this feature merges
bytes or words to double words. When enabled it improves the system performance in
non-32-bit applications or transfers. The Optimal and Fail-Safe default settings are
Enabled.
FAST BACK TO BACK
This option is only available when the CPU to PCI Write Buffer is enabled. When
enabled, it improves the CPU to Write Buffer performance. The options are Enabled
or Disabled. The Optimal and Fail-Safe default settings are Enabled.
PCI TO DRAM BUFFER
This option enables or disables a 2 line double word buffer to improve the transfer
performance of a PCI master device. The options are Enabled or Disabled. The default
settings are Enabled
DMA CHANNELS 0, 1, 3, 5, 6, 7
These options specify the bus to which the DMA channel is allocated.
The options determine if AMIBIOS should remove a DMA channel from the available
pool passed to BIOS configurable devices. The available pool is determined by reading
the ESCD NVRAM. If more DMA channels must be removed from the pool, the end
user can use these PCI/PnP Setup options to remove the channel by selecting the
ISA/EISA setting. Onboard I/O is configured by AMIBIOS. The DMA channels used
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by onboard I/O are configured as PnP. The options are PnP or ISA/EISA.
The default settings for all channels are PnP in both Optimal and Fail-Safe modes.
IRQ 3, 4, 5, 7, 9, 10, 11, 14, 15
These options specify the bus on which the named interrupt request lines (IRQs) are
used. These options allow you to specify IRQs for use by legacy ISA adapter cards.
The options determine if AMIBIOS should remove an IRQ from the pool of available
IRQs passed to BIOS configurable devices. The available IRQ pool is determined by
reading the ESCD NVRAM. If more IRQs must be removed from the pool, the user can
remove the IRQ by selecting the ISA/EISA setting. Onboard I/O IRQs are configured by
AMIBIOS as PCI/PnP.
The options are PCI/PnP or ISA/EISA. The optimal and fail-safe settings for all
available IRQs are PCI/PnP.
RESERVED MEMORY SIZE
This option specifies the size of the memory area reserved for legacy ISA adapter cards.
The settings are Disabled, 16K, 32K, or 64K. The Optimal and Fail-Safe default settings
are Disabled.
RESERVED MEMORY ADDRESS
This option specifies the starting address (in hex) of the reserved memory area. The
specified ROM memory area is reserved for use by legacy ISA adapter cards.
The settings are C0000, C4000, C8000, CC000, D0000, D4000, D8000, DC000. The
Optimal and Fail-Safe default settings are CC000.
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PERIPHERAL SETUP
ONBOARD FDC
This option enables the floppy drive controller on the PC board. The settings are Auto,
Enabled or Disabled. The default setting is Auto.
ONBOARD SERIAL PORT1
This option enables serial port 1 on the board and specifies the base I/O port address for
serial port 1.
The settings are Auto, 3F8h, 3E8h, 2F8h, 2E8h, or Disabled. The default is Auto.
ONBOARD SERIAL PORT2
This option enables serial port 2 on the board and specifies the base I/O port address.
The settings are Auto, 3F8h, 3E8h, 2F8h, 2E8h, or Disabled. The default is Auto.
ONBOARD PARALLEL PORT
This option enables the parallel port on the board and specifies the base I/O port address.
The settings are Auto, 378h, 278h, 3BCh, or Disabled. The default setting is Auto.
PARALLEL PORT MODE
This option specifies the parallel port mode. ECP and EPP are both bi-directional data
transfer schemes that adhere to the IEEE P1284 specifications. The options are :
SETTINGDESCRIPTION
NormalThe normal parallel port mode is used. This is the default setting.
EPPThe parallel port can be used with devices that adhere to the
Enhanced Parallel Port (EPP) specification. EPP uses the existing
parallel port signals to provide asymmetric bi-directional data transfer
driven by the host device.
ECPThe parallel port can be used with devices that adhere to the
Extended Capabilities Port (ECP) specification. ECP uses the DMA
protocol to achieve transfer rates of approximately 2.5Mbs. ECP
provides symmetric bi-directional communications.
PARALLEL PORT DMA
This option is only available if the setting for the Parallel Port Mode option is ECP.
The settings are 0, 1, or 3. The default setting is 3.
PARALLEL PORT IRQ
Selects which IRQ is assigned to the parallel port. Options are 5 or 7. The default is 7.
ONBOARD IDE
This option specifies the onboard IDE controller channels that will be used. The settings
are Primary, Both or Disabled. The Optimal and Fail-Safe default settings are Primary.
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HARDWARE IO PORT BASE ADDRESS
The NEUTRON has additional IO functions (watchdog timer, three TTL-compatible,
programmable digital input/output lines, and a user-accessible EEPROM). This menu
option specifies the base address of the control registers for these options. The
permissible values are:
100 hex (default) up to 300 hex, and 8000 hex up to 8300 hex, in increments of 100 hex.
EEPROM OR USER IO
The user EEPROM and User IO are mutually exclusive. This option selects one or the
other. The default setting is User IO.
IO LINE 0
This option is only valid if User IO has been selected. It sets the IO line as either an
input or an output. The default setting is as input.
Note that the setting may also be changed under program control (see the section "Using
the Additional IO Functions".
IO LINE 1
This option is only valid if User IO has been selected. It sets the IO line as either an
input or an output. The default setting is as input.
Note that the setting may also be changed under program control (see the section "Using
the Additional IO Functions".
IO LINE 2
This option is only valid if User IO has been selected. It sets the IO line as either an
input or an output. The default setting is as input.
Note that the setting may also be changed under program control (see the section "Using
the Additional IO Functions".
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ADDRESS MAPS
MEMORY MAP
ADDRESS
RANGE
ADDRESS
RANGE
(DECIMAL)
0K –
00000 -
511K
512K –
80000 638K
639K9FC00 -
640K –
A0000 –
799K
800K –
C8000 –
847K
848K –
879K
880K –
D4000 –
DBFFF
DC000 –
895K
896K –
E0000 –
1023K
1024K -
131072K
100000 –
8000000
(HEX)
7FFFF
9FBFF
9FFFF
C7FFF
D3FFF
DFFFF
FFFFF
SIZEDESCRIPTION
512KConventional
127KExtended conventional
1KExtended BIOS Data
(moveable by QEMM, 386MAX)
160KVideo memory and BIOS ( if fitted)
48KAvailable HI DOS memory
(open to ISA and PCI bus)
32KBIOS Extensions
16KSolid State Disk Pages
128KAMI System BIOS
(not available for UMB)
127MExtended Memory
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I/O MAP
The following table lists the I/O addresses used by single board PC devices. Some of these
devices (e.g. graphics) may not be present in all configurations. Some devices (serial ports,
parallel ports etc.) may be configured for various addresses or disabled. These I/O
locations are listed in the Variable Resources column.
00C0 - 00DE31DMA 2
00F01Reset Numeric Error
0100 #1EEPROM and Digital IO Register
0101 #1Watchdog
0102 – 0107 #6Reserved for Board Configuration
0170 - 01778
01F0 - 01F78Primary IDE Channel
0278 - 027B4Parallel Port 2
02E8 - 02EF8Serial Port 4
02F8 - 02FF8Serial Port 2
03761
03771
0378 - 037F8Parallel Port 1
03B0 - 03BB4Video controller
03BC - 03BF4Parallel Port 3
03C0 - 03DF16Video controller
03E8 - 03EF8Serial Port 3
03F0 - 03F56Floppy Channel 1
03F61Pri IDE Chan Cmnd Port
03F7 (Write)1Floppy Chan 1 Cmd
03F7, bit 71 bitFloppy Disk Chg Chan 1
03F7, bits 6:07 bitsPri IDE Chan Status Port
03F8 - 03FF8Serial Port 1
LPT + 400h3ECP regs, LPT base + 400h
04D0 - 04D12Edge/Level INTR Control Reg.
0CF8 - 0CFC*4PCI Config Address Reg.
0CF91Turbo & Reset control Reg.
0CFC - 0CFF4PCI Config Data Register
FFA0 - FFA781ary Bus Master IDE regs
FFA8 - FFAF82ary Bus Master IDE regs
FF00-FF078IDE Bus Master Reg.
SIZE
Bytes
FIXED RESOURCESVARIABLE RESOURCES
2
* only accessible by DWORD accesses.
# alternatively based at 100h boundaries up to and including 300h, or 8000h to 8300h.
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INTERRUPTS & DMA CHANNELS
The following tables list the Interrupt and DMA Channel configuration options for onboard devices. The serial ports, parallel ports, and IDE controller can be configured using
SETUP, or any other Plug and Play resource manager (such as the Windows 95/98 Device
Manager). The Graphics interrupt is assigned by the auto-configure utility during boot up.
IRQRESERVED INTERRUPTS
NMII/O Channel Check
0Interval Timer
1Keyboard buffer full
2Cascade interrupt from slave PIC
3Serial 2 (COM2)
4Serial 1 (COM1)
5Parallel 2 (LPT2)
6Floppy Controller
7Parallel (LPT1)
8Real time clock
9
10
11
12
13Math co-processor
14Primary E-IDE
15
DMARESERVED
0
1
2Floppy
3
4Cascade channel
5
6
7
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USING THE ADDITIONAL IO FUNCTIONS
NEUTRON provides as standard a watchdog timer, and depending upon the BIOS settings,
either three programmable digital input/outputs or a user EEPROM. The board
configuration registers for these functions are located at the IO base address set by the
BIOS. (See “Software Description - BIOS Setup – Peripheral Setup – Hardware IO PortBase Address”).
WATCHDOG TIMER OPERATION
NEUTRON includes a watchdog timer circuit, which may be used to monitor software or
processor hardware failure. The time-out period of the watchdog is fixed at 500
milliseconds. It may be enabled or disabled by using the software interrupt at INT 50h, or
by writing individual bits to the Watchdog Timer Register directly.
The Watchdog Timer Register is located at the IO Base Address +01h. Setting bit 0 of the
register enables the timer. When enabled, the watchdog will generate a hardware reset if it
is not refreshed every 500 msecs or more frequently. Reading the register refreshes the
timer. The data returned by the read operation is not meaningful.
Note that the watchdog is disabled following a power on or a reset sequence.
WATCHDOG TIMER – Base Address +01h
BITFUNCTION
00=Disabled(default), 1=Enabled
When enabled reading the port address
refreshes the watchdog timer.
1-7Reserved
The following code demonstrates the control of the watchdog timer.
ENABLE/DISABLE WATCHDOG
EITHER use the software interrupt as follows:
Calling Registers:AH = 05
AL = 01 to enable, 00 to disable
Perform INT 50h.
Return Registers:AH = 00, and Carry flag is clear if successful
AH = 02, and Carry flag is set if function valid but disabled
AH = FF, and Carry flag set if function failed
OR execute the following code:
mov dx,101h;assumes base address is 100h (the default)
mov al,1h;enable watchdog
out dx,al
mov dx,101h;assumes base address is 100h (the default)
mov al,0h;disable watchdog
out dx,al
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REFRESH WATCHDOG
EITHER use the software interrupt as follows at least once every 500 milliseconds:
Calling Registers:AH = 06
Perform INT 50h
Return Registers:Carry flag clear
OR execute the following code at least once every 500 milliseconds:
mov dx,101h;assumes base address is 100h (the default)
in al, dx;refresh timer
EEPROM ACCESS AND CONTROL
The EEPROM on the NEUTRON unit is a NM93C46 serially programmed device that is
accessed through a single register at IO Base Address +00h. It comprises 128 bytes of
user programmable memory, organised as 64 x 16 bit words. The EEPROM does not have
to be completely erased before writing to a single location.
Access to the EEPROM is by reading and writing individual bits in the control register.
The bits are arranged thus:
EEPROM CONTROL – IO Base Address +00h
BITFUNCTION
0Write – Chip Select
Read – Data
1Write – Clock
Read – N/A
2Write – Data
Read – N/A
3-7Reserved
The EEPROM may be controlled directly by program, or through the BIOS. The BIOS
provides two functions to simplify user access to the EEPROM memory, available through
a software interrupt (INT 50h):
Return Registers:AH = 00, and Carry flag is clear if successful
AH = 02, and Carry flag is set if function valid but disabled
AH = FF, and Carry flag set if function failed
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READ SINGLE EEPROM LOCATION
Calling Registers:AH = 04
BL = Location (0 – 63)
Perform INT 50h
Return Registers:DX = EEPROM Data
AH = 00, and Carry flag is clear if successful
AH = 02, and Carry flag is set if function valid but disabled
AH = FF, and Carry flag set if function failed
PROGRAMMABLE DIGITAL INPUT/OUTPUTS
NEUTRON provides three TTL-compatible programmable digital input/output lines as a
BIOS-selected option. These lines occupy the lower 3 bits of the byte located at the IO
Base Address +00h. They are individually selectable as input or output in the BIOS, or
under program control by writing to the IO Base Address +05h.
IO DIRECTION CONTROL REGISTER - IO Base Address +05h
The inputs are available by a simple read operation at IO Base Address +00h. As inputs,
they are non-inverting, and are pulled high by on-board resistors. Bits 3 to 7 are undefined.
Outputs are available by writing to the same address.
Alternatively the direction control and data may be handled using the software interrupt
function (Int 50h):-
SET USER IO LINE CONTROL
Calling Registers:AH = 17 (hex)
DL (bits 2-0) = IO Line Mask(0=input, 1=output)
Perform INT 50h
Return Registers:Carry Flag is clear, and AH=00 if successful
Carry flag is set, and AH=02 if not enabled in BIOS setup.
WRITE USER IO LINES
Calling Registers:AH = 16 (hex)
DL (bits 2-0) = IO Line data
Perform INT 50h
Return Registers:Carry Flag is clear, and AH=00 if successful
Carry flag is set, and AH=02 if not enabled in BIOS setup.
Carry Flag is clear, and AH=00 if successful
Carry flag is set, and AH=02 if not enabled in BIOS setup.
ACCESSING INT 50H FUNCTIONS
Most high level languages allow access to software interrupts through a particular function
call. The user loads a particular function code into the AH register followed by a specific
set of parameters in the other registers before executing the interrupt.
For example, in C :-
#include <stdio.h>
#include <dos.h>
#define PHOTON 0x50
void main(void)
{
union REGS regs;
regs.x.ax = 0x0400;/* read eeprom data */
regs.x.bx = 0x31;/* from address 0x31 */
int86(PHOTON, ®s, ®s);
printf("EEPROM Address 0x31 contains %x\n",regs.x.dx);
}
and similarly in Quick Basic
'Read EEPROM Data via interrupt 50 call
$include:'QB.BI'
DIM INARY%(7), OUTARY%(7)
CONST AX=0,BX=1,CX=2,DX=3,BP=4,SI=5,DI=6,FL=7
INARY%(AX) = &H0400' Read e2 data
INARY%(BX) = &H31' address &H31
CALL INT86OLD(&H50,INARY%(),OUTARY%())' Call the Int50h service
PRINT "EEPROM ADDRESS &H31 CONTAINS: ";OUTARY%(DX)
Note that only the functions listed in the sections above are valid. On return, the contents
of register AH may contain a value indicating the status:
AH = 00h-Function successful, Carry flag cleared
AH = 01h-Function invalid, Carry flag set
AH = 02h-Function valid but disabled, Carry flag set
AH = 03h-Function failed, Carry flag set
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DISK-ON-CHIP SUPPORT
The NEUTRON supports the use of M-Systems’ DiskOnChip 2000 or DiskOnChip
Millennium Flash Modules as solid-state disks. The notes below detail the use of the device
with MS-DOS. If support is required for other operating systems, please consult Blue Chip
Technology Technical Services, or M-Systems web-site at www.m-sys.com, for drivers and
application notes.
The DiskOnChip 2000 and Millennium contain a built-in copy of the M-Systems industrystandard TrueFFS software, which allows the DiskOnChip to operate as a standard disk
drive. The DiskOnChip may also contain the operating system thereby permitting systems to
boot without a hard disk. The DiskOnChip may also be configured as the boot device in
systems with a hard disk (see the section “Configuring the DiskOnChip as the First Drive”).
The DiskOnChip is a self-contained device, the installation of which does not necessarily
require any software installation. The basic design of the DiskOnChip allows for full upward
and downward compatibility by supporting an unlimited capacity. Future DiskOnChip
devices with higher densities will be fully compatible with today’s capacities of 2 to 288
MBytes, and the standard DiskOnChip socket.
INSTALLING THE DISK-ON-CHIP
Before installing or removing the DiskOnChip, please read the section on Electro-Static
Discharges at the beginning of this manual. It is essential that you discharge any static
electricity from your body before touching the board or DiskOnChip module. Use the
following procedure to install the DiskOnChip:
• Align pin 1 on the DiskOnChip with pin 1 of the socket (adjacent to the battery).
• Push the DiskOnChip into the socket carefully until it is fully seated.
• Check that the DiskOnChip is installed securely, and that there are no bent pins.
Caution: The DiskOnChip may be permanently damaged if installed incorrectly!
To install the DiskOnChip as drive C on a system without a hard disk, set the CMOS setup
of drive C to “not installed” (indicating that no physical magnetic disk is installed), and
reboot the computer. The DiskOnChip will install as drive C. The DiskOnChip should
then be formatted with the System files in order for it to be a bootable drive. See
“Configuring the DiskOnChip as the BOOT device” below.
To install the DiskOnChip as drive D on a system with a hard disk, reboot the system, and
the DiskOnChip will automatically install as drive D.
To install the DiskOnChip as Drive C on a system with a hard disk, see below
“Configuring the DiskOnChip as the First Drive”.
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CONFIGURING THE DISK-ON-CHIP AS THE BOOT DEVICE
To configure the DiskOnChip as the boot device, the operating system files have to be
copied to it. Copying the operating system files into DiskOnChip is done in exactly the
same way as any other hard disk. The following is an example of a typical initialisation
process:
• Set the DiskOnChip as a regular drive in your system (not a boot drive).
• Install a bootable floppy diskette in drive A and boot the system.
• At the DOS prompt, type SYS C: to transfer the DOS system files to the
DiskOnChip (assuming the DiskOnChip is installed as drive C).
• Copy any files needed into the DiskOnChip.
• Remove the floppy diskette and reboot the system.
The system will boot from the DiskOnChip, and will allow you to run and access any files
that have been copied into the DiskOnChip.
CONFIGURING THE DISK-ON-CHIP AS THE FIRST DRIVE
The DiskOnChip can be configured to be installed as the last drive (default), or as the first
drive in the system. When configured as the last drive, the DiskOnChip is installed as disk
D if there is one other hard drive installed, and as drive C if no other hard disk is installed.
When configured as the first drive, the DiskOnChip is always installed as drive C. The
DiskOnChip is shipped from the factory, configured to install as the last drive. To
configure the DiskOnChip to be installed as the first drive, proceed as follows:
• Boot the system and make sure the DiskOnChip is installed correctly as drive D
• At the DOS prompt type: DUPDATE D: /FIRST /S:DOC123.EXB
After re-booting the system, the DiskOnChip will appear as drive C:
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NEUTRON USER MANUALCONNECTORS
CONNECTORS
E-IDE CONNECTOR P1
40-way 2 mm pin header. Mating connector: 40-way 2 mm (IDC) socket.
PIN NOSIGNALPIN NOSIGNAL
1-Reset2Ground
3Data bit 7 (HD)4Data bit 8 (HD)
5Data bit 6 (HD)6Data bit 9 (HD)
7Data bit 5 (HD)8Data bit 10 (HD)
9Data bit 4 (HD)10Data bit 11 (HD)
11Data bit 3 (HD)12Data bit 12 (HD)
13Data bit 2 (HD)14Data bit 13 (HD)
15Data bit 1 (HD)16Data bit 14 (HD)
17Data bit 0 (HD)18Data bit 15 (HD)
19Ground20Not used
21Drive Request22Ground
23-IO Write (HD)24Ground
25-IO Read (HD)26Ground
27Drive Ready28Not Used
29Drive Acknowledge30Ground
31IRQ1432HDIOCS16
33Address 1 (HD)34Not Used
35Address 0 (HD)36Address 2 (HD)
37-Chip Select 0 (HD)38-Chip Select 1 (HD)
39Not Used40Ground
1-Strobe2-Auto Feed XT
3Data bit 04-Error
5Data bit 16-Initialise
7Data bit 28-Select (input)
9Data bit 310Ground
11Data bit 412Ground
13Data bit 514Ground
15Data bit 616Ground
17Data bit 718Ground
19-Acknowledge20Ground
21Busy22Ground
23Paper Empty24Ground
25Select (Output)26NC
(LCD equivalent of SYNC)
19Panel Data 020Ground
21Panel Data 122Panel Data 23
23Panel Data 224Ground
25Panel Data 326Panel Data 22
27Panel Data 428Ground
29Panel Data 530Panel Data 21
31Panel Data 632Ground
33Panel Data 734Panel Data 20
35Panel Data 836Ground
37Panel Data 938Panel Data 19
39Panel Data 1040Ground
41Panel Data 1142Panel Data 18
43Panel Data 1244Ground
45Panel Data 1346Panel Data 17
47Panel Data 1448Ground
49Panel Data 1550Panel Data 16
1Input/Output Line bit 0
2Input/Output Line bit 1
3Input/Output Line bit 2
4Reserved
5Ground
These three IO lines are connected to bits 0-2 of port 100h (default address). Bits 0-2 are
normally high, and can be pulled low by connecting them to ground.
The BIOS performs a Power On Self Test (POST) after a reset or reboot. If errors occur
during the POST, the microprocessor indicates the status of the test by writing codes to the
I/O port at address 80 Hex. If the BIOS cannot find and configure the display controller
then the errors are communicated through a series of audible beeps (by the speaker drive
circuit). Fatal errors, which prevent the system from continuing the boot process, will
produce beep codes.
Other errors are displayed textually. For these see AMIBIOS Error Messages, in the
following subsection.
BEEPSERROR
MESSAGE
1long,
3 short
1Refresh FailureThe memory refresh circuitry on the single board
2Parity ErrorParity is not supported on this product, will not
3Base 64 KB
4Timer Not
5Processor ErrorThe CPU on the single board PC generated an
68042 - Gate A20
7Processor
8Display Memory
9ROM Checksum
10CMOS Shutdown
11Cache Error /
Video failureA connection to a monitor was not detected.
Timer 1 on the single board PC is not functioning.
error.
The keyboard controller (8042) may be bad. The
BIOS cannot switch to protected mode.
The CPU generated an exception interrupt.
System video adapter is either missing or its
memory is faulty. This is not a fatal error.
ROM checksum value does not match the value
encoded in BIOS.
The shutdown register for CMOS RAM failed.
The external cache is faulty.
DESCRIPTION
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AMIBIOS ERROR CODES ON THE POST DISPLAY
As the BIOS performs the POST after a reset or reboot, the microprocessor indicates the
status of the test by writing codes to the I/O port at address 80 Hex. The following codes
indicate the progress of the microprocessor during the power on test.
UNCOMPRESSED INIT CODE CHECKPOINTS
CODE
(HEX)
D0NMI is Disabled. CPU ID saved. Init code Checksum verification starting.
D1To do DMA init, Keyboard controller BAT test, start memory refresh and
going to 4GB flat mode.
D3To start Memory sizing.
D4To come back to real mode. Execute OEM patch. Set stack.
D5E000 ROM enabled. Init code is copied to segment 0 and control to be
transferred to segment 0.
D6Control is in segment 0. To check <CTRL><HOME> key and verify main
BIOS checksum. If either <CTRL><HOME> is pressed or main BIOS
checksum is bad, go to check point E0 else go to check point D7.
D7Main BIOS runtime code is to be decompressed and control to be
passed to main BIOS in shadow RAM.
DESCRIPTION
BOOT BLOCK RECOVERY CODE CHECKPOINTS
CODE
(HEX)
E0On-Board Floppy Controller (if any) is initialised. To start base 512K
memory test.
E1To initialise interrupt vector table.
E2To initialise DMA and interrupt controllers.
E6To enable floppy and timer IRQ, enable internal cache.
EDInitialise floppy drive.
EEStart looking for a diskette in drive A: and read 1st sector of the diskette.
EFFloppy read error.
F0Start searching ‘AMIBOOT.ROM’ file in root directory.
F1‘AMIBOOT.ROM’ file not present in root directory.
F2Start reading FAT table and analyse FAT to find the clusters occupied
by ‘AMIBOOT.ROM’ file..
F3Start reading ‘AMIBOOT.ROM’ file cluster by cluster.
F4‘AMIBOOT.ROM’ file not of proper size.
F5Disable internal cache.
FBDetect Flash type present.
FCErase Flash.
FDProgram Flash.
FFFlash program successful. BIOS is going to restart.
DESCRIPTION
These Checkpoints are only utilised when the NEUTRON is fitted with a Flash BIOS
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RUNTIME CODE
(Uncompressed in F000 shadow RAM)
CODE
DESCRIPTION
(HEX)
03NMI is Disabled. To check soft reset/power-on.
05BIOS stack set. Going to disable Cache if any.
06POST code to be uncompressed.
07CPU init and CPU data area init to be done.
08CMOS checksum calculation to be done next.
0BAny initialisation before keyboard BAT to be done next.
0CKB controller I/B free. To issue the BAT command to keyboard
controller.
0EAny initialisation after KB controller BAT to be done next.
0FKeyboard command byte to be written.
10Going to issue Pin-23,24 blocking/unblocking command.
11Going to check pressing of <INS> , <END> key during power-on.
12To init CMOS if “Init CMOS in every boot” is set or <END> key is
pressed. Going to disable DMA and Interrupt controllers.
13Video display is disabled and port-B is initialised. Chipset init about to
begin.
148254 timer test about to start.
19About to start memory refresh test.
1AMemory Refresh line is toggling. Going to check 15us ON/OFF time.
23To read 8042 input port and disable Megakey GreenPC feature. Make
BIOS code segment writeable.
24To do any setup before Int vector init.
25Interrupt vector initialisation about to begin. To clear password if
necessary.
27Any initialisation before setting video mode to be done.
28Going for monochrome mode and colour mode setting.
2ADifferent BUSes init (system, static, output devices) to start if present.
2BTo give control for any setup required before optional video ROM check.
2CTo look for optional video ROM and give control.
2DTo give control to do any processing after video ROM returns control.
2EIf EGA/VGA not found then do display memory R/W test.
2FEGA/VGA not found. Display memory R/W test about to begin.
30Display memory R/W test passed. About to look for the retrace
checking.
31Display memory R/W test or retrace checking failed. To do alternate
Display memory R/W test.
32Alternate Display memory R/W test passed. To look for the alternate
display retrace checking.
34Video display checking over. Display mode to be set next.
37Display mode set. Going to display the power on message.
38Different BUSes init (input, IPL, general devices) to start if present.
39Display different BUSes initialisation error messages.
3ANew cursor position read and saved. To display the Hit <DEL>
message.
40To prepare the descriptor tables.
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42To enter in virtual mode for memory test.
43To enable interrupts for diagnostics mode.
44To Initialise data to check memory wrap around at 0:0.
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45Data initialised. Going to check for memory wrap around at 0:0 and
finding the total system memory size.
46Memory wrap around test done. Memory size calculation over. About to
go for writing patterns to test memory.
47Pattern to be tested written in extended memory. Going to write
patterns in base 640k memory.
48Patterns written in base memory. Going to find out amount of memory
below 1M memory.
49Amount of memory below 1M found and verified. Going to find out
amount of memory above 1M memory.
4BAmount of memory above 1M found and verified. Check for soft reset
and going to clear memory below 1M for soft reset. (If power on, go to
above 1M.
4DMemory above 1M cleared. (SOFT RESET) Going to save the memory
size. (Go to check point# 52h).
4EMemory test started. (NOT SOFT RESET) About to display the first 64k
memory size.
4FMemory size display started. This will be updated during memory test.
Going for sequential and random memory test.
50Memory testing/initialisation below 1M complete. Going to adjust
displayed memory size for relocation/ shadow.
51Memory size display adjusted due to relocation/ shadow. Memory test
above 1M to follow.
52Memory testing/initialisation above 1M complete. Going to save memory
size information.
53Memory size information is saved. CPU registers are saved. Going to
enter in real mode.
54Shutdown successful, CPU in real mode. Going to disable gate A20 line
and disable parity/NMI.
57A20 address line, parity/NMI disable successful. Going to adjust
memory size depending on relocation/shadow.
58Memory size adjusted for relocation/shadow. Going to clear Hit <DEL>
message.
59Hit <DEL> message cleared. <WAIT...> message displayed. About to
start DMA and interrupt controller test.
60DMA page register test passed. To do DMA#1 base register test.
62DMA#1 base register test passed. To do DMA#2 base register test.
65DMA#2 base register test passed. To program DMA unit 1 and 2.
66DMA unit 1 and 2 programming over. To Initialise 8259 interrupt
controller.
7FExtended NMI sources enabling is in progress.
80Keyboard test started. clearing output buffer, checking for stuck key, to
issue keyboard reset command.
81Kb reset error/stuck key found. To issue kb controller test command.
82Keyboard controller interface test over. To write command byte and init
circular buffer.
83Command byte written, Global data init done. To check for lock-key.
84Lock-key checking over. To check for memory size mismatch with
CMOS.
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85Memory size check done. To display soft error and check for password
or bypass setup.
86Password checked. About to do programming before setup.
87Programming before setup complete. To uncompress SETUP code and
execute CMOS setup.
88Returned from CMOS setup program and screen is cleared. About to
do programming after setup.
89Programming after setup complete. Going to display power on screen
Mouse check and extended BIOS data area allocation to be done.
8CSetup options programming after CMOS setup about to start.
8DGoing for hard disk controller reset.
8FHard disk controller reset done. Floppy setup to be done next.
91Floppy setup complete. Hard disk setup to be done next.
95Init of different BUSes optional ROMs from C800 to start.
96Going to do any init before C800 optional ROM control.
97Any init before C800 optional ROM control is over. Optional ROM check
and control will be done next.
98Optional ROM control is done. About to give control to do any required
processing after optional ROM returns control and enable external
cache.
99Any initialisation required after optional ROM test over. Going to setup
timer data area and printer base address.
9AReturn after setting timer and printer base address. Going to set the
RS-232 base address.
9BReturned after RS-232 base address. Going to do any initialisation
before Coprocessor test
9CRequired initialisation before Coprocessor is over. Going to Initialise the
Coprocessor next.
9DCoprocessor initialised. Going to do any initialisation after Coprocessor
test.
9EInitialisation after Coprocessor test is complete. Going to check extd
keyboard, keyboard ID and num-lock. Keyboard ID command to be
A2Going to display any soft errors.
A3Soft error display complete. Going to set keyboard typematic rate.
A4Keyboard typematic rate set. To program memory wait states.
A5Going to enable parity/NMI.
A7NMI and parity enabled. Going to do any initialisation required before
giving control to optional ROM at E000.
A8Initialisation before E000 ROM control over. E000 ROM to get control
next.
A9Returned from E000 ROM control. Going to do any initialisation
required after E000 optional ROM control.
AAInitialisation after E000 optional ROM control is over. Going to display
the system configuration.
ABTo uncompress DMI data and execute DMI POST init.
B0System configuration is displayed.
B1Going to copy any code to specific area.
00Copying of code to specific area done. Going to give control to INT-19
boot loader.
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AMIBIOS ERROR MESSAGES
Textual error messages are displayed in the following format:
ERROR Message Line 1
ERROR Message Line 2
For most displayed error messages, there is only one message. If a second message
appears, it is "RUN SETUP". If this message occurs, press <F1> to run Setup Utility.
ERROR MESSAGEEXPLANATION
8042 Gate - A20 ErrorGate A20 on the keyboard controller (8042) is not working. Replace
the 8042.
Address Line Short!Error in the address decoding circuitry on the single board PC.
Cache Memory Bad,
Do Not Enable Cache!
CH-2 Timer ErrorMost AT systems include two timers. There is an error in timer 2.
CMOS Battery State
Low
CMOS Checksum
Failure
CMOS System Options
Not Set
CMOS Display Type
Mismatch
CMOS Memory Size
Mismatch
CMOS Time and Date
Not Set
Diskette Boot FailureThe boot disk in floppy drive A: is corrupt. It cannot be used to boot
Display Switch Not
Proper
DMA ErrorError in the DMA controller.
DMA #1 ErrorError in the first DMA channel.
DMA #2 ErrorError in the second DMA channel.
FDD Controller FailureThe BIOS cannot communicate with the floppy disk drive controller.
HDD Controller FailureThe BIOS cannot communicate with the hard disk drive controller.
INTR #1 ErrorInterrupt channel 1 failed POST.
INTR #2 ErrorInterrupt channel 2 failed POST.
Invalid Boot DisketteThe BIOS can read the disk in floppy drive A:, but cannot boot the
Keyboard Is
Locked...Unlock It
Keyboard ErrorThere is a timing problem with the keyboard. Set the Keyboard option
KB/Interface ErrorThere is an error in the keyboard connector.
Off Board Parity ErrorParity error in memory installed in an expansion slot. The format is:
On Board Parity ErrorParity is not supported on this product, this error will not occur.
Parity Error ????Parity error in system memory at an unknown address.
Cache memory is defective. Replace it.
CMOS RAM is powered by a battery. The battery power is low.
Replace the battery.
After CMOS RAM values are saved, a checksum value is generated
for error checking. The previous value is different from the current
value. Run AMIBIOS Setup.
The values stored in CMOS RAM are either corrupt or non-existent.
Run Setup.
The video type in CMOS RAM does not match the type detected by
the BIOS. Run AMIBIOS Setup.
The amount of memory on the single board PC is different than the
amount in CMOS RAM. Run AMIBIOS Setup.
Run Standard CMOS Setup to set the date and time in CMOS RAM.
the system. Use another boot disk and follow the screen instructions.
The display jumper is not implemented on this product, this error will
not occur.
Check all appropriate connections after the system is powered down.
Check all appropriate connections after the system is powered down.
system. Use another boot disk.
The keyboard lock on the system is engaged. The system must be
unlocked to continue.
in Standard CMOS Setup to Not Installed to skip the keyboard POST
routines.
OFF BOARD PARITY ERROR ADDR (HEX) = (XXXX)
Where “XXXX” is the hex address where the error occurred.
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ISA NMI MESSAGES
ISA NMI MESSAGEEXPLANATION
Memory Parity Error at
XXXXX
I/O Card Parity Error
at XXXXX
DMA Bus Time-outA device has driven the bus signal for more than
Memory failed.
If the memory location can be determined, it is displayed
as XXXXX. If not, the message is Memory Parity Error
????.
An expansion card failed.
If the address can be determined, it is displayed as
XXXXX.
If not, the message is I/O Card Parity Error ????.
7.8 microseconds.
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PCI CONFIGURATION ERROR MESSAGES
The following PCI messages are displayed as a group with bus, device and function
information.