SOLO
Single Board PC
User Manual
SOLO
User Manual
Document Part N° 127-191
Document Reference SOLO\..\127-191.doc
Document Issue Level 0.5
Manual covers PCBs with the following Issue 1.x, A.x (x is any
alpha/digit)
All rights reserved. No part of this publication may be reproduced, stored in any retrieval system, or
transmitted, in any form or by any means, electronic, mechanical, photocopied, recorded or otherwise,
without the prior permission, in writing, from the publisher. For permission in the UK contact Blue Chip
Technology.
Information offered in this manual is believed to be correct at the time of printing. Blue Chip
Technology accepts no responsibility for any inaccuracies. The information contained herein is subject
to change without notice. There are no express or implied licences granted herein to any intellectual
property rights of Blue Chip Technology Ltd.
All trademarks and registered names acknowledged.
Blue Chip Technology Ltd.,
Chowley Oak, Tattenhall,
Chester, Cheshire,
CH3 9EX
Telephone : 01829 772000 Facsimile : 01829 772001
Amendment History
Issue
Level
0.1 25/04/97 EGW First Draft Issue
0.2 29/07/97 SEJ Updated modifications
0.3 15/08/97 BH Software section update
0.4 14/10/97 SEJ Amendments see ECN97/114
0.5 04/11/97 SEJ Amendments see ECN 97/126
Issue
Date
Author Amendment Details
CONTENTS
INTRODUCTION ..........................................................................................1
MANUAL OBJECTIVES.................................................................................1
LIMITATIONS OF LIABILITY .......................................................................1
PRECAUTIONS...............................................................................................2
ELECTRO-STATIC DISCHARGES...............................................................2
ON-BOARD BATTERY.................................................................................2
RELATED PUBLICATIONS ...........................................................................3
TRADEMARKS...............................................................................................3
USER GUIDE.................................................................................................4
OVERVIEW.....................................................................................................4
BOARD LEVEL FEATURES .........................................................................5
CPU .............................................................................................................5
PROCESSOR UPGRADE .............................................................................6
SECOND LEVEL CACHE ............................................................................6
SYSTEM MEMORY.......................................................................................6
BUS EXPANSION SLOTS.............................................................................7
ELECTROMAGNETIC COMPATIBILITY.....................................................7
SPECIFICATION.............................................................................................9
HARDWARE DESCRIPTION ....................................................................10
CHIPSET .......................................................................................................10
82439HX XCELERATED CONTROLLER (TXC) ......................................... 10
PCI/ISA IDE XCELERATOR (PIIX3) ...........................................................11
UNIVERSAL SERIAL BUS (USB) ................................................................11
I/O CONTROLLER........................................................................................ 12
IDE SUPPORT ...........................................................................................12
SMC 37C932 SUPER I/O CONTROLLER.....................................................13
FLOPPY CONTROLLER ............................................................................13
KEYBOARD INTERFACE ..........................................................................14
REAL TIME CLOCK, CMOS RAM AND BATTERY .................................... 14
CHIPS & TECHNOLOGY GRAPHICS SUBSYSTEM...................................15
DISPLAY CAPABILITIES...........................................................................15
STANDARD VIDEO MODES......................................................................16
EXTENDED VIDEO MODES..................................................................... 17
HIGH REFRESH VIDEO MODES..............................................................17
FLAT PANEL EXTENDED VIDEO MODES............................................... 18
BIOS.............................................................................................................. 19
SYSTEM SETUP UTILITY ..........................................................................19
PCI SUPPORT............................................................................................19
Blue Chip Technology Ltd. 127-191.doc
CONTENTS
ISA PLUG AND PLAY ................................................................................19
AUTO-CONFIGURATION CAPABILITIES.................................................20
ADVANCED POWER MANAGEMENT .......................................................20
SLEEP MODE SUPPORT...........................................................................21
SECURITY FEATURES ..............................................................................21
VIDEO BIOS..................................................................................................22
CONNECTING AN LCD TO SOLO .............................................................. 22
BACK PANEL CONNECTORS ...................................................................25
ON-BOARD CONNECTORS .......................................................................25
BUS CONNECTORS...................................................................................26
JUMPERS....................................................................................................... 27
CPU FREQUENCY SELECTION J4 & J5...................................................27
ON-BOARD VIDEO J6...............................................................................28
CMOS BATTERY SOURCE (CLEAR CMOS) J1 .........................................29
TABLE OF JUMPERS ................................................................................30
STATUS LEDS............................................................................................32
USER-INSTALLABLE UPGRADES ..............................................................33
SYSTEM MEMORY .....................................................................................33
REAL TIME CLOCK BATTERY REPLACEMENT ......................................34
CPU UPGRADE.........................................................................................34
GRAPHICS MEMORY UPGRADE..............................................................34
SOFTWARE DESCRIPTION...................................................................... 35
BIOS SETUP - PROVISIONAL...................................................................... 35
OVERVIEW OF THE SETUP MENU SCREENS .......................................... 35
MAIN SCREEN ...........................................................................................35
OVERVIEW OF THE SETUP KEYS............................................................38
STANDARD SETUP ....................................................................................39
ADVANCED SYSTEM SETUP ....................................................................41
ADVANCED CHIPSET SETUP ...................................................................46
POWER MANAGEMENT SETUP ............................................................... 48
PCI / PNP SETUP.......................................................................................51
PERIPHERAL SETUP ................................................................................55
SOLID STATE DISK SUPPORT....................................................................58
ADDRESS MAPS........................................................................................... 59
MEMORY MAP........................................................................................... 59
I/O MAP ..................................................................................................... 59
PCI CONFIGURATION SPACE MAP.........................................................61
INTERRUPTS & DMA CHANNELS............................................................63
CONNECTORS..............................................................................................64
BACK PANEL CONNECTORS ...................................................................64
127-191.doc Blue Chip Technology Ltd.
CONTENTS
ECP/EPP PARALLEL PORT P18 TOP (26 WAY HEADER)........................64
ETHERNET UTP CONNECTOR P22 (8 WAY RJ45 ).................................. 66
INTERNAL I/O HEADERS .........................................................................66
FLOPPY DISK DRIVE CONNECTOR P12 (34 WAY HEADER)..................68
POWER CONNECTOR P4 (34 WAY HEADER)..........................................69
BATTERY CONNECTOR P1 (4 WAY HEADER).........................................71
BUS CONNECTORS...................................................................................71
ERROR MESSAGES .....................................................................................75
AMIBIOS ERROR BEEP CODES...............................................................75
AMIBIOS ERROR CODES ON THE POST DISPLAY .................................76
AMIBIOS ERROR MESSAGES...................................................................82
ISA NMI MESSAGES.................................................................................. 84
PCI CONFIGURATION ERROR MESSAGES ............................................. 85
BOARD LAYOUT......................................................................................... 86
Blue Chip Technology Ltd. 127-191.doc
COMPANY PROFILE
COMPANY PROFILE
Blue Chip Technology is the leading specialist PC product manufacturer in
UK/Europe.
Blue Chip Technology provides innovation with quality design and
manufacturing from a single source.
Based in the North West, our purpose built complex contains one of the most
advanced research and development facility, engineering workshop and
production lines.
Specialising in the provision of industrial computing and electronic solutions
for a wide range of UK and European organisations, Blue Chip Technology
has one of the UK's largest portfolios of industrial PCs, peripherals and data
acquisition cards. This extensive range of products, coupled with our
experience and expertise, enables Blue Chip Technology to offer an industrial
processing solution for any application. The SOLO Single Board PC is the
latest addition to our portfolio, providing a cost effective product development
and volume production tool for OEMs.
A unique customisation and specialised system integration service is also
available, delivering innovative solutions to customers problems. The
company's success and reputation in this area has led to a number of large
design and manufacturing projects for companies such as BNFL, Aston
Martin, JaguarSport and British Gas.
British Standards Institute approval (BS EN 9001) means that all of Blue
Chip Technology's design and manufacturing procedures are strictly
controlled, ensuring the highest levels of quality, reliability and performance.
Blue Chip Technology are also committed to the single European market and
continue to invest in the latest technology and skills to provide high
performance computer and electronic solutions for a world-wide customer
base.
127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL INTRODUCTION PAGE 1
INTRODUCTION
MANUAL OBJECTIVES
This manual describes in detail the Blue Chip Technology SOLO Single
Board processor card.
We have tried to include as much information as possible but we have not
duplicated information that is provided in the standard IBM Technical
References, unless it proved to be necessary to aid in the understanding of the
SOLO.
The manual is sectioned and includes a User Guide which will help the non
technical user to get the unit up and running. A Troubleshooting Guide is
also included to help when things go wrong.
We strongly recommend that you study this manual carefully before
attempting to interface with SOLO or change the standard configurations.
Whilst all the necessary information is available in this manual we would
recommend that unless you are confident, you contact your supplier for
guidance.
Please be aware that it is possible to create configurations within the CMOS
RAM that make booting impossible. If this should happen, clear the CMOS
settings, (see the description of the Jumper Settings for details).
If you have any suggestions or find any errors concerning this manual and
want to inform us of these, please contact our Customer Support department
with the relevant details.
LIMITATIONS OF LIABILITY
In no event shall Blue Chip Technology be held liable for any loss, expenses
or damages of any kind whatsoever, whether direct, indirect, incidental or
consequential, arising from the design or use of this product or the support
materials supplied with this product. If this product proves to be defective,
Blue Chip Technology is only obliged to replace or refund the purchase price
at Blue Chip Technology's discretion according to their Terms and
Conditions of Sale.
Blue Chip Technology Ltd. 127-191.doc Page 1
PAGE 2 INTRODUCTION SOLO USER MANUAL
PRECAUTIONS
It is imperative that precautions are taken to avoid electro-static discharges,
or any maltreatment of the on-board battery.
ELECTRO-STATIC DISCHARGES
The devices on this card can be totally destroyed by static electricity.
Ensure that you take necessary static precautions, ideally wear an approved
wrist strap or touch a suitable ground to discharge any static build up. This
should be repeated if the handling is for any length of time.
When carrying the board around, please place it into the non-conductive
bag in which it came. This will prevent any static electricity build up.
ON-BOARD BATTERY
This board is fitted with a Lithium battery. Great care should be taken with
this type of battery. Under NO circumstances should :
• the outputs be shorted
• be exposed to temperatures in excess of 100°C
• be burnt
• be immersed in water
• be unsoldered
• be recharged
• be disassembled
If the battery is mistreated in any way there is a very real possibility of fire,
explosion, and harm.
Page 2 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL INTRODUCTION PAGE 3
RELATED PUBLICATIONS
The following publications will provide useful information related to the
Standard Personal Computer and can be used in conjunction with this
manual.
• IBM Personal Computer AT Technical Reference, 1502494, IBM, 1984.
• IBM Personal System/2 and Personal Computer BIOS Interface Technical
Reference, 15F0306, IBM, 1987.
• The Programmers PC Sourcebook, Microsoft
• The Winn L. Rosch Hardware Bible, Brady
• PC104 Consortium Technical Specification
TRADEMARKS
IBM, PC, AT and PS/2 are trademarks of International Business Machines
Corporation (IBM).
AMI Hi-Flex BIOS is a trademark of American Megatrends Inc.
Intel is a registered trademark of the Intel Corporation.
All 80x86 and Pentium processors are registered trademarks of Intel
Corporation.
MSDOS and WINDOWS are registered trademarks of the Microsoft
Corporation.
PC/104 is a registered trademark of the PC/104 Consortium.
Blue Chip Technology Ltd. 127-191.doc Page 3
PAGE 4 USER GUIDE SOLO USER MANUAL
USER GUIDE
OVERVIEW
The Blue Chip Technology SOLO single board PC sets new standards for
integration of the latest advances in processor, memory, and I/O technologies.
The SOLO complies with the new A5 form factor providing ISA, PCI and
PC/104 bus interfaces on a single card. The A5 PC is an ideal platform for the
increasing requirements of today's and tomorrow's embedded applications.
The flexible design will accept Pentium processors operating at 75, 90, 100,
120, 133, 150, 166 and 200 MHz, including MMX devices. The user may
install 256 KB of asynchronous Cache, or 256 KB or 512 KB of Pipeline
Burst Cache RAM in the form of a COAST (Cache On A STick) Module. The
memory sub-system is designed to support up to 64MB of EDO DRAM (for
improved performance) or standard Fast Page DRAM in standard 72-pin
SIMM sockets. An SPGA socket provides upgrades for future OverDrive
processors.
The SOLO single board PC utilises Intel’s Triton 82430HX PCIset to provide
increased integration and performance over other single board PC designs.
The Triton PCIset contains an integrated PCI Bus Mastering IDE controller
with a high performance IDE interface allowing up to two IDE devices (such
as hard drives, CD-ROM readers, etc.). The SMC 37C932 Super I/O
controller integrates the standard PC I/O functions: floppy interface, two
FIFO serial ports, one EPP/ECP capable parallel port, a Real Time Clock,
keyboard and mouse (PS/2) controller.
The SOLO also provides for driving up to three external ISA 16 bit expansion
slots.
In addition to superior hardware capabilities, a full set of software drivers and
utilities are available to allow advanced operating systems such as
Windows™ 95 to take full advantage of the hardware capabilities. Features
such as bus mastering IDE, Windows™ 95-ready Plug and Play, Advanced
Power Management (APM) are available for the SOLO.
Page 4 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL USER GUIDE PAGE 5
BOARD LEVEL FEATURES
• SPGA socket supporting 75 - 200 MHz operation
• On-board 3.3 V CPU voltage regulator
• Intel Triton 82430 PCISet chipset:
82439HX Xcelerated Controller (TXC)
PIIX3 PCI ISA IDE Accelerator (PIIX3) bridge
• 256KB or 512 KB PipeLine Burst Level 2 cache or 256 KB
Asynchronous Level 2 cache using plug-in COAST connector
• Two SIMM sockets providing up to 64MByte of EDO or FPM
DRAM
• C&T 65545/8 PCI CRT/LCD graphics controller with:
1 MByte standard video memory
• ISA & PC/104 expansion busses
• SMC 37C932 I/O controller providing:
Dual PCI IDE interfaces
Dual floppy interface
EPP/ECP bi-directional parallel interface
• 4 on-board RS232 powered serial ports. One port selectable as
RS422/485.
• Real-time clock with on-board battery
• PS/2 mouse and keyboard connectors
• Optional on-board Solid State Disk - Flash and SRAM
• Optional security microcontroller providing power monitoring and
reset control or magstripe and Dallas Touchkey interfaces
• On-board status LEDs
• Drive for up to 3 ISA or 3 PC/104 cards
CPU
The SOLO single board PC is designed to operate with Pentium Processors
running at 3.3, 3.45 or 3.6 Volts. An on-board voltage regulator circuit
provides the required voltage for the processor from the 5 volt output of a
standard PC power supply. On-board jumpers enable the use of VRT
specified processors. Pentium processors which run internally at 75, 90,
100, 120, 133, 150, 166, 180 and 200 MHz are supported.
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PAGE 6 USER GUIDE SOLO USER MANUAL
The Pentium processor maintains full backward compatibility with the
8086, 80286, i386 and Intel486 processors. It supports both read and
write burst mode bus cycles, and includes separate 8 KB on-chip code and
8 KB data caches which employ a write-back policy. Also integrated into
the Pentium processor is an advanced numeric co-processor which
significantly increases the speed of floating point operations, whilst
maintaining backward compatibility with Intel486 math co-processor and
complying to ANSI/IEEE standard 754-1985.
PROCESSOR UPGRADE
The SOLO single board PC has a 321-pin SPGA socket that provides users
with an OverDrive processor upgrade path. OverDrive processors being
developed for use will provide performance beyond that delivered by the
originally installed Pentium Processor. MMX CPUs are also supported by
SOLO.
SECOND LEVEL CACHE
The Pentium processor's internal cache can be complemented by a second
level cache using the COAST connector. Pipeline Burst SRAM provides
performance similar to expensive Synchronous Burst SRAMs for only a
slight cost premium over the slower performing Asynchronous SRAMs.
With the Triton chipset, the performance level of Pipeline Burst and
Synchronous SRAMs is identical.
SYSTEM MEMORY
The SOLO single board PC provides two 72-pin SIMM sites for memory
expansion. The sockets support 1M x 32 (4 MB), 2M x 32 (8 MB), 4M x 32
(16 MB), and 8M x 32 (32 MB) single-sided or double-sided SIMM
modules. Minimum memory size is 8 MB and maximum memory size,
using two 8M x 32 SIMM modules, is 64MB. Memory timing requires 70
ns fast page devices or, for optimum performance, 60nS EDO DRAM. If
the memory bus speed is 60 MHz or slower (75MHz, 90MHz, 120MHz,
150MHz or 180MHz Pentium Processor speed), 70ns EDO DRAM may be
used. If the memory bus speed is 66 MHz, 60 ns DRAM should be used.
Additionally, 36-bit SIMM modules may be used to provide either standard
parity operation or the parity circuitry can be used by the HX chipset to
provide ECC correction. EDO DRAM is designed to improve DRAM read
performance.
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SOLO USER MANUAL USER GUIDE PAGE 7
The two sockets are arranged in a bank which provides a 64-bit wide data
path. There are no jumper settings required for the memory size or type,
this is automatically detected by the system BIOS.
BUS EXPANSION SLOTS
The SOLO is designed for use in an embedded application and provides
expansion slots. There may be up to three ISA bus expansion cards and
three PC/104 (PC/104 plus) expansion cards.
ELECTROMAGNETIC COMPATIBILITY
This product meets the requirements of the European EMC Directive
(89/336/EEC) and is eligible to bear the CE mark.
It has been assessed operating in a Blue Chip Technology PC. However,
because the board can be installed in a variety of computers, certain
conditions have to be applied to ensure that the compatibility is maintained.
Subject to those conditions, it meets the requirements for an industrial
environment (Class A product).
• The board must be installed in a computer system chassis which
provides screening suitable for an industrial environment.
• Any recommendations made by the computer system
manufacturer/supplier must be complied with regarding earthing and
the installation of boards.
• The board must be installed with the optional backplate securely
screwed to the chassis of the computer to ensure good metal-to-metal
(i.e. earth) contact.
• Most EMC problems are caused by the external cabling to boards. It is
imperative that any external cabling to the board is totally screened, and
that the screen of the cable connects to the metal end bracket of the
board and hence to earth. It is recommended that round screened cables
with a braided wire screen are used in preference to those with a foil
screen and drain wire. Use metal connector shells which connect
around the full circumference of the screen: they are far superior to
those which earth the screen by a simple “pig-tail”.
Blue Chip Technology Ltd. 127-191.doc Page 7
PAGE 8 USER GUIDE SOLO USER MANUAL
• The keyboard will play an important part in the compatibility of the
processor card since it is a port into the board. Similarly, it will affect
the compatibility of the complete system. A fully compatible keyboard
must be used otherwise the complete system could be degraded. The
keyboard itself may radiate or behave as if keys are pressed when subject
to interference. Under these circumstances it may be beneficial to add a
ferrite clamp on the keyboard lead as close as possible to the connector.
A suitable type is the Chomerics type H8FE-1004-AS.
• Ensure that the screens of any external cables are bonded to a good RF
earth at the remote end of the cable.
Failure to observe these recommendations may invalidate the EMC
compliance.
Warning
This is a Class A product. In a domestic environment this
product may cause radio interference in which case the user
may be required to take adequate measures.
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SOLO USER MANUAL USER GUIDE PAGE 9
SPECIFICATION
SOLO Power +5 V ± 5% Required for processor operation.
Requirement +12 V ± 5% Only required with security / monitor
micro-controller option.
+3.3 V ± 5% Not required for board operation.
-5 V ± 5% The ISA, PC104 & PCI voltage
-12 V ± 5% rails are linked, on board.
Typical System
Consumption 35 Watts Pentium 100, 16 MB RAM, 256 KB
L2 cache, 3½" FDD, 540 MB HDD
Temperature Non-Operating -40°C to +70°C
Operating +0°C to +55°C
(min. airflow of 200 lpm)
Shock Non-Operating Half sine, 2ms, 1 m drop
Vibration Non-Operating 5 Hz - 500 Hz, 3.1 g RMS random
Operating 10 Hz - 500 Hz, 1.0 g RMS random
EMC Emissions EN55022 (A)
Immunity EN50082-2 in a Blue Chip ICON
Industrial PC Chassis
MTBF Estimated 40,000 Hrs
Dimensions Board only 338 x 122 mm
Power Consumption figures given are for a typical configuration.
This information is preliminary and is provided only as a guide to
calculating approximate total system power usage when additional
resources are added.
Blue Chip Technology Ltd. 127-191.doc Page 9
PAGE 10 USER GUIDE SOLO USER MANUAL
HARDWARE DESCRIPTION
CHIPSET
The Intel 82430HX PCIset consists of the 82439HX Xcelerated Controller
(TXC) and one 82371SB PCI/ISA IDE Xcelerator (PIIX3) bridge chip.
82439HX XCELERATED CONTROLLER (TXC)
The 82439HX provides all control signals necessary to drive a second level
cache and the DRAM array, including multiplexed address signals. The
TXC also controls access to memory and generates snoop controls to
maintain cache coherency. The TXC comes in a 324-pin BGA package and
includes the following features:
• Microprocessor interface control
• Integrated L2 write-back cache controller
Pipeline burst SRAM
256 KB direct-mapped
• Integrated DRAM controller
64 bit path to memory
Support for EDO and fast page DRAM
Parity and non-parity support
• Fully synchronous PCI bus interface
25/30/33 MHz bus speed
PCI to DRAM > 100 MB/sec
Up to four PCI masters in addition to the PIIX3
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SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 11
PCI/ISA IDE XCELERATOR (PIIX3)
The PIIX3 provides the interface between the on-board PCI and ISA buses
and integrates a dual channel fast IDE interface capable of supporting up to
four devices. The PIIX3 integrates seven DMA channels, one 16-bit
timer/counter, two eight-channel interrupt controllers, PCI-to-AT interrupt
mapping circuitry, NMI logic, ISA refresh address generation, and PCI/ISA
bus arbitration circuitry together onto the same device. The PIIX3 comes in
a 208-pin QFP package and includes the following features.
• Interface between the PCI and ISA buses
• Universal Serial Bus controller
Host/hub controller
• Integrated fast IDE interface
Support for up to four devices
PIO Mode 4 transfers up to 16 MB/sec
Integrated 8 x 32-bit buffer for bus master PCI IDE burst transfers
Bus master mode
• PCI 2.1 compliant
• Enhanced fast DMA controller
• Interrupt controller and steering
• Counters/timers
• SMI interrupt logic and timer with fast on/off mode
UNIVERSAL SERIAL BUS (USB)
The SOLO single board PC features two USB ports as a factory installed
option. The ports permit the direct connection of two USB peripherals
without an external hub. If more devices are required, an external hub can
be connected to either of the built-in ports. The motherboard fully supports
the standard universal host controller interface (UHCI) and uses standard
software drivers that are UHCI-compatible.
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PAGE 12 USER GUIDE SOLO USER MANUAL
Features of the USB include:
• Self-identifying “hot pluggable” peripherals
• Automatic mapping of function to driver and configuration
• Support for isochronous and asynchronous transfer types over the same
set of wires
• Support for up to 127 physical devices
• Guaranteed bandwidth and low latencies appropriate for telephony, audio,
and other applications
• Error handling and fault recovery mechanisms built into protocol
NOTE
Computer systems that have an unshielded cable attached to the USB port
might not meet FCC Class B requirements, even if no device or a low speed
(sub-channel) USB device is attached to the cable. Use shielded cable that
meets the requirements for high speed (fully rated) devices.
I/O CONTROLLER
IDE SUPPORT
The SOLO single board PC provides two independent high performance
bus-mastering PCI IDE interfaces capable of supporting PIO Mode 3 and
Mode 4 devices. The system BIOS supports Logical Block Addressing
(LBA) and Extended Cylinder Head Sector (ECHS) translation modes as
well as AT API (e.g. CD-ROM) devices on both IDE interfaces. Detection
of IDE device transfer rate and translation mode capability is automatically
determined by the system BIOS.
In the Windows™ 95 environment, a driver can allow the IDE interface to
operate as a PCI bus master capable of supporting PIO Mode 4 devices with
transfer rates up to 16MB/sec while minimising the system demands upon
the processor. Normally, programmed I/O operations require a substantial
amount of CPU bandwidth. In true multi-tasking operating systems like
Windows™ 95, the CPU bandwidth freed up by using bus mastering IDE
can be used to complete other tasks while disk transfers are occurring.
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SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 13
Microsoft will provide this driver for Windows™ 95, other software
vendors may make drivers available for other operating systems.
Detailed information on the PCIset is available in the Intel 82430 PCISet
data sheet.
SMC 37C932 SUPER I/O CONTROLLER
Control for the integrated serial ports, parallel port, floppy drive, RTC and
keyboard controller is incorporated into a single component, the SMC
37C932. This component provides:
• Two powered NS16C550-compatible UARTs with send/receive 16
byte FIFO
• Multi-mode bi-directional parallel port
- Standard mode; IBM and Centronics compatible
- Enhanced Parallel Port (EPP) with BIOS/Driver support
- High Speed mode; Extended Capabilities Port (ECP) compatible
• Industry standard floppy controller with 16 byte data FIFO (2.88 MB
floppy support)
• Integrated Real Time Clock
• Integrated 8042 compatible keyboard controller
The 37C932 is normally configured by the BIOS automatically, however
configuration of these interfaces is possible via the CMOS Setup program that
can be invoked during boot-up. The serial ports can be enabled as COM1,
COM2, or disabled. The parallel port can be configured as normal, extended,
EPP/ECP, or disabled. The floppy interface is configurable.
Header connectors located near the top of the board allow cabling to use these
interfaces.
FLOPPY CONTROLLER
The 37C932 is software compatible with the DP8473 and 82077 floppy disk
controllers.
The floppy interface can be configured for 360 KB or 1.2 MB 5¼" media or
for 720 KB, 1.44 MB, or 2.88 MB 3½" media in the BIOS setup. By
default, the Floppy A interface is configured for 1.44 MB and Floppy B is
disabled.
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PAGE 14 USER GUIDE SOLO USER MANUAL
KEYBOARD INTERFACE
PS/2 keyboard/mouse connectors are located on the back panel side of the
single board PC. A field exchangeable fuse protects the 5V lines to these
connectors. Care must be taken to turn off the system power before
installing or removing a keyboard or mouse, otherwise the fuse may
rupture, and result in a return-to-base repair.
The integrated 8042 microcontroller contains the AMI Megakey
keyboard/mouse controller code which, besides providing traditional
keyboard and mouse control functions, supports Power-On/Reset (POR)
password protection. The POR password can be defined by the user in the
Setup program. The keyboard controller also provides the facility for a
<CTRL><ALT><DEL> "hot key" sequence to perform a system software
reset. It performs this by jumping to the beginning of the BIOS code and
running the POST operation.
REAL TIME CLOCK, CMOS RAM AND BATTERY
The integrated Real Time Clock (RTC) is DS1287 and MC146818
compatible and provides a time of day clock, 100-year calendar with alarm
features. The RTC can be set via the BIOS SETUP program. The RTC also
supports 242 bytes of battery-backed CMOS RAM in two banks which is
reserved for BIOS use. The CMOS RAM can be set to specific values or
cleared to the system default values using the BIOS SETUP program. Also,
the CMOS RAM values can be cleared to the system defaults by using a
configuration jumper on the single board PC. The appendix lists the jumper
configurations.
An on-board Lithium battery provides power to the RTC and CMOS
memory. The battery has an estimated lifetime of three years if the board
remains unpowered. When the system is powered up, power is drawn from
the power supply to extend the life of the battery.
SOLO is Year 2000 compliant.
Page 14 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 15
CHIPS & TECHNOLOGY GRAPHICS SUBSYSTEM
The SOLO single board PC is provided with a C&T 6554X graphics
controller with 1 MB of graphics memory. Both CRT and LCD interfaces are
provided. SOLO supports a wide variety of monochrome and colour SinglePanel, Single-Drive (SS) and Dual-Panel, Dual Drive (DD) passive STN and
active matrix TFT/MIM LCD, EL and plasma panels. SOLO supports panel
resolutions of 800x600, 1024x768 and 1280x1024. For monochrome panels,
up to 64 grey scales are supported. Up to 226,981 different colours can be
displayed on passive STN LCDs and up to 16M colours on 24 bit active
matrix LCDs with SOLO.
The 6554X has a 32-bit graphics engine that provides acceleration for scaling
the video display without compromising picture quality or frame rate.
Hardware acceleration for graphics functions such as line draws, System-toscreen and screen-to-screen BitBLTs, ROPs, which optimise performance
operation under Windows™ and other GUI environments.
DISPLAY CAPABILITIES
SOLO can support the following CRT/ LCD resolutions and colours
simultaneously.
CRT MODE MONO LCD DD STN 9 BIT TFT SIMULTANEOUS
RESOLUTION COLOUR GREY
SCALES
320x200 256/256K 61 / 61 256/226,981 256/185,193 Yes
640x480 16/256K 16 / 61 16/226,981 16/185,193 Yes
640x480 256/256K 61 / 61 256/226,981 256/185,193 Yes
800x600 16/256K 16 / 61 16/226,981 16/185,193 Yes
800x600 256/256K 61 / 61 256/226,981 256/185,193 Yes
1024x768 16/256K 16 / 61 16/226,981 16/185,193 Yes
1024x768 256/256K 61 / 61 256/226,981 256/185,193 Yes
1280x1024 16/256K 16 / 61 N/A N/A N/A
Blue Chip Technology Ltd. 127-191.doc Page 15
COLOURS COLOURS DISPLAY
PAGE 16 USER GUIDE SOLO USER MANUAL
STANDARD VIDEO MODES
MODE #
(HEX)
0+,1+ Text 16 40x25
2+,3+ Text 16 80x25
4 Graphics 4 40x25 320x200 31.5 70
5 Graphics 4 40x25 320x200 31.5 70
6 Graphics 2 80x25 640x200 31.5 70
7+ Text Mono 80x25
D Planar 16 40x25 320x200 31.5 70
E Planar 16 80x25 640x200 31.5 70
F Planar Mono 80x25 640x350 31.5 70
10 Planar 16 80x25 640x350 31.5 70
11 Planar 2 80x30 640x480 31.5 70
12 Planar 16 80x30 640x480 31.5 70
13 Packed 256 40x25 320x200 31.5 70
DISPLAY
MODE
COLOURS TEXT
DISPLAY
40x25
40x25
80x25
80x25
80x25
PIXEL
RES
360x400
320x350
320x200
720x400
640x350
640x200
720x400
720x350
H
FREQ
(KHZ)
31.5 70
31.5 70
31.5 70
V
FREQ
(HZ)
Page 16 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 17
EXTENDED VIDEO MODES
MODE #
(HEX)
20 4bit linear 16 80x30 640x480 31.5 60
22 4bit linear 16 100x37 800x600 37.5 60
24 4bit linear 16 128x48 1024x768 48.5 60
24 I 4bit linear 16 128x48 1024x768 35.5 43
28 I 4bit linear 16 1280x1024 35.5 43
30 8bit linear 256 80x30 640x480 31.5 60
32 8bit linear 256 100x37 800x600 37.5 60
34 8bit linear 256 128x48 1024x768 48.5 60
34 I 8bit linear 256 128x48 1024x768 35.5 43
40 15bit linear 32K 80x30 640x480 31.5 60
41 16bit linear 64K 80x30 640x480 31.5 60
50 24bit linear 16M 80x30 640x480 27.1 51.6
60 Text 16 132x25 1056x400 30.5 68
61 Text 16 132x50 1056x400 30.5 68
6A, 70 Planar 16 100x37 800x600 38.0 60
72, 75 Planar 16 128x48 1024x768 48.5 60
72, 75 I Planar 16 128x48 1024x768 35.5 43
76 I Planar 16 1280x1024 35.5 43
78 Packed 16 80x25 640x400 31.5 70
79 Packed 256 80x30 640x480 31.5 60
7C Packed 256 100x37 800x600 37.5 60
7E Packed 256 128x48 1024x768 48.5 60
7E I Packed 256 128x48 1024x768 35.5 43
DISPLAY
MODE
COLOURS TEXT
DISPLAY
PIXEL
RES
H
FREQ
(KHZ)
Note: I denotes interlaced display mode.
V
FREQ
(HZ)
HIGH REFRESH VIDEO MODES
MODE #
(HEX)
12 * Planar 16 80x30 640x480 37.5 75
30 8bit linear 256 80x30 640x480 37.5 75
79 Packed 256 80x30 640x480 37.5 75
6A, 70 Planar 16 100x37 800x600 46.9 75
32 8bit linear 256 100x37 800x600 46.9 75
7C Packed 256 100x37 800x600 46.9 75
Blue Chip Technology Ltd. 127-191.doc Page 17
DISPLAY
MODE
COLOURS TEXT
DISPLAY
PIXEL
RES
H
FREQ
(KHZ)
V
FREQ
(HZ)
PAGE 18 USER GUIDE SOLO USER MANUAL
FLAT PANEL EXTENDED VIDEO MODES
MODE #
(HEX)
20 Linear Packed Pixel 16 640x480 25 MHz
22 Linear Packed Pixel 16 800x600 25 MHz
24 Linear Packed Pixel 16 1024x768 25 MHz
28 Linear Packed Pixel 256 1280x1024 25 MHz
30 Linear Packed Pixel 256 640x480 25 MHz
32 Linear Packed Pixel 256 800x600 25 MHz
34 Linear Packed Pixel 256 1024x768 25 MHz
40 Linear Packed Pixel 32K 110 640x480 50 MHz
41 Linear Packed Pixel 64K 111 640x480 50 MHz
50 Linear Packed Pixel 16M 112 640x480 65 MHz
60 Text (8x16) 16 132x25 25 MHz
61 Text (8x8) 16 132x50 25 MHz
6A / 70 Planar 16 102 800x600 25 MHz
72 / 75 Planar 16 104 1024x768 25 MHz
76 Planar 16 106 1280x1024 25 MHz
79 PackPixel 256 101 640x480 25 MHz
7C PackPixel 256 103 800x600 25 MHz
7E PackPixel 256 105 1024x768 25 MHz
DISPLAY
MODE
COLOURS VESA
MODE
PIXEL
RES
PANEL
CLOCK
Note:
1 Flat panels cannot support Interlaced modes. All modes are Non-
Interlaced. The default panel size is 640x480.
2 The Flat-panel clock value clock value shown is for a 640x480 DD
panel. It may require different clock values for different Flat-panel
resolutions.
3 VESA Modes are no-linear modes. (Linear Addressing is disabled).
Page 18 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 19
BIOS
The SOLO single board PC uses an AMI System BIOS and an C&T Video
BIOS both of which are stored in EPROM. In addition to the System and
Video BIOSes, the EPROM also contains the Setup utility, Power-On Self
Tests (POST), and the PCI auto-configuration utility. This single board PC
supports system BIOS shadowing, allowing the BIOS to execute from 64-bit
on-board write-protected DRAM.
The BIOS displays a sign-on message during POST identifying the type of
BIOS and a revision code.
SYSTEM SETUP UTILITY
The ROM-based Setup utility allows the configuration to be modified
without opening the system for most basic changes. The Setup utility is
accessible only during the Power-On Self Test (POST) by pressing the
<DEL> key after the POST memory test has started and before boot begins.
A prompt may be enabled that informs users to press the <DEL> key to
access Setup.
PCI SUPPORT
The AMI BIOS supports Version 2.0 of the PCI BIOS specification.
Support is also provided for Version 1.0 of the PCI bridge specification.
PCI-to-PCMCIA bridging can also be supported using third party
expansion cards.
ISA PLUG AND PLAY
The AMI BIOS incorporates ISA Plug and Play capabilities as defined by
the Plug and Play Release 1.0A specification (Plug and Play BIOS
Version 1.0A, ESCD Version 1.02). This allows auto-configuration of Plug
and Play ISA cards, and resource management for non-Plug and Play (or
legacy) ISA cards, when used in conjunction with Plug and Play aware
operating systems (such as Windows™ 95).
Blue Chip Technology Ltd. 127-191.doc Page 19
PAGE 20 USER GUIDE SOLO USER MANUAL
AUTO-CONFIGURATION CAPABILITIES
The auto-configuration utility operates in conjunction with the system
Setup utility to allow the insertion and removal of PCI and ISA Plug and
Play cards to the system without user intervention (Plug & Play). When the
system is turned on after adding a PCI or ISA Plug and Play card, the BIOS
automatically configures interrupts, DMA channels, I/O space, and memory
space. The user does not have to configure jumpers or worry about
potential resource conflicts. Because PCI and ISA Plug and Play cards use
the same interrupt resources as ISA cards, the user can specify the
interrupts used by ISA add-in cards in the Setup utility. If using
Windows™ 95, the auto-configuration utility only initialises the devices
required to boot up, Windows™ 95 initialises all the other devices since it
is a Plug and Play aware operating system.
ADVANCED POWER MANAGEMENT
The SOLO AMI BIOS supports power management through System
Management Mode (SMM) interrupts to the CPU and Advanced Power
Management (APM Version 1.1). In general, power management
capabilities will allow the system to be put into a power managed, Stand-by
mode either by entering a user configurable hot-key sequence on the
keyboard, or by the expiration of a hardware timer which detects system
inactivity for a user-configurable time. When in the Stand-by mode, the
SOLO single board PC reduces power consumption by using the power
saving capabilities of the Pentium processor and also running down hard
drives and turning off DPMS compliant monitors. Add-in cards supplied
with APM-aware drivers can also be put into a power managed state for
further energy savings. The ability to respond to external interrupts is fully
maintained while in Stand-by mode, allowing the system to service requests
(such as in-coming Fax’s or network messages) while unattended, albeit
slowly until the system wakes up.
Page 20 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 21
SLEEP MODE SUPPORT
When Advanced Power Management (APM) is activated in the System
BIOS and the Operating System’s APM driver is loaded, Sleep mode
(Stand-By) can be entered in one of three ways.
Sleep/Resume may be activated by using either a momentary-action sleep
switch in the UTILS header, a keyboard hot-key sequence, or by a time-out
of the system inactivity timer. Both the keyboard hot-key and the inactivity
timer are programmable in the BIOS setup (timer is set to 10 minutes by
default). To re-activate the system, or “Resume”, the user simply uses the
keyboard or mouse, or presses the sleep switch. Note that mouse activity
will only “wake up” the system if a mouse driver is loaded. While the
system is in Stand-By or “Sleep” mode it is fully capable of responding to,
and servicing external interrupts, even though the monitor will only turn on
if a user interrupt occurs as mentioned above.
SECURITY FEATURES
SUPERVISOR PASSWORD
If enabled, the supervisor password protects all sensitive Setup options
from being changed by a user unless the password is entered (see
appendix).
If the password is forgotten, it may be cleared by turning off the system
and clearing the CMOS RAM.
USER PASSWORD
The User Password feature provides access to all setup options that do not
require the supervisor password. The User Password feature also
provides security during the boot process. The User Password can be
enabled using the Setup utility. (At boot-up, the system will complete the
operating system boot up process, but keyboard and mouse operation will
be locked until the User Password is entered. See the Security Menu
section of the appendix for more details.)
If the password is forgotten, it can be cleared by turning off the system
and clearing the CMOS RAM..
Blue Chip Technology Ltd. 127-191.doc Page 21
PAGE 22 USER GUIDE SOLO USER MANUAL
VIDEO BIOS
Both System and Video BIOSes are held in a Flash device. As standard the
BIOS shipped will be configured for a 640x480 Dual Scan LCD. If this is not
your chosen target panel then you will possibly need to reprogram the Flash
Video BIOS with an alternative driver. Please see the supplied Video
configuration disk or contact Technical Services at Blue Chip Technology for
further details.
CONNECTING AN LCD TO SOLO
Unfortunately, connecting an LCD panel to a PC is not as simple as it is for a
CRT. At the time of writing this manual there is still no universally accepted
standard interface for LCDs. We strongly recommend that if you in any doubt
about connecting a LCD panel to SOLO you contact our Technical Services
team before you switch on.
For general guidance on the allocation of data bits to the wide variety of panel
types please see the following table.
Page 22 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 23
P11
PIN #
SIGNAL MONO
SS
8 BIT
MONO
DD
8 BIT
MONO
DD
16 BIT
COLOR
TFT
9/12/16
COLOR
TFT
18/24
COLOR
TFT HR
18/24
COLOR
STN SS
8 BIT
COLOR
STN SS
16 BIT
COLOR
STN DD
8 BIT
19 Data 0 UD3 UD7 B0 B0 B00 R1… R1… UR1… UR0…
21 Data 1 UD2 UD6 B1 B1 B01 B1… G1… UG1… UG0…
23 Data 2 UD1 UD5 B2 B2 B02 G2… B1… UB1… UB0…
25 Data 3 UD0 UD4 B3 B3 B03 R3… R2… UR2… UR1…
27 Data 4 LD3 UD3 B4 B4 B10 B3… G2… LR1… LR0…
29 Data 5 LD2 UD2 G0 B5 B11 G4… B2… LG1… LG0…
31 Data 6 LD1 UD1 G1 B6 B12 R5… R3… LB1… LB0…
33 Data 7 LD0 UD0 G2 B7 B13 B5… G3… LR2… LR1…
35 Data 8 P0 LD7 G3 G0 G00 SHCLKU B3… UG1…
37 Data 9 P1 LD6 G4 G1 G01 R4… UB1…
39 Data 10 P2 LD5 G5 G2 G02 G4… UR2…
41 Data 11 P3 LD4 R0 G3 G03 B4… UG2…
43 Data 12 P4 LD3 R1 G4 G10 R5… LG1…
45 Data 13 P5 LD2 R2 G5 G11 G5… LB1…
47 Data 14 P6 LD1 R3 G6 G12 B5… LR2…
49 Data 15 P7 LD0 R4 G7 G13 R6… LG2…
50 Data 16 R0 R00
46 Data 17 R1 R01
42 Data 18 R2 R02
38 Data 19 R3 R03
34 Data 20 R4 R10
30 Data 21 R5 R11
26 Data 22 R6 R12
22 Data 23 R7 R13
11 SHFCLK SHFCLK SHFCLK SHFCLK SHFCLK SHFCLK SHFCLK SHFCLKL SHFCLK SHFCLK SHFCLK
COLOR
STN DD
16 BIT
Blue Chip Technology Ltd. 127-191.doc Page 23
PAGE 24 USER GUIDE SOLO USER MANUAL
In addition the following signals may need connecting to the target LCD
panel:
P11 PIN # SIGNAL DESCRIPTION
1 5/3V3 CRT 10 (AS SET BY J15)
2 VSYNC CRT Vertical Sync
3 Switched +12 volts Power sequenced +12 volts
6 HSYNC CRT Horizontal Sync
7, 9 Switched +5 volts Power sequenced +5 volts
10 General purpose 1
13 LCLK
14 General purpose 2
15 MOD Configured as BLANK# or Display Enable for
17 FLM First Line Marker - LCD equivalent of VSYNC
TFT displays
Always ensure maximum ground connections to the target LCD panel
especially as the clock frequencies rise. P11 pins 4, 8, 12, 16, 18, 20, 24, 28,
32, 36, 40, 44, and 48 are provided as ground pins.
Page 24 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 25
CONNECTORS
A selection of connectors is incorporated on the SOLO PC board. These
provide connectivity to standard external peripherals (monitor, keyboard,
etc.), in-chassis peripherals (disk drives, etc.), and bus devices. A complete
table of the available connectors and their pin-outs is given in the appendices.
The PC board layout at the end of the manual shows their positions.
BACK PANEL CONNECTORS
The back panel provides external access to the CRT, Parallel printer, PS/2
mouse, keyboard, Serial 1 & 2, Ethernet, and dual USB ports. All the
connectors follow the industry standard. The diagram shows the general
location of the connectors.
ON-BOARD CONNECTORS
There are connectors on-board for Floppy Disk Drive, IDE, LCD, Serials 3
& 4, RS422/485, PC/104, ISA, Sound, CD Audio, Supervisory micro and
utilities connector. There are also sockets for SIMMs, COAST (cache),
Flash & SRAM Solid State Disks and external battery.
In addition, connectors provide for:
• Power supply connection
• On-board programming of the EPLD. This is for manufacture only,
and is not a user connection.
UTILITY CONNECTOR
The SOLO PC board provides connectors to support functions which
would normally be located within the enclosure, and also duplicate
connections for some of the external interfaces (System Speaker, System
Reset Switch, Keyboard, Power LED Hard Drive Activity LED, and an
External Battery).
SPEAKER
No on-board Piezo speaker is provided. An off-board speaker may be
connected to the header (P16 pins 1 & 2). The speaker provides error
beep code information during the Power-On Self Test if the system
cannot use the video interface.
Blue Chip Technology Ltd. 127-191.doc Page 25
PAGE 26 USER GUIDE SOLO USER MANUAL
RESET
Two pins of header P16 (pins 3 & 4) may be connected to a momentary
normally open SPST switch. When the switch is closed, the system will
perform a hard reset and run the POST.
IDE LED
Two pins of header P16 (pins 13 & 14) may be connected to an LED to
provide a light when an IDE hard drive connected to the on-board IDE
controller is active.
BUS CONNECTORS
The board incorporates the standard PC/AT 16-bit ISA and PC/104 bus
connectors for expansion. See the appendices for the pin-out details.
Page 26 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 27
JUMPERS
Jumpers are used on the board to select various options. Some of the jumpers
are factory set to suit particular semiconductor options. These must not be
disturbed, or damage to the board may ensue. Refer to the board layout
drawing at the end of the manual for the positions of the various jumpers.
CPU FREQUENCY SELECTION J4 & J5
The external CPU bus operates at frequencies of 50, 60 and 66 MHz but is
scaled up internally giving a range of CPU frequencies of 75 to 166 MHz.
There are four links (in two locations) involved in CPU frequency selection:
J4 and J5. Link J4 selects the host CPU operating frequency of 50, 60 and
66 MHz. Link J5 selects the clock scaling (multiplying) factor.
Link J5 is latched by the CPU on reset and used to configure the CPU phase
locked loop oscillator. This allows higher speed processors to be clocked
down (e.g. running a P133 as a P100), but over clocking processors is not
recommended as it will degrade the reliability of the device over time. Note
also that there are internal differences between each of the CPU types, i.e.
there are register differences between a P100 and a P133, it is not simply
silicon grading as was the case for 486 type CPUs.
INTERNAL CPU CLOCK SPEED J5
These jumpers sets the internal CPU clock speed to either 1½, 2, 2½ or
3 times that of the external CPU clock speed. These jumpers should be
configured depending on the speed of the processor.
CPU CLOCK
MULTIPLIER
1.5 x Open Open
2 x Open Link
2.5 x Link Link
3 x Link Open
Blue Chip Technology Ltd. 127-191.doc Page 27
PAIR
A
PAIR
B
PAGE 28 USER GUIDE SOLO USER MANUAL
EXTERNAL CPU CLOCK SPEED J4
This jumper block sets the CPU's external operating frequency to memory
at 50, 60, or 66 MHz. The default setting depends on the specific memory
and type of Pentium processor installed. It is used in conjunction with
J5.
EXTERNAL
BUS FREQ.
50 MHz Link Link
60 MHz Link Open
66 MHz Open Link
Reserved Open Open
PAIR
A
PAIR
B
SUMMARY OF LINK SETTINGS
CPU
CORE
SPEED
(MHZ)
75 50 25 1.5 Open Open Link Link
90 60 30 1.5 Open Open Link Open
100 66 33 1.5 Open Open Open Link
120 60 30 2 Open Link Link Open
133 66 33 2 Open Link Open Link
150 60 30 2.5 Link Link Link Open
166 66 33 2.5 Link Link Open Link
HOST
BUS
SPEED
(MHZ)
PCI
BUS
SPEED
(MHZ)
HOST
CLK
SCALING
FACTOR
J5
A
J5
B
J4
A
J4
B
ON-BOARD VIDEO J6
The SOLO is equipped with a link (J6) to allow the user to disable the onboard video when external video adapters are being used. If a PCI video
adapter is fitted into a system, the on-board video will be automatically
disabled without having to fit a jumper on J6.
J6 must be fitted when using ISA based VGA adapter boards in a SOLO
based system.
Page 28 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 29
CMOS BATTERY SOURCE (CLEAR CMOS) J1
This jumper is used to clear the CMOS RAM in the event that the contents
become corrupt. It selects the source of backup power to the CMOS RAM,
and also allows the CMOS to be cleared down to the default settings.
Fitting the link to the “CLR” position with the power off, allows on-board
capacitors to discharge and will reset the CMOS memory. The jumper
should then be returned to the “NORM” position to restore normal
operation.
Blue Chip Technology Ltd. 127-191.doc Page 29
PAGE 30 USER GUIDE SOLO USER MANUAL
TABLE OF JUMPERS
JUMPER AREA OF INFLUENCE LINK ACTION
J1 CMOS Battery Support None
J2 CPU Core Voltage Select None
J3 CPU I/O Voltage Select
(3 links)
J4 Select External Bus Frequency.
Use in conjunction with J1
J5 Selects the internal CPU clock
speed.
Use in conjunction with J11
J6 On-board video select None
J7 Serial Port 2 mode selection None
J8 Serial Port 2 pin 9 selection 5
J9 Serial Port 1 pin 9 selection 5
J10 Serial Port 3 pin 9 selection 5
J11 Serial Port 2 mode of operation 232
CLR
NORM
2.9
3.3
3.45
3.6
VRT
STD
A B
L L
L O
O L
O O
A B
O O
O L
L L
L O
Link
Link
12
24
RI
12
24
RI
12
24
RI
FUL
HLF
Not Allowed
Clear CMOS RAM
Use on-board battery
Not Allowed
2V9 CPU core
3V3 CPU core
3V45 CPU core
3V6 CPU core
VRT CPU
Standard CPU
External Bus Frequency
50 MHz
60 MHz
66 MHz
Reserved
(External CPU speed)
x 1.5
x 2
x 2.5
x 3
Enabled
Disabled
RS485 Full Duplex selected
RS485 Half Duplex selected
+5 volts fed to pin 9 of D type
+12 volts fed to pin 9 of D type
+24 volts fed to pin 9 of D type *
Ringing Indicator fed to pin 9 of
D type
+5 volts fed to pin 9 of D type
+12 volts fed to pin 9 of D type
+24 volts fed to pin 9 of D type *
Ringing Indicator fed to pin 9 of
D type
+5 volts fed to pin 9 of D type
+12 volts fed to pin 9 of D type
+24 volts fed to pin 9 of D type *
Ringing Indicator fed to pin 9 of
D type
RS232 selected
RS422/485 Full duplex selected
RS485 Half duplex selected
Page 30 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 31
J12 Serial Port 4 pin 9 selection 5
12
24
J13 VEE output voltage polarity 1-2
2-3
J14 VEE Control Voltage Connect a 50K potentiometer
J15 5V/3V3 Panel Voltage 3V35VFitted for 3V LCD panels
+5 volts fed to pin 9 of D type
+12 volts fed to pin 9 of D type
+24 volts fed to pin 9 of D type *
RI
Ringing Indicator fed to pin 9 of
D type
-ve voltage
+ve voltage
with the wiper on pin 2 to vary
voltage between 8 and 50 volts
Fitted for 5V LCD panels
In the table “L” indicates the presence of a link, “O” the absence.
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PAGE 32 USER GUIDE SOLO USER MANUAL
STATUS LEDS
Along the top edge of the PCB on the reverse side is a row of LEDs. These
are arranged in groups to indicate the status of various board functions:
P.O.S.T. DISPLAY
Red LEDs LSB to MSB inclusive display the Power On Self Test (POST)
data byte. The LED is illuminated when the POST data bit is 1. See the
Appendix for details of the error codes.
POWER SUPPLY INDICATORS
Five green LEDs marked +3, +5, +12, -12 & -5 adjacent to the power
connector show the presence of the power supplies. Each LED is
illuminated when the appropriate voltage is present.
IDE ACTIVITY DISPLAY
The Yellow LED marked SL indicates primary IDE activity (Hard disk or
CD-ROM) and is illuminated when active.
SYSTEM RESET STATUS
The Red LED marked RST indicates the system reset status. The LED is
illuminated when in held in reset.
MONITOR MICROCONTROLLER STATUS
The Yellow LED marked MF indicates the status of the monitor
microcontroller (if fitted). The LED is illuminated when a fault
condition has occurred.
WATCHDOG TIMER STATUS
The Yellow LED marked WD indicates the watchdog time out status.
The LED is illuminated when a timeout has occurred.
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SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 33
USER-INSTALLABLE UPGRADES
SYSTEM MEMORY
The table shows the possible memory combinations. SOLO will support
both Fast Page DRAM or EDO DRAM SIMMs, but they cannot be mixed
within the same memory bank. Parity generation and detection are
supported, and Error Correction can be invoked when using parity SIMMs
(x36). See BIOS Setup options.
SIMM requirements are 70ns Fast Page Mode or 60nS EDO DRAM (70 ns
EDO may be used with a 60 MHz or slower external CPU clock) with tinlead connectors.
SIMM 1,2 (BANK A)
SIMM TYPE (AMOUNT)
1M X 32 (4 MB) 8 MB
2M X 32 (8 MB) 16 MB
4M X 32 (16 MB) 32 MB
8M X 32 (32 MB) 64 MB
TOTAL SYSTEM
MEMORY
Note: SIMMs may be parity (x 36) or non-parity (x 32)
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PAGE 34 USER GUIDE SOLO USER MANUAL
EDO DRAM
Extended Data Out (or Hyper Page) DRAM is designed to improve the
DRAM read performance. EDO DRAM holds the memory data valid
until the next CAS# falling edge, unlike standard fast page mode DRAM
which tri-states the memory data when CAS# negates to precharge for
the next cycle. With EDO, the CAS# precharge overlaps the data valid
time, allowing CAS# to negate earlier while still satisfying the memory
data valid window time.
REAL TIME CLOCK BATTERY REPLACEMENT
The on-board battery may be replaced using a Varta CR2032 Li-Mn 3 volt
button cell, or equivalent.
CPU UPGRADE
A SPGA socket provides users with a performance upgrade path to the
Pentium Overdrive Processors.
GRAPHICS MEMORY UPGRADE
The SOLO single board PC has 1 MB of Fast Page DRAM installed for
graphics. No expansion is available.
Page 34 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL ERROR MESSAGES PAGE 35
SOFTWARE DESCRIPTION
BIOS SETUP - PROVISIONAL
This section details the BIOS CMOS Setup Utility. The parameters described
below are based on BIOS version 1.00; other BIOS versions may differ from
the description below as new features are added.
OVERVIEW OF THE SETUP MENU SCREENS
The Setup program initially displays the Main menu screen. In each screen
there are options for modifying the system configuration. Select a sub-menu
screen by pressing the up <↑> or down <↓> arrow keys, followed by <Enter>.
Within the menu use the up <↑> or down <↓> keys to select an item, then use
<PgUp> or <PgDn> to modify it. For certain items, pressing <Enter> will
bring up a subscreen. After you have selected an item, use the <PgUp> or
<PgDn> keys to modify the setting.
MAIN SCREEN
Shows the following menu:
Standard Setup
Advanced CMOS Setup
Advanced Chipset Setup
Power Management Setup
PCI / PnP Setup
Peripheral Setup
Auto Detect Hard Disk
Change User Password
Change Supervisor Password
Auto Configuration with Optimal Settings
Auto Configuration with Fail Safe Settings
Save Settings and Exit
Exit without Saving
Blue Chip Technology Ltd. 127-191.doc Page 35
PAGE 36 ERROR MESSAGES SOLO USER MANUAL
Their operation is as follows:
STANDARD SETUP
For setting up and modifying basic items such as floppy disk drives, hard
drives, and system time & date.
ADVANCED CMOS SETUP
For modifying the more advanced features of the PC (e.g. system bootup
options).
ADVANCED CHIPSET SETUP
For modifying hardware level options.
POWER MANAGEMENT SETUP
For specifying the “Green PC” features such as IDE and VGA timeouts.
PCI / PNP SETUP
For specifying Plug and Play options (e.g. IRQ assignments).
PERIPHERAL SETUP
For specifying the system peripheral options such as serial and parallel
port modes.
AUTO DETECT HARD DISK
Automatically determines the parameters of any IDE devices connected,
and sets up the parameters for “USER DEFINED” drives.
CHANGE USER PASSWORD
Allows the password for the user level options to be set or changed. This
option cannot be changed unless a supervisor password has been set.
CHANGE SUPERVISOR PASSWORD
Allows the password for the supervisor level options to be changed.
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AUTO CONFIGURATION WITH OPTIMAL SETTINGS
Resets the CMOS setup options to a high performance configuration. The
optimal default settings are best case values and should optimise the
system performance. If CMOS RAM is corrupted, the optimal settings
are loaded automatically.
AUTO CONFIGURATION WITH FAIL SAFE SETTINGS
Resets the CMOS setup options to a lower performance but guaranteed
working configuration. The fail safe settings provide far from optimal
system performance, but are the most stable settings. Use these settings
as an diagnostics aid if the system is performing erratically.
SAVE SETTINGS AND EXIT
When selected, this allows you to save the change to CMOS and exit the
Setup program. You can also press the <F10> key anywhere in the Setup
program to do this.
EXIT WITHOUT SAVING
When selected, this allows you to exit the Setup program without saving
any changes. This means that any changes made while in the Setup
program will be discarded and NOT SAVED. Pressing the <Esc> key in
any of the four main screens will do this.
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OVERVIEW OF THE SETUP KEYS
SETUP KEY DESCRIPTION
<F1> Pressing the <F1> key brings up a help screen for the currently
<Esc> Pressing the <Esc> key takes you back to the previous screen.
<PgUp>
<PgDn>
<↑> Pressing the up <↑> key changes the selection to the previous item or
<↓> Pressing the down <↓> key changes the selection the to the next item
<←> <→> Pressing the left <←> or right <→> keys in the Main, Advanced,
<F5> Pressing the <F5> key allows you to Load Setup Defaults (see later in
<F6> Pressing the <F6> key allows you to Discard Changes (see later in this
<F10> Pressing the <F10> key allows you to Exit Saving Changes (see later
selected item.
Pressing it in the Main, Advanced, Security, or Exit screen allows you
to Exit Discarding Changes (see later in this chapter).
Pressing either key moves the selection of the current item up or down
the available options.
option.
or option.
Security, or Exit menu screens changes the menu screen. Pressing
either key in a subscreen does nothing.
this chapter).
chapter).
in this chapter).
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STANDARD SETUP
This section describes the Setup options found on the standard setup screen.
SYSTEM DATE
When selected, this allows you to set the current date by specifying a
date, month and year.
SYSTEM TIME
When selected, this allows you to set the current time by entering values
for hours, minutes and seconds..
FLOPPY A: TYPE
When selected, this allows you to cycle through the available options to
specify the physical size and capacity of the diskette drive. The options
are Disabled; 360 KB, 5.25-inch; 1.2 MB, 5.25-inch; 720 KB, 3.5-inch;
1.44/1.25 MB, 3.5-inch; 2.88 MB, 3.5-inch. The default is 1.44 MB, 3.5inch.
FLOPPY B: TYPE
When selected, this allows you to cycle through the available options to
specify the physical size and capacity of the diskette drive. The options
are Disabled, 360 KB, 5.25-inch; 1.2 MB, 5.25-inch; 720 KB, 3.5-inch;
1.44/1.25 MB, 3.5-inch; 2.88 MB, 3.5-inch. The default is Disabled.
PRIMARY IDE MASTER
This reports if a primary master IDE hard disk is connected to the system
and allows for the configuration of drive parameters.
When selected, this allows the manual configuration of the hard drive or
have the system auto configure it. The options are Auto Configured, User
Definable and Disabled. There are also options for IDE CD-ROM and
46 predefined hard drive types. If you select User Definable then the
Number of Cylinders, Number of Heads, and Number of Sectors can each
be modified. The default for this is “Auto”.
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PRIMARY IDE SLAVE
This reports if a primary slave IDE hard disk is connected to the system.
It is configured exactly as described under Primary IDE Master above.
The default is “Not Installed”.
SECONDARY IDE MASTER
This reports if a secondary master IDE hard disk is connected to the
system. It is configured exactly as described under Primary IDE Master
above. The default is “Not Installed”.
SECONDARY IDE SLAVE
This reports if a secondary slave IDE hard disk is connected to the
system. It is configured exactly as described under Primary IDE Master
above. The default is “Not Installed”.
NUMBER OF CYLINDERS
If Hard Disk Type is set to User Definable, you must type the correct
number of cylinders for your hard disk. If Hard Disk Type is set to Auto
Configured, this reports the number of cylinders for your hard disk and
cannot be modified.
NUMBER OF HEADS
If Hard Disk Type is set to User Definable, you must type the correct
number of heads for your hard disk. If Hard Disk Type is set to Auto
Configured, this reports the number of heads for your hard disk and
cannot be modified.
NUMBER OF SECTORS
If Hard Disk Type is set to User Definable, you must type the correct
number of sectors for your hard disk. If Hard Disk Type is set to Auto
Configured, this reports the number of sectors for your hard disk and
cannot be modified.
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ADVANCED SYSTEM SETUP
QUICK BOOT
Set this option to “Enabled “ to instruct the BIOS to boot quickly.
If set to “Enabled” the BIOS does not test memory above 1 MB and the
BIOS does not wait up to 40 seconds for a READY signal from the hard
drive. If the READY signal is not received immediately from the IDE
drive, it is not configured (as if it was absent). The default is “Disabled”.
BOOTUP SEQUENCE
This option specifies the sequence of the boot drives. The options are:
1st Boot Device
2nd Boot Device
3rd Boot Device
Each of these options can be set to boot from the following list of
peripherals.
Disabled - On selection SOLO no boot device will be sought.
IDE-0 - On selection SOLO will attempt to boot from the
attached first physical (E-) IDE drive.
IDE-1 - On selection SOLO will attempt to boot from the
attached second physical (E-) IDE drive.
IDE-2 - On selection SOLO will attempt to boot from the
attached third physical (E-) IDE drive.
IDE-3 - On selection SOLO will attempt to boot from the
attached fourth physical (E-) IDE drive.
Floppy - On selection SOLO will attempt to boot from the
attached floppy drive. Capacities from 360KB to 2.88MB are
supported.
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Floptical - On selection SOLO will attempt to boot from the
attached LS120 optical drive
CDROM - On selection SOLO will attempt to boot from the
attached IDE CDROM drive.
SCSI - On selection SOLO will attempt to boot from the SCSI
Boot ROM fitted on your host SCSI adapter.
Network - On selection SOLO will boot from the on-board
Ethernet Boot ROM, where fitted.
The default setting is:
1st Boot Device - Floppy
2nd Boot Device - IDE-0
3rd Boot Device - Disabled
S.M.A.R.T HARD DRIVES
This option allows the selection of SMART drive technology for the
attached hard disks. The Options are Enabled or Disabled. The default is
‘Disabled’.
BOOT CPU SPEED
Allows the system’s boot speed to be set. The options are “Low” and
“High”. The optimal setting is “High”, the fail-safe is “Low”. If High is
selected, boot-up occurs at full speed. If Low is selected, the board
operates at a slower speed (approximately equivalent to 25 MHz PC-AT).
BOOT UP NUM LOCK
Allows you to set the start up state of “Num Lock” on your keyboard. The
options are “On” and “Off”. The default is On.
FLOPPY DRIVE SWAP
Set this option to “Enabled” to permit the BIOS to swap drives A: and B:.
The available options are “Enabled” and “Disabled”. The default setting
is disabled.
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FLOPPY DRIVE SEEK
Set this option to specify floppy drive A: will perform a seek operation on
system boot. are “Enabled” and “Disabled”. The default setting is
disabled.
MOUSE SUPPORT
When this option is enabled the BIOS will support a PS/2 style mouse.
The options are “Enabled” and “Disabled”. The default setting is
enabled.
SYSTEM KEYBOARD
This option specifies that a keyboard is attached to the computer. The
settings are Present or Absent. The Optimal and Fail-Safe default
settings are Present.
PRIMARY DISPLAY
This option specifies the type of display monitor and adapter in the
computer. The settings are Mono, CGA40, CGA80, EGA/VGA, or
Absent. The Optimal and Fail-Safe default settings are EGA/VGA.
PASSWORD CHECK
This option enables password checking every time the computer is
powered on or every time Setup is executed. If Always is chosen, a user
password prompt appears every time the computer is turned on. If Setup
is chosen, the password prompt appears if Setup is executed.
BOOT TO OS/2
Set this option to Yes to permit AMIBIOS to run with IBM OS/2. The
settings are Yes or No. The default setting is No.
WAIT FOR F1 IF ERROR
AMIBIOS POST error messages are followed by:
Press <F1> to continue
If this option is set to Disabled, AMIBIOS does not wait for you to press
the <F1> key after an error message. The settings are Disabled or
Enabled. The Optimal and Fail-Safe default settings are Enabled.
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HIT DEL MESSAGE DISPLAY
Set this option to Disabled to prevent
Hit <DEL> if you want to run Setup
from appearing on the first AMIBIOS screen when the computer boots.
The settings are Disabled or Enabled. The Optimal and Fail-Safe default
settings are Enabled.
INTERNAL CACHE
This option specifies the caching algorithm used for L1 internal cache
memory. The settings are :
SETTING DESCRIPTION
Disabled Neither L1 internal cache memory on the CPU or L2 secondary
WriteBack
(default)
WriteThru Use the write through caching algorithm
cache memory is disabled
Use the write-back caching algorithm
EXTERNAL CACHE
This option specifies the caching algorithm used for L2 secondary
(external) cache memory. The settings are :
SETTING DESCRIPTION
Disabled L2 cache is disabled
WriteBack L2 cache is write back.
WriteThru L2 cache is write through
SYSTEM BIOS SHADOW CACHEABLE
When this option is set to Enabled, the contents of the F0000h system
memory segment can be read from or written to L2 secondary cache
memory. The contents of the F0000h memory segment are always copied
from the BIOS ROM to system RAM for faster execution.
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The settings are Enabled or Disabled. The Optimal default setting is
Enabled. The Fail-Safe default is Disabled. Default is Enabled.
C000, 16K Shadow
C400, 16K Shadow
C800, 16K Shadow
CC00, 16K Shadow
D000, 16K Shadow
D400, 16K Shadow
D800, 16K Shadow
DC00, 16K Shadow
These options control the location of the contents of the 16KB blocks of
ROM beginning at the specified memory location. If no adapter ROM is
using the named ROM area, this area is made available to the local bus.
The settings are :
SETTING DESCRIPTION
Enabled The contents of C0000h - C3FFFh are written to the same
Cache The contents of the named ROM area are written to the same
Disabled The video ROM is not copied to RAM. The contents of the video
address in system memory (RAM) for faster execution.
address in system memory (RAM) for faster execution, if an
adapter ROM will be using the named ROM area. Also, the
contents of the RAM area can be read from and written to cache
memory.
ROM cannot be read from or written to cache memory.
The default setting is Cache for C000 and C400; disabled for the
remainder.
In the AMIBIOS for the Intel Triton chipset, the E000h page is used as
ROM during POST, but shadowing is disabled and the ROM CS# signal
is disabled to make the E000h page available on the local bus.
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ADVANCED CHIPSET SETUP
USB FUNCTION
This option controls the operation of the USB ports on SOLO. The
options are Enabled or Disabled. The default is ‘Enabled’, the fail-safe
default is ‘Disabled’.
USB KEYBOARD/MOUSE LEGACY SUPPORT
This option allows the Triton chipset to emulate a standard 8042
interface for the keyboard and mouse functions when the operating
environment does not support the USB keyboard and mouse functions
directly. The settings are Enabled and Disabled. The default is ‘Enabled’.
USB PASSIVE RELEASE ENABLE
This option controls the USB passive release function on SOLO. The
settings are Enabled or Disabled. The default and fail-safe settings are
‘Enabled’.
GLOBAL TRITON 2 ENABLE
This option controls the enhanced functions of the Intel Triton II chipset.
The settings are Enabled or Disabled. The default and fail-safe settings
are ‘Enabled’.
MEMORY HOLE
Use this option to specify an area in memory that cannot be addressed on
the ISA bus. The settings are Disabled, 512-640K or 15-16MB. The
default setting is ‘Disabled’.
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DRAM TIMINGS
Specify the RAS access speed of the SIMMs installed in SOLO as system
memory. The settings are 60nS, 70nS and Manual. The default is 70nS.
Caution
If you have installed SIMMs with different speeds in SOLO, select the
speed of the slowest SIMM. You must always use SIMMs that have
the same speed.
IRQ12/M MOUSE FUNCTION
Set this option to Enabled to specify that IRQ12 will be used for the
mouse. The settings are Disabled or Enabled. The Optimal and FailSafe default settings are Enabled.
8-BIT I/O RECOVERY TIME (SYSCLK)
This option specifies the length of the delay (in units of SYSCLKs)
inserted between consecutive 8-bit I/O operations. The settings are
1,2,3,4,5,6,7, or 8. the Optimal and Fail-Safe default settings are 8.
16-BIT I/O RECOVERY TIME (SYSCLK)
This option specifies the length of the delay (in SYSCLKs) inserted
between consecutive 16-bit I/O operations. The settings are 1,2,3,4,5,6,7
or 8. The Optimal and Fail-Safe default settings are 4.
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POWER MANAGEMENT SETUP
POWER MANAGEMENT / APM
Set this option to Enabled to enable the power management and APM
(advanced Power Management) features.
The settings are Enabled, Disabled or Inst-On. The default settings are
Disabled.
INSTANT ON SUPPORT
If this option is set in Power Management / APM it allows the computer
to go to full power on mode when leaving a power-conserving state.
AMIBIOS uses the RTC Alarm function to wake the computer at a prespecified time. The settings are 1 to 14 minutes, or Disabled. The
default settings are Disabled.
GREEN PC MONITOR POWER STATE
This option specifies the power management state that the Green PCcompliant video monitor enters after the specified period of display
inactivity has expired. The settings are, Off, Standby, or Suspend. The
default settings are Standby.
VIDEO POWER DOWN MODE
This option specifies the power management state that the video
subsystem enters after the specified period of display inactivity has
expired. The settings are Disabled, Standby or Suspend. The default
settings are Disabled.
HARD DISK POWER DOWN MODE
This option specifies the power management state that the hard disk
drive enters after the specified period of display inactivity has expired.
The settings are Disabled, Standby, or Suspend. The default settings are
Disabled.
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HARD DISK TIMEOUT (MIN)
This option specifies the length of a period of hard disk inactivity. When
this period expires, the hard disk drive enters the power-conserving mode
specified in the Hard Disk Power Down Mode option described above.
The settings are Disabled, 1 Min (minutes), and all one minute intervals
up to and including 15 Min. The default settings are Disabled.
STANDBY TIMEOUT
This option specifies the length of the period of system inactivity when
the computer is in Full-On mode before the computer is placed in
Standby mode. In Standby mode, some power use is curtailed. The
settings are Disabled, 1 Min, 2 Min and all one minute intervals up to
and including 15 Min. The default settings are Disabled.
SUSPEND TIMEOUT
This option specifies the length of the period of system inactivity when
the computer is already in Standby mode before the computer is placed in
Suspend mode. In Suspend mode, nearly all power use is curtailed. The
settings are Disabled, 1 Min, 2 Min, and all one minute intervals up to
and including 15 Min. The default settings are Disabled.
SLOW CLOCK RATIO
This option specifies the speed at which the system clock runs in power
saving modes. The settings are expressed as a ratio between the normal
clock speed and the power down clock speed. The settings are 1:1, 1:2
(half as fast as normal), 1:4 ((the normal clock speed), 1:8, 1:16, 1:32,
1:64, or 1:128. The default setting is 1:8.
DISPLAY ACTIVITY
This option specifies if AMIBIOS is to monitor activity on the display
monitor for power conservation purposes. When this option is set to
Monitor and there is no display activity for the length of time specified in
the value in the Full-On to Standby Timeout (Min) option, the computer
enters a power saving state. The settings are Monitor or Ignore. The
default settings are Ignore.
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IRQ 3, 4, 5, 7, 9, 10, 11, 12, 13, 14, 15
These options enable event monitoring. When the computer is in a
power saving mode, activity on the named interrupt request line is
monitored by AMIBIOS. When any activity occurs, the computer enters
Full On mode.
Each of these options can be set to Monitor or Ignore. The provisional
settings are:
OPTIMAL FAIL-SAFE
IRQ 3 Monitor Ignore
IRQ 4 Monitor Ignore
IRQ 5 Ignore Ignore
IRQ 7 Monitor Ignore
IRQ 9 Ignore Ignore
IRQ 10 Ignore Ignore
IRQ 11 Ignore Ignore
IRQ 12 Monitor Ignore
IRQ 13 Ignore Ignore
IRQ 14 Monitor Ignore
IRQ 15 Monitor Ignore
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PCI / PNP SETUP
PLUG AND PLAY AWARE OS
Set this option to Yes if the operating system installed in the computer is
Plug and Play-aware. AMIBIOS only detects and enables PnP ISA
adapter cards that are required for system boot. The Windows 95
operating system detects and enables all other PnP-aware adapter cards.
Windows 95 is PnP-aware. Set this option to No if the operating system
(such as DOS, OS/2, Windows 3.x) does not use PnP. You must set this
option correctly or PnP-aware adapter cards installed in your computer
will not be configured properly. The settings are No or Yes. The
Optimal and Fail-Safe default settings are No.
PCI LATENCY TIMER (IN PCI CLOCKS)
This option sets latency of all PCI devices on the PCI bus. The settings
are in units equal to PCI clocks. The settings are 32, 64, 96, 128, 160,
192, 224, or 248. The Optimal and Fail-Safe default settings are 64.
PCI VGA PALETTE SNOOP
This option must be set to Enabled if any ISA adapter card installed in
the computer requires VGA palette snooping. The settings are Disabled
or Enabled. The Optimal and Fail-Safe default settings are Disabled.
PCI IDE BUS/MASTER
Set this option to Enabled to specify that the IDE controller on the PCI
local bus has bus mastering capability. The settings are Disabled or
Enabled. The Optimal and Fail-Safe default settings are Disabled.
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OFFBOARD PCI IDE CARD
This option specifies if an offboard PCI IDE controller adapter card is
used in the computer. You must also specify the PCI expansion slot on
SOLO where the offboard PCI IDE controller card is installed. If an
offboard PCI IDE controller is used, the on-board IDE controller on
SOLO is automatically disabled. The settings are Disabled, Auto, Slot1,
Slot2, Slot3, or Slot 4.
If Auto is selected, AMIBIOS automatically determines the correct
setting for this option. The Optimal and Fail-Safe default settings are
Auto.
In the AMIBIOS for the Intel Triton chipset, this option forces IRQ 14
and 15 to a PCI slot on the PCI local bus. This is necessary to support
non-compliant PCI IDE adapter cards.
OFFBOARD PCI IDE PRIMARY IRQ
This option specifies the PCI interrupt used by the primary IDE channel
on the offboard PCI IDE controller. The settings are Disabled, INTA,
INTB, INTC, INTD or Hardwired. The Optimal and Fail-Safe default
settings are Disabled.
OFFBOARD PCI IDE SECONDARY IRQ
This option specifies the PCI interrupt used by the secondary IDE
channel on the offboard PCI IDE controller. The settings are Disabled,
INTA, INTB, INTC, INTD or Hardwired. The Optimal and Fail-Safe
default settings are Disabled.
DMA CHANNELS 0, 1, 3, 5, 6, 7
These options specify the bus to which the DMA channel is allocated.
These options determine if AMIBIOS should remove a DMA channel
from the available pool passed to BIOS configurable devices. The
available pool is determined by reading the ESCD NVRAM. If more
DMA channels must be removed from the pool, the end user can use
these PCI/PnP Setup options to remove the channel by assigning the
option to the ISA/EISA setting. Onboard I/O is configurable by
AMIBIOS. The DMA channels used by onboard I/O are configured as
PCI/PnP.
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The provisional default settings are:
OPTIMAL FAILSAFE
Channel 0 PnP PnP
Channel 1 PnP PnP
Channel 3 ISA/EISA ISA/EISA
Channel 5 PnP PnP
Channel 6 PnP PnP
Channel 7 PnP PnP
IRQ 3, 4, 5, 7, 9, 10, 11, 14, 15
These options specify the bus that the named interrupt request lines
(IRQs) are used on. These options allow you to specify IRQs for use by
legacy ISA adapter cards.
These options determine if AMIBIOS should remove an IRQ from the
pool of available IRQs passed to BIOS configurable devices. The
available IRQ pool is determined by reading the ESCD NVRAM. If
more IRQs must be removed from the pool, the end user can use these
PCI/PnP Setup options to remove the IRQ by assigning the option to the
ISA/EISA setting. Onboard I/O is configurable by AMIBIOS. The IRQs
used by onboard I/O are configured as PCI/PnP.
The provisional optimal and fail-safe settings are:
OPTIMAL FAILSAFE
IRQ 3 ISA/EISA ISA/EISA
IRQ 4 ISA/EISA ISA/EISA
IRQ 5 PnP PnP
IRQ 7 ISA/EISA ISA/EISA
IRQ 9 PnP PnP
IRQ 10 PnP PnP
IRQ 11 PnP PnP
IRQ 14 PnP PnP
IRQ 15 PnP PnP
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RESERVED MEMORY SIZE
This option specifies the size of the memory area reserved for legacy ISA
adapter cards.
The settings are Disabled, 16K, 32K, or 64K. The Optimal and Fail-Safe
default settings are Disabled.
RESERVED MEMORY ADDRESS
This option specifies the beginning address (in hex) of the reserved
memory area. The specified ROM memory area is reserved for use by
legacy ISA adapter cards.
The settings are C0000, C4000, C8000, CC000, D0000, D4000, D8000,
DC000. The Optimal and Fail-Safe default settings are C8000.
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PERIPHERAL SETUP
Peripheral Setup options are displayed by choosing the Peripheral Setup
icon from the WINBIOS Setup main menu. All Peripheral Setup options
are described in this section.
ONBOARD PCI IDE
This option specifies the onboard IDE controller channels that will be
used. The settings are Primary, Secondary, Both or Disabled. The
Optimal and Fail-Safe default settings are Primary.
ONBOARD FDC
This option enables the floppy drive controller on the PC board. The
settings are Auto, Enabled or Disabled. The default setting is Auto.
ONBOARD SERIAL PORT1
This option enables serial port 1 on the board and specifies the based I/O
port address for serial port 1.
The settings are Auto, 3F8h, 3E8h, 2F8h, 2E8h, or Disabled. The
default setting is Auto.
ONBOARD SERIAL PORT2
This option enables serial port 2 on the board and specifies the base I/O
port address for serial port 2.
The settings are Auto, 3F8h, 3E8h, 2F8h, 2E8h, or Disabled. The
default setting is Auto.
ONBOARD PARALLEL PORT
This option enables the parallel port on the board and specifies the
parallel port based I/O port address. The settings are Auto, 378h, 278h,
3BCh, or Disabled. The default setting is Auto.
PARALLEL PORT MODE
This option specifies the parallel port mode. ECP and EPP are both bidirectional data transfer schemes that adhere to the IEEE P1284
specifications. The settings are :
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SETTING DESCRIPTION
Normal The normal parallel port mode is used. This is the default
Bi-Dir Use this setting to support bi-directional transfers on the parallel
EPP The parallel port can be used with devices that adhere to the
ECP The parallel port can be used with devices that adhere to the
setting.
port.
Enhanced Parallel Port (EPP) specification. EPP uses the
existing parallel port signals to provide asymmetric bi-directional
data transfer driven by the host device.
Extended Capabilities Port (ECP) specification. ECP uses the
DMA protocol to achieve transfer rates of approximately 2.5Mbs.
ECP provides symmetric bi-directional communications.
PARALLEL PORT IRQ
Selects which IRQ is assigned to the parallel port. Available options are
Auto, 5, or 7. The default is Auto.
PARALLEL PORT DMA
This option is only available if the setting for the Parallel Port Mode
option is ECP.
The settings are Auto, None, DMA CH 0, DMA CH 1, DMA CH 2, or
DMA CH 3. (CH = channel). The default setting is Disabled.
HARDWARE IO PORT BASE ADDRESS
This specifies the base address of the SOLO configuration and control
registers. The permissible options are:
To be advised.
SERIAL PORT 2 MODE
Specifies whether the second serial port will be used as RS232 or RS485.
Options are RS232 and RS485. The optimal and fail safe defaults are
RS232.
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RS485 DUPLEX MODE
Specifies whether the second serial port will be used as full or half duplex
when running in RS485 mode. This option is only available when the
options ‘Serial Port 2 Mode’ is set to RS485. The options are FULL or
HALF. The Optimal and Fail Safe defaults are FULL.
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SOLID STATE DISK SUPPORT
SOLO supports the use of Solid State Disks (SSD) using either flash or
SRAM devices fitted to the board using the DIL sockets adjacent to the BIOS
EPROM socket.
Please contact Blue Chip Technology’s Technical Services for details.
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ADDRESS MAPS
MEMORY MAP
ADDRESS
RANGE
(DECIMAL)
1024K - 131072K 100000 - 8000000 127M Extended Memory
896K - 1023K E0000 - FFFFF 128K AMI System BIOS
880K - 895K DC000 - DFFFF 16K Solid State Disk Pages
848K - 879K D4000 - DBFFF 32K BIOS Extensions
800K - 847K C8000 - D3FFF 48K Available HI DOS memory
640K - 799K A0000 - C7FFF 160K On-board video memory and
639K 9FC00 - 9FFFF 1K Extended BIOS Data
512K - 638K 80000 - 9FBFF 127K Extended conventional
0K - 511K 00000 - 7FFFF 512K Conventional
ADDRESS
RANGE
(HEX)
SIZE DESCRIPTION
(not available for UMB)
(open to ISA and PCI bus)
BIOS
(moveable by QEMM, 386MAX)
I/O MAP
The following table lists the I/O addresses used by single board PC devices.
Some of these devices (e.g. graphics) may not be present in all
configurations. Some devices (serial ports, parallel ports etc.) may be
configured for various addresses or disabled. These I/O locations are listed
in the Variable Resources column.
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PAGE 60 ERROR MESSAGES SOLO USER MANUAL
ADDRESS
(HEX)
0000 - 000F 16 PIIIX - DMA 1
0020 - 0021 2 PIIIX - Interrupt Controller 1
002E - 002F 2 Ultra I/O configuration registers
0040 - 0043 4 PIIIX - Timer 1
0060 1 Keyboard Controller Data Byte
0061 1 PIIIX - NMI, speaker control
0064 1 Kbd Controller, CMD/STAT Byte
0070, bit 7 1 bit PIIIX - Enable NMI
0070, bits 6:0 7 bits RTC, Address
0071 1 RTC, Data
0080 - 008F 16 PIIIX - DMA Page Register
00A0 - 00A1 2 PIIIX - Interrupt Controller 2
00B2 - 00B3 2 PIIIX - APM Control / Status
00C0 - 00DE 31 PIIIX - DMA 2
00F0 1 Reset Numeric Error
0100 - 0107 8 Reserved for Board Confign.
0170 - 0177 8
01F0 - 01F7 8 Primary IDE Channel
0200 - 0207 8 Gameport Joystick
0278 - 027B 4 Parallel Port 2
02E8 - 02EF 8 Serial Port 4
02F8 - 02FF 8 Serial Port 2
0376 1
0377 1
0378 - 037F 8 Parallel Port 1
03B0 - 03BB 4 C&T65545/8
03BC - 03BF 4 Parallel Port 3
03C0 - 03DF 16 C&T65545/8
03E8 - 03EF 8 Serial Port 3
03F0 - 03F5 6 Floppy Channel 1
03F6 1 Pri IDE Chan Cmnd Port
03F7 (Write) 1 Floppy Chan 1 Cmd
03F7, bit 7 1 bit Floppy Disk Chg Chan 1
03F7, bits 6:0 7 bits Pri IDE Chan Status Port
03F8 - 03FF 8 Serial Port 1
LPT + 400h 3 ECP regs, LPT base +
04D0 - 04D1 2 Edge/Level INTR Control Reg.
0CF8 - 0CFC* 4 PCI Config Address Reg.
0CF9 1 Turbo & Reset control Reg.
0CFC - 0CFF 4 PCI Config Data Reg
FFA0 - FFA7 8 1ary Bus MasterIDE regs
FFA8 - FFAF 8 2ary Bus Master IDE regs
FF00-FF07 8 IDE Bus Master Reg.
SIZE
Bytes
FIXED RESOURCES VARIABLE
RESOURCES
Interrupt Controller 2
400h
*only accessible by DWORD accesses.
Page 60 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL ERROR MESSAGES PAGE 61
PCI CONFIGURATION SPACE MAP
The Triton chipset uses Configuration Mechanism 1 to access the PCI
configuration space. The PCI Configuration Address register is a 32-bit I/O
register located at 0CF8h, the PCI Configuration Data register is a 32-bit
I/O register located at 0CFCh. The PCI Configuration Address register is
only accessible by a DWORD access, the PCI Configuration Data register is
accessible by DWORD, WORD or BYTE accesses.
ACCESS TO I/O CONFIGURATION SPACE USING
MECHANISM #1
1. Using a DWORD write command, output the required I/O
configuration address to I/O port CF8H
2. Using a DWORD read or write command, read or write data from the
I/O port CFCH
NOTE: Any address output to CF8H is always on a 4 byte (DWORD)
boundary. You can read or write any BYTE, WORD or DWORD in the
four byte range by using the correct offset as follows:
DWORD @ CFCh
WORD @ CFCh or CFEh
BYTE @ CFCh, CFDh, CFEh or CFFh
CONFIGURATION ADDRESS REGISTER BIT DEFINITION
BIT FUNCTION / SETTING
31 1
30 - 24 RESERVED
23 -16 BUS NUMBER
15 - 11 DEVICE NUMBER
10 - 8 FUNCTION NUMBER
7 - 2 REGISTER NUMBER
1 0
0 0
CONFIG SPACE ENABLE FLAG (Bit 31): Always 1 to indicate I/O
access is to configuration space.
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PAGE 62 ERROR MESSAGES SOLO USER MANUAL
RESERVED (Bits 30-24): Always 00h
BUS NUMBER (Bits 23-16): Always 00h unless a bridge card is installed
in a PCI slot
DEVICE NUMBER (Bits 15-11): Used to indicate a specific PCI device.
The Triton TSC has a predefined device number of 00000h. The PIIIX
and four PCI slots also have specific device numbers, that device number
is determined by which PCI Address/Data line is connected to the
device’s ID SEL pin. Table E-1 details the specific mapping information.
FUNCTION NUMBER (Bits 10-8): Used to indicate a specific function
in multifunction PCI devices. The PIIIX is the only multi-function device
on SOLO located on the single board PC. Use 00h for the basic PIIIX
device and 01h for the PCI IDE BUS MASTER FUNCTION. For a
multi-function PCI add-in card, refer to the card’s documentation to
determine the allowable function numbers.
REGISTER NUMBER (Bits 7-2): Defines one of 64 DWORD locations
for a specific PCI device.
Note that Bits 1 and 0 must always be 0h for DWORD access.
!!!!
The table below lists the PCI bus and device numbers used by the single
board PC. It also lists the data range that must be written to the I/O
Configuration Address register to access the device.
DEVICE BUS/DEVICE
TSC 00 / 00 / 0 N/A 8000 0000 - 8000 00FC
PIIIX 00 / 07 / 0 N/A 8000 3800 - 8000 38FC
PIIIX-IDE BUS
MASTER
C&T65545/8 00 / 08 / 0 AD18 8000 4000 - 8000 40FC
RTL8029/AS (Ethernet) 00 / 09 / 0 AD19 8000 4100 - 8000 41FC
Page 62 127-191.doc Blue Chip Technology Ltd.
/ FUNCTIONIDSEL
00 / 07 / 1 N/A 8000 3900 - 8000 39FC
I/O CONFIG ADDRESS
REGISTER
SOLO USER MANUAL ERROR MESSAGES PAGE 63
INTERRUPTS & DMA CHANNELS
The following tables list the Interrupt and DMA Channel configuration
options for on-board devices. The serial ports, parallel ports, and IDE
controller can be configured using SETUP, or any other Plug and Play
resource manager (such as the Windows™ 95 Device Manager). The
Graphics interrupt is assigned by the auto-configure utility during boot up.
IRQ RESERVED
NMI I/O Channel Check
10 Monitor Micro
11
12 PS/2 Mouse
13 Math co-processor
14 Primary E-IDE
15
DMA RESERVED
INTERRUPTS
0 Interval Timer
1 Keyboard buffer full
2 Cascade interrupt
from slave PIC
3 Serial 2 (COM2)
4 Serial 1 (COM1)
5 Parallel 2 (LPT2)
6 Floppy Controller
7 Parallel (LPT1)
8 Real time clock
9
(if present)
(if present)
0
1
2 Floppy
3
4 Cascade channel
5
6
7
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PAGE 64 ERROR MESSAGES SOLO USER MANUAL
CONNECTORS
BACK PANEL CONNECTORS
The back panel houses the following connectors:
VIDEO CONNECTOR P18 (15 WAY CONDENSED D-TYPE)
PIN
NO.
1 Analogue RED 2 Analogue GREEN
3 Analogue BLUE 4 Not Used
5 0 Volts (Ground) 6 0 Volts (Ground)
7 0 Volts (Ground) 8 0 Volts (Ground)
9 Not Used 10 0 Volts (Ground)
11 Not Used 12 Not Used
13 Horizontal Sync 14 Vertical Sync
15 Not Used
SIGNAL PIN NO. SIGNAL
ECP/EPP PARALLEL PORT P18 TOP (26 WAY HEADER)
PIN N°°
1 -Strobe 2 -Auto Feed XT
3 Data bit 0 4 -Error
5 Data bit 1 6 -Initialise
7 Data bit 2 8 -Select (input)
9 Data bit 3 10 Ground
11 Data bit 4 12 Ground
13 Data bit 5 14 Ground
15 Data bit 6 16 Ground
17 Data bit 7 18 Ground
19 -Acknowledge 20 Ground
21 Busy 22 Ground
23 Paper Empty 24 Ground
25 Select (Output) 26 Not Used
SIGNAL
PIN N°°
SIGNAL
PS/2 MOUSE PORT P21A (BOTTOM 6 WAY MINI-DIN)
PIN NO. SIGNAL PIN NO. SIGNAL
1 Mouse Data 2 Not Used
3 Ground 4 +5 Volts (fused)
5 Mouse Clock 6 Not Used
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SOLO USER MANUAL ERROR MESSAGES PAGE 65
PS/2 KEYBOARD PORT P21B (TOP 6 WAY MINI-DIN)
PIN NO. SIGNAL PIN NO. SIGNAL
1 Keyboard Data 2 Not Used
3 Ground 4 +5 Volts (fused)
5 Keyboard Clock 6 Not Used
RS232 SERIAL PORT 1 P20A (BOTTOM 9 WAY D-TYPE)
PIN NO. SIGNAL PIN NO. SIGNAL
1 Data Carrier Detect 2 -Receive Data
3 -Transmit Data 4 -Data Terminal Ready
5 Ground 6 -Data Set Ready
7 -Ready To Send 8 -Clear To Send
9 -RI or POWER
RS232 SERIAL PORT 2 P20B (TOP 9 WAY D-TYPE)
PIN NO. SIGNAL PIN NO. SIGNAL
1 Data Carrier Detect 2 -Receive Data
3 -Transmit Data 4 -Data Terminal Ready
5 Ground 6 -Data Set Ready
7 -Ready To Send 8 -Clear To Send
9 -RI or POWER
DUAL USB PORT 1 P19 A (BOTTOM 8 WAY)
PIN NO. SIGNAL PIN NO. SIGNAL
1 VCC 2 DATA13 DATA1+ 4 Ground
DUAL USB PORT 2 P19 B (TOP 8 WAY)
PIN NO. SIGNAL PIN NO. SIGNAL
1 VCC 2 DATA23 DATA2+ 4 Ground
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PAGE 66 ERROR MESSAGES SOLO USER MANUAL
ETHERNET UTP CONNECTOR P22 (8 WAY RJ45 )
PIN N°° SIGNAL
1 +VE TRANSMIT
2 -VE TRANSMIT
3 +VE RECEIVE
4 NC
5 NC
6 -VE RECEIVE
7 NC
8 NC
INTERNAL I/O HEADERS
The board has a number of internal peripheral connectors:
PRIMARY E-IDE CONNECTOR P13 (40 WAY HEADER)
PIN NO. SIGNAL PIN NO. SIGNAL
1 -Reset 2 Ground
3 Data bit 7 (HD) 4 Data bit 8 (HD)
5 Data bit 6 (HD) 6 Data bit 9 (HD)
7 Data bit 5 (HD) 8 Data bit 10 (HD)
9 Data bit 4 (HD) 10 Data bit 11 (HD)
11 Data bit 3 (HD) 12 Data bit 12 (HD)
13 Data bit 2 (HD) 14 Data bit 13 (HD)
15 Data bit 1 (HD) 16 Data bit 14 (HD)
17 Data bit 0 (HD) 18 Data bit 15 (HD)
19 Ground 20 Not used
21 Drive Request 22 Ground
23 -IO Write (HD) 24 Ground
25 -IO Read (HD) 26 Ground
27 Drive Ready 28 Not Used
29 Drive Acknowledge 30 Ground
31 IRQ14 32 Not Used
33 Address 1 (HD) 34 1 Kohm to Ground
35 Address 0 (HD) 36 Address 2 (HD)
37 -Chip Select 0 (HD) 38 -Chip Select 1 (HD)
39 IDE LED Drive 40 Ground
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SOLO USER MANUAL ERROR MESSAGES PAGE 67
LCD CONNECTOR P11 (50 WAY 2MM HEADER)
PIN NO. SIGNAL PIN NO. SIGNAL
1 5V/3V3 Link (J15) 2 Vertical Sync
3 Switched +12 volts 4 Ground
5 Switched VEE 6 Horizontal Sync
7 Switched +5 volts 8 Ground
9 Switched +5 volts 10 General Purpose 1
11 Shift Clock 12 Ground
13 Line Clock 14 General Purpose 0
15 MOD 16 Ground
17 FLM (LCD equivalent
of VSYNC)
19 Panel Data 0 20 Ground
21 Panel Data 1 22 Panel Data 23
23 Panel Data 2 24 Ground
25 Panel Data 3 26 Panel Data 22
27 Panel Data 4 28 Ground
29 Panel Data 5 30 Panel Data 21
31 Panel Data 6 32 Ground
33 Panel Data 7 34 Panel Data 20
35 Panel Data 8 36 Ground
37 Panel Data 9 38 Panel Data 19
39 Panel Data 10 40 Ground
41 Panel Data 11 42 Panel Data 18
43 Panel Data 12 44 Ground
45 Panel Data 13 46 Panel Data 17
47 Panel Data 14 48 Ground
49 Panel Data 15 50 Panel Data 16
18 Ground
AUDIO VOLUME CONTROL P6 (4 WAY PIN HEADER)
Pin N°°
1 Mute 2 Volume Up
3 Volume Down 4 Audio Ground
Signal
Pin N°°
Signal
CD-AUDIO INPUT P7 (4 WAY PIN HEADER)
Pin N°°
1 CD Audio In Left 2 Audio Ground
3 CD Audio In Right 4 Audio Ground
Blue Chip Technology Ltd. 127-191.doc Page 67
Signal
Pin N°°
Signal
PAGE 68 ERROR MESSAGES SOLO USER MANUAL
AUDIO CONNECTOR P8 (8 WAY HEADER)
Pin N°°
1 Line In Left 2 Line In Right
3 Audio Ground 4 Audio Ground
5 Microphone In 6 Not Used
7 Audio Ground 8 Audio Ground
9 Line Out Left 10 Line Out Right
Signal
Pin N°°
Signal
FLOPPY DISK DRIVE CONNECTOR P12 (34 WAY HEADER)
PIN N°° SIGNAL PIN N°° SIGNAL
1 Ground 2 +RPM/Low Current
3 Ground 4 Not used
5 Ground 6 Not used
7 Ground 8 -Index
9 Ground 10 -Motor 0
11 Ground 12 -Drive select 1
13 Ground 14 -Drive select 0
15 Ground 16 -Motor 1
17 Ground 18 +Direction
19 Ground 20 -Step
21 Ground 22 -Write Data
23 Ground 24 -Write Gate
25 Ground 26 -Track 0
27 Ground 28 -Write Protect
29 Ground 30 -Read Data
31 Ground 32 +Head Select
33 Ground 34 +Disk Change
RS485 SERIAL PORT 2 P14 (10 WAY HEADER)
PIN NO. SIGNAL PIN NO. SIGNAL
1 +Rx FDX 2 +Term. 10 K to +5V
3 -Rx FDX 4 No Connect
5 +Tx FDX,
+Rx/+Tx HDX
7 -Tx FDX,
-RX/-Tx HDX
9 -Term. 10 K to Gnd 10 No Connect
Page 68 127-191.doc Blue Chip Technology Ltd.
6 No Connect
8 No Connect
SOLO USER MANUAL ERROR MESSAGES PAGE 69
RS232 SERIAL PORT 3 P15 (10 WAY HEADER)
Pin N°°
1 -Data Carrier Detect 2 -Data Set Ready
3 -Receive Data 4 -Ready To Send
5 -Transmit Data 6 -Clear To Send
7 -Data Term Ready 8 -RI or POWER
9 Ground 10 Not used
Signal
Pin N°°
Signal
RS232 SERIAL PORT 4 P17 (10 WAY HEADER)
Pin N°°
1 -Data Carrier Detect 2 -Data Set Ready
3 -Receive Data 4 -Ready To Send
5 -Transmit Data 6 -Clear To Send
7 -Data Term Ready 8 -RI or POWER
9 Ground 10 Not used
Signal
Pin N°°
Signal
SUPERVISORY CONNECTOR P24 (5 WAY 2MM HEADER)
Pin N°°
1 Analogue I/P 0 or
3 Ground 4 +5 volts
5 Not Used or
Signal
Magstripe Clock
-Card Present
Pin N°°
2 Analogue I/P 1 or
Signal
Magstripe Data
The usage of pins on this connector depends on the version of microcontroller
fitted at the factory. Please check with your supplier for further details.
POWER CONNECTOR P4 (34 WAY HEADER)
PIN N°° SIGNAL
1 Note 1
2 +5V
3 +12V
4 -12V
5 Ground
6 Ground
7 Ground
8 Ground
9 -5V
10 +5V
11 +5V
12 +5V
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PAGE 70 ERROR MESSAGES SOLO USER MANUAL
Note 1: This signal is normally used as POWER GOOD from the PSU. On Solo
this pin has been reserved for +24V connection which is re-routed to a link
selectable output on the serial ports. It is required by some customers for
powering external devices via the serial port. The link options for these ports
are +24V, +12V, +5V (all fused at 2A) or RI (Ring Indicator). If this option is
not required then either leave the power pin on P4 disconnected or connect the
POWER GOOD signal from the PSU (as per the standard PC PSU) and set the
serial port jumpers to RI. The RI signal will then appear on pin 9 of the COM
port D type connectors.
UTILITY CONNECTOR P16 (20 WAY HEADER)
Battery
SIGNAL
PIN N°°
18 0 Volts Battery (Ground)
PIN N°°
1 Audio +ve 2 Audio -ve
3 Reset +ve 4 Reset -ve (Ground)
5 Watchdog LED +ve 6 Watchdog LED -ve
7 Keylock +ve 8 Keylock -ve (Ground)
9 Power LED +ve 10 Power LED -ve (Ground)
11 External SMI +ve 12 External SMI -ve (Ground)
13 IDE LED +ve 14 IDE LED -ve
15 +5V (fused) 16 0 Volts (Ground)
17 External +3.6 Volt
19 Keyboard Data 20 Keyboard Clock
SIGNAL
COAST CACHE CONNECTOR P3
This is an industry-standard connector for Cache On A Stick. The
COAST connector is a 160-pin socket which is designed to prevent
reversed fitting of the cache module.
Please note that each cache module is designed specifically for each
chipset i.e. there are cache modules specific to the 430HX Triton chipset.
The available options for SOLO cache are 256kbyte asynchronous, 256 or
512KByte of synchronous Pipeline burst, or none.
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SOLO USER MANUAL ERROR MESSAGES PAGE 71
BATTERY CONNECTOR P1 (4 WAY HEADER)
Pin N°°
1 +3.6 Volts DC
2 Not used (key)
3 Ground
4 Ground
Signal
BUS CONNECTORS
ISA BUS XT CONNECTIONS
A= Large gold fingers on main component side
B= Large gold fingers on reverse side
PIN NO. SIGNAL PIN NO. SIGNAL
A1 -IOCHCK B1 Ground
A2 SD7 B2 Resetdrv
A3 SD6 B3 +5 Volts
A4 SD5 B4 IRQ9
A5 SD4 B5 -5 Volts
A6 SD3 B6 DREQ2
A7 SD2 B7 -12 Volts
A8 SD1 B8 -0WS
A9 SD0 B9 +12 Volts
A10 IOCHRDY B10 Ground
A11 AEN B11 -SMEMW
A12 SA19 B12 -SMEMR
A13 SA18 B13 -IOW
A14 SA17 B14 -IOR
A15 SA16 B15 -DACK3
A16 SA15 B16 DREQ3
A17 SA14 B17 -DACK1
A18 SA13 B18 DREQ1
A19 SA12 B19 -REF
A20 SA11 B20 CLK
A21 SA10 B21 IRQ7
A22 SA9 B22 IRQ6
A23 SA8 B23 IRQ5
A24 SA7 B24 IRQ4
A25 SA6 B25 IRQ3
A26 SA5 B26 -DACK2
A27 SA4 B27 T/C
A28 SA3 B28 BALE
A29 SA2 B29 +5 Volts
A30 SA1 B30 OSC
A31 SA0 B31 Ground
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PAGE 72 ERROR MESSAGES SOLO USER MANUAL
ISA BUS AT CONNECTIONS
C= Large gold fingers on main component side
D= Large gold fingers on reverse side
PIN NO. SIGNAL PIN NO. SIGNAL
C1 -SBHE D1 -MEMCS16
C2 LA23 D2 -IOCS16
C3 LA22 D3 IRQ10
C4 LA21 D4 IRQ11
C5 LA20 D5 IRQ12
C6 LA19 D6 IRQ15
C7 LA18 D7 IRQ14
C8 LA17 D8 -DACK0
C9 -MEMR D9 DREQ0
C10 -MEMW D10 -DACK5
C11 SD8 D11 DREQ5
C12 SD9 D12 -DACK6
C13 SD10 D13 DREQ6
C14 SD11 D14 -DACK7
C15 SD12 D15 DREQ7
C16 SD13 D16 +5 Volts
C17 SD14 D17 -Master
C18 SD15 D18 Ground
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SOLO USER MANUAL ERROR MESSAGES PAGE 73
PC104 PC/XT CONNECTOR P5 (64 WAY SOCKET)
SIDE A SIGNAL SIDE B SIGNAL
1 -IOCHCK 1 Ground
2 SD7 2 Resetdrv
3 SD6 3 +5 Volts
4 SD5 4 IRQ9
5 SD4 5 -5 Volts
6 SD3 6 DREQ2
7 SD2 7 -12 Volts
8 SD1 8 -0WS
9 SD0 9 +12 Volts
10 IOCHRDY 10 Ground
11 AEN 11 -SMEMW
12 SA19 12 -SMEMR
13 SA18 13 -IOW
14 SA17 14 -IOR
15 SA16 15 -DACK3
16 SA15 16 DREQ3
17 SA14 17 -DACK1
18 SA13 18 DREQ1
19 SA12 19 -REF
20 SA11 20 CLK
21 SA10 21 IRQ7
22 SA9 22 IRQ6
23 SA8 23 IRQ5
24 SA7 24 IRQ4
25 SA6 25 IRQ3
26 SA5 26 -DACK2
27 SA4 27 T/C
28 SA3 28 BALE
29 SA2 29 +5 Volts
30 SA1 30 OSC
31 SA0 31 Ground
32 Ground 32 Ground
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PAGE 74 ERROR MESSAGES SOLO USER MANUAL
PC104 PC/AT CONNECTOR P9 (40 WAY SOCKET)
SIDE C SIGNAL SIDE D SIGNAL
1 Ground 1 Ground
2 -SBHE 2 -MEMCS16
3 LA23 3 -IOCS16
4 LA22 4 IRQ10
5 LA21 5 IRQ11
6 LA20 6 IRQ12
7 LA19 7 IRQ15
8 LA18 8 IRQ14
9 LA17 9 -DACK0
10 -MEMR 10 DREQ0
11 -MEMW 11 -DACK5
12 SD8 12 DREQ5
13 SD9 13 -DACK6
14 SD10 14 DREQ6
15 SD11 15 -DACK7
16 SD12 16 DREQ7
17 SD13 17 +5 Volts
18 SD14 18 -Master
19 SD15 19 Ground
20 No Connection 20 Ground
DIGITAL IO CONNECTOR P25 (20 WAY HEADER)
Pin No Signal Pin No Signal
1 Vcc ( via 22R) 2 Vcc ( via 22R)
3 Digital Out 0 4 Digital In 0
5 Digital Out 1 6 Digital In 1
7 Digital Out 2 8 Digital In 2
9 Digital Out 3 10 Digital In 3
11 Digital Out 4 12 Digital In 4
13 Digital Out 5 14 Digital In 5
15 Digital Out 6 16 Digital In 6
17 Digital Out 7 18 Digital In 7
19 Ground 20 Ground
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SOLO USER MANUAL ERROR MESSAGES PAGE 75
ERROR MESSAGES
AMIBIOS ERROR BEEP CODES
The BIOS performs a Power On Self Test (POST) after a reset or reboot. If
errors occur during the POST, the microprocessor indicates the status of the
test by writing codes to the I/O port at address 80 Hex. If the BIOS cannot
find and configure the display controller then the errors are communicated
through a series of audible beeps (by the speaker drive circuit). Fatal
errors, which prevent the system from continuing the boot process, will
produce beep codes.
Other errors are displayed textually. For these see AMIBIOS Error
Messages, in the following subsection.
BEEPS ERROR MESSAGE DESCRIPTION
1long, 3
short
10 CMOS Shutdown
11 Cache Error /
Video failure A connection to a monitor was not detected.
1 Refresh Failure The memory refresh circuitry on the single board PC
2 Parity Error Parity is not supported on this product, will not occur.
3 Base 64 KB Memory
Failure
4 Timer Not
Operational
5 Processor Error The CPU on the single board PC generated an error.
6 8042 - Gate A20
Failure
7 Processor Exception
Interrupt Error
8 Display Memory
Read/Write Error
9 ROM Checksum
Error
Register Rd/Wrt
Error
External Cache Bad
is faulty.
Memory failure in the first 64 KB.
Memory failure in the first 64 KB of memory, or
Timer 1 on the single board PC is not functioning.
The keyboard controller (8042) may be bad. The
BIOS cannot switch to protected mode.
The CPU generated an exception interrupt.
System video adapter is either missing or its memory
is faulty. This is not a fatal error.
ROM checksum value does not match the value
encoded in BIOS.
The shutdown register for CMOS RAM failed.
The external cache is faulty.
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PAGE 76 ERROR MESSAGES SOLO USER MANUAL
AMIBIOS ERROR CODES ON THE POST DISPLAY
As the BIOS performs the POST after a reset or reboot, the microprocessor
indicates the status of the test by writing codes to the I/O port at address
80 Hex. SOLO provides an on-board decode of this information displaying
the code on on-board LEDs. It can also drive an optional POST display
without modification. The following codes indicate the progress of the
microprocessor during the power on test.
UNCOMPRESSED INIT CODE CHECKPOINTS
CODE
(HEX)
D0 NMI is Disabled. CPU ID saved. Init code Checksum verification
starting.
D1 To do DMA init, Keyboard controller BAT test, start memory refresh and
going to 4GB flat mode.
D3 To start Memory sizing.
D4 To come back to real mode. Execute OEM patch. Set stack.
D5 E000 ROM enabled. Init code is copied to segment 0 and control to be
transfered to segment 0.
D6 Control is in segment 0. To check <CTRL><HOME> key and verify
main BIOS checksum. If either <CTRL><HOME> is pressed or main
BIOS checksum is bad, go to check point E0 else goto check point D7.
D7 Main BIOS runtime code is to be decompressed and control to be
passed to main BIOS in shadow RAM.
DESCRIPTION
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SOLO USER MANUAL ERROR MESSAGES PAGE 77
BOOT BLOCK RECOVERY CODE CHECKPOINTS
CODE
(HEX)
E0 On-Board Floppy Controller (if any) is initialised. To start base 512K
memory test.
E1 To initialise interrupt vector table.
E2 To initialise DMA and interrupt controllers.
E6 To enable floppy and timer IRQ, enable internal cache.
ED Initialize floppy drive.
EE Start looking for a diskette in drive A: and read 1st sector of the
diskette.
EF Floppy read error.
F0 Start searching ‘AMIBOOT.ROM’ file in root directory.
F1 ‘AMIBOOT.ROM’ file not present in root directory.
F2 Start reading FAT table and analyze FAT to find the clusters occupied
by ‘AMIBOOT.ROM’ file..
F3 Start reading ‘AMIBOOT.ROM’ file cluster by cluster.
F4 ‘AMIBOOT.ROM’ file not of proper size.
F5 Disable internal cache.
FB Detect Flash type present.
FC Erase Flash.
FD Program Flash.
FF Flash program successful. BIOS is going to restart.
DESCRIPTION
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PAGE 78 ERROR MESSAGES SOLO USER MANUAL
RUNTIME CODE IS UNCOMPRESSED IN F000 SHADOW RAM
CODE
(HEX)
03 NMI is Disabled. To check soft reset/power-on.
05 BIOS stack set. Going to disable Cache if any.
06 POST code to be uncompressed.
07 CPU init and CPU data area init to be done.
08 CMOS checksum calculation to be done next.
0B Any initialisation before keyboard BAT to be done next.
0C KB controller I/B free. To issue the BAT command to keyboard controller.
0E Any initialisation after KB controller BAT to be done next.
0F Keyboard command byte to be written.
10 Going to issue Pin-23,24 blocking/unblocking command.
11 Going to check pressing of <INS> , <END> key during power-on.
12 To init CMOS if “Init CMOS in every boot” is set or <END> key is pressed.
Going to disable DMA and Interrupt controllers.
13 Video display is disabled and port-B is initialised. Chipset init about to
begin.
14 8254 timer test about to start.
19 About to start memory refresh test.
1A Memory Refresh line is toggling. Going to check 15us ON/OFF time.
23 To read 8042 input port and disable Megakey GreenPC feature. Make
BIOS code segment writeable.
24 To do any setup before Int vector init.
25 Interrupt vector initialisation about to begin. To clear password if necessary.
27 Any initialisation before setting video mode to be done.
28 Going for monochrome mode and colour mode setting.
2A Different BUSes init (system, static, output devices) to start if present.
2B To give control for any setup required before optional video ROM check.
2C To look for optional video ROM and give control.
2D To give control to do any processing after video ROM returns control.
2E If EGA/VGA not found then do display memory R/W test.
2F EGA/VGA not found. Display memory R/W test about to begin.
30 Display memory R/W test passed. About to look for the retrace checking.
31 Display memory R/W test or retrace checking failed. To do alternate Display
memory R/W test.
32 Alternate Display memory R/W test passed. To look for the alternate display
retrace checking.
34 Video display checking over. Display mode to be set next.
37 Display mode set. Going to display the power on message.
38 Different BUSes init (input, IPL, general devices) to start if present.
39 Display different BUSes initialisation error messages.
3A New cursor position read and saved. To display the Hit <DEL> message.
40 To prepare the descriptor tables.
42 To enter in virtual mode for memory test.
43 To enable interrupts for diagnostics mode.
DESCRIPTION
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SOLO USER MANUAL ERROR MESSAGES PAGE 79
CODE
DESCRIPTION
(HEX)
44 To Initialize data to check memory wrap around at 0:0.
45 Data initialised. Going to check for memory wrap around at 0:0 and finding
the total system memory size.
46 Memory wrap around test done. Memory size calculation over. About to go
for writing patterns to test memory.
47 Pattern to be tested written in extended memory. Going to write patterns in
base 640k memory.
48 Patterns written in base memory. Going to find out amount of memory
below 1M memory.
49 Amount of memory below 1M found and verified. Going to find out amount
of memory above 1M memory.
4B Amount of memory above 1M found and verified. Check for soft reset and
going to clear memory below 1M for soft reset. (If power on, go to check
point# 4Eh).
4C Memory below 1M cleared. (SOFT RESET) Going to clear memory above
1M.
4D Memory above 1M cleared. (SOFT RESET) Going to save the memory size.
(Goto check point# 52h).
4E Memory test started. (NOT SOFT RESET) About to display the first 64k
memory size.
4F Memory size display started. This will be updated during memory test.
Going for sequential and random memory test.
50 Memory testing/initialisation below 1M complete. Going to adjust displayed
memory size for relocation/ shadow.
51 Memory size display adjusted due to relocation/ shadow. Memory test above
1M to follow.
52 Memory testing/initialisation above 1M complete. Going to save memory size
information.
53 Memory size information is saved. CPU registers are saved. Going to enter
in real mode.
54 Shutdown successful, CPU in real mode. Going to disable gate A20 line
and disable parity/NMI.
57 A20 address line, parity/NMI disable successful. Going to adjust memory
size depending on relocation/shadow.
58 Memory size adjusted for relocation/shadow. Going to clear Hit <DEL>
message.
59 Hit <DEL> message cleared. <WAIT...> message displayed. About to start
DMA and interrupt controller test.
60 DMA page register test passed. To do DMA#1 base register test.
62 DMA#1 base register test passed. To do DMA#2 base register test.
65 DMA#2 base register test passed. To program DMA unit 1 and 2.
66 DMA unit 1 and 2 programming over. To Initialize 8259 interrupt controller.
7F Extended NMI sources enabling is in progress.
80 Keyboard test started. clearing output buffer, checking for stuck key, to
issue keyboard reset command.
81 Keyboard reset error/stuck key found. To issue keyboard controller interface
test command.
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PAGE 80 ERROR MESSAGES SOLO USER MANUAL
CODE
DESCRIPTION
(HEX)
82 Keyboard controller interface test over. To write command byte and init
circular buffer.
83 Command byte written, Global data init done. To check for lock-key.
84 Lock-key checking over. To check for memory size mismatch with CMOS.
85 Memory size check done. To display soft error and check for password or
bypass setup.
86 Password checked. About to do programming before setup.
87 Programming before setup complete. To uncompress SETUP code and
execute CMOS setup.
88 Returned from CMOS setup program and screen is cleared. About to do
programming after setup.
89 Programming after setup complete. Going to display power on screen
message.
8B First screen message displayed. <WAIT...> message displayed. PS/2
Mouse check and extended BIOS data area allocation to be done.
8C Setup options programming after CMOS setup about to start.
8D Going for hard disk controller reset.
8F Hard disk controller reset done. Floppy setup to be done next.
91 Floppy setup complete. Hard disk setup to be done next.
95 Init of different BUSes optional ROMs from C800 to start.
96 Going to do any init before C800 optional ROM control.
97 Any init before C800 optional ROM control is over. Optional ROM check and
control will be done next.
98 Optional ROM control is done. About to give control to do any required
processing after optional ROM returns control and enable external cache.
99 Any initialisation required after optional ROM test over. Going to setup timer
data area and printer base address.
9A Return after setting timer and printer base address. Going to set the RS-232
base address.
9B Returned after RS-232 base address. Going to do any initialisation before
Coprocessor test
9C Required initialisation before Coprocessor is over. Going to Initialize the
Coprocessor next.
9D Coprocessor initialised. Going to do any initialisation after Coprocessor test.
9E Initialisation after Coprocessor test is complete. Going to check extd
keyboard, keyboard ID and num-lock. Keyboard ID command to be
A2 Going to display any soft errors.
A3 Soft error display complete. Going to set keyboard typematic rate.
A4 Keyboard typematic rate set. To program memory wait states.
A5 Going to enable parity/NMI.
A7 NMI and parity enabled. Going to do any initialisation required before giving
control to optional ROM at E000.
A8 Initialisation before E000 ROM control over. E000 ROM to get control next.
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SOLO USER MANUAL ERROR MESSAGES PAGE 81
A9 Returned from E000 ROM control. Going to do any initialisation required
after E000 optional ROM control.
AA Initialisation after E000 optional ROM control is over. Going to display the
system configuration.
AB To uncompress DMI data and execute DMI POST init.
B0 System configuration is displayed.
B1 Going to copy any code to specific area.
00 Copying of code to specific area done. Going to give control to INT-19 boot
loader.
Blue Chip Technology Ltd. 127-191.doc Page 81
PAGE 82 ERROR MESSAGES SOLO USER MANUAL
AMIBIOS ERROR MESSAGES
Textual error messages are displayed in the following format:
ERROR Message Line 1
ERROR Message Line 2
For most displayed error messages, there is only one message. If a second
message appears, it is "RUN SETUP". If this message occurs, press <F1> to
run Setup Utility. The table of messages is shown on the next page.
Page 82 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL ERROR MESSAGES PAGE 83
ERROR
EXPLANATION
MESSAGE
8042 Gate - A20
Error
Address Line Short! Error in the address decoding circuitry on the single board PC.
Cache Memory
Bad, Do Not Enable
Cache!
CH-2 Timer Error Most AT systems include two timers. There is an error in timer 2.
CMOS Battery State
Low
CMOS Checksum
Failure
CMOS System
Options Not Set
CMOS Display
Type Mismatch
CMOS Memory
Size Mismatch
CMOS Time and
Date Not Set
Diskette Boot
Failure
Display Switch Not
Proper
DMA Error Error in the DMA controller.
DMA #1 Error Error in the first DMA channel.
DMA #2 Error Error in the second DMA channel.
FDD Controller
Failure
HDD Controller
Failure
INTR #1 Error Interrupt channel 1 failed POST.
INTR #2 Error Interrupt channel 2 failed POST.
Invalid Boot
Diskette
Keyboard Is
Locked...Unlock It
Keyboard Error There is a timing problem with the keyboard. Set the Keyboard option in
KB/Interface Error There is an error in the keyboard connector.
Off Board Parity
Error
On Board Parity
Error
Parity Error ???? Parity error in system memory at an unknown address.
Gate A20 on the keyboard controller (8042) is not working. Replace the 8042.
Cache memory is defective. Replace it.
CMOS RAM is powered by a battery. The battery power is low. Replace the
battery.
After CMOS RAM values are saved, a checksum value is generated for error
checking. The previous value is different from the current value. Run AMIBIOS
Setup.
The values stored in CMOS RAM are either corrupt or non-existent. Run
Setup.
The video type in CMOS RAM does not match the type detected by the BIOS.
Run AMIBIOS Setup.
The amount of memory on the single board PC is different than the amount in
CMOS RAM. Run AMIBIOS Setup.
Run Standard CMOS Setup to set the date and time in CMOS RAM.
The boot disk in floppy drive A: is corrupt. It cannot be used to boot the
system. Use another boot disk and follow the screen instructions.
The display jumper is not implemented on this product, this error will not
occur.
The BIOS cannot communicate with the floppy disk drive controller. Check all
appropriate connections after the system is powered down.
The BIOS cannot communicate with the hard disk drive controller. Check all
appropriate connections after the system is powered down.
The BIOS can read the disk in floppy drive A:, but cannot boot the system. Use
another boot disk.
The keyboard lock on the system is engaged. The system must be unlocked to
continue.
Standard CMOS Setup to Not Installed to skip the keyboard POST routines.
Parity error in memory installed in an expansion slot. The format is:
OFF BOARD PARITY ERROR ADDR (HEX) = (XXXX)
Where “XXXX” is the hex address where the error occurred.
Parity is not supported on this product, this error will not occur.
Blue Chip Technology Ltd. 127-191.doc Page 83
PAGE 84 ERROR MESSAGES SOLO USER MANUAL
ISA NMI MESSAGES
ISA NMI MESSAGE EXPLANATION
Memory Parity Error at
XXXXX
I/O Card Parity Error at
XXXXX
DMA Bus Time-out A device has driven the bus signal for more than
Memory failed.
If the memory location can be determined, it is displayed as
XXXXX. If not, the message is Memory Parity Error ????.
An expansion card failed.
If the address can be determined, it is displayed as XXXXX.
If not, the message is I/O Card Parity Error ????.
7.8 microseconds.
Page 84 127-191.doc Blue Chip Technology Ltd.
SOLO USER MANUAL ERROR MESSAGES PAGE 85
PCI CONFIGURATION ERROR MESSAGES
The following PCI messages are displayed as a group with bus, device and
function information.
<'NVRAM Checksum Error, NVRAM Cleared'>, \ ; String
<'System Board Device Resource Conflict'>, \ ; String
<'Primary Output Device Not Found'>, \ ; String
<'Primary Input Device Not Found'>, \ ; String
<'Primary Boot Device Not Found'>, \ ; String
<'NVRAM Cleared By Jumper'>, \ ; String
<'NVRAM Data Invalid, NVRAM Cleared'>, \ ; String
<'Static Device Resource Conflict'>, \ ; String
The following messages chain together to give a message such as:
"PCI I/O Port Conflict: Bus: 00, Device 0D, Function: 01".
If and when more than 15 PCI conflict errors are detected, the log full
message is displayed.
<'PCI I/O Port Conflict:'>, \ ; String
<'PCI Memory Conflict: '>, \ ; String
<'PCI IRQ Conflict: '>, \ ; String
<' Bus '>, \ ; String
<', Device '>, \ ; String
<', Function '>, \ ; String
<'PCI Error Log is Full.'>, \ ; String
<'Floppy Disk Controller Resource Conflict '>, \ ; Text
<'Primary IDE Controller Resource Conflict '>, \ ; Text
<'Secondary IDE Controller Resource Conflict '>, \ ; Text
<'Parallel Port Resource Conflict '>, \ ; Text
<'Serial Port 1 Resource Conflict '>, \ ; Text
<'Serial Port 2 Resource Conflict '>, \ ; Text
Blue Chip Technology Ltd. 127-191.doc Page 85
PAGE 86 ERROR MESSAGES SOLO USER MANUAL
BOARD LAYOUT
127_172 Blue Chip Technology Ltd.
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