B&K 530 User Manual

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INTRODUCTION
The B&K-hecision signed for with special f'eatures out-of-circuit. It uses a high-current, low duty-cycle technique circuitry. user to identify in-ciicuit tests and all
the frequency at
in-circuit
to test
and a low-current
An exceptional
Model 530 Semiconductor
out-of-circuit semiconductor
and
for
nraking
transistors
the
ternrinals
out-of-circuit
feature is
which
transistor
additional tests on
presence
the
in
drive systern which enables the
of the
checks.
provision
for rleasurement
gain
is one or unity.
Tester
testing,
devices
of shunting
device in
is de-
pulse
most
of
This
fr rating
the
is devices.
For out-of-circuit
gm,
FET provides for testing high current to 2 amperes,
instrument is
The
control
devices.
manipulation,
for a transistor
the low
without
measurements
duty-cycle,
over-dissipation.
designed
facilitating
is applied
and
of transistor
high-power
devices
for a minimum
at
rapid
pulse
rated
testing
to
bipolar
and
beta
technique
current,
amount
of most
up
of
SPECIAL
l. Patented
successful low shunt irnpedances device under test.
Six-position TEST device nraking it unnecessary to identification. Can be additional tests position.
3.
Base
operated when
transistor are identified
Gate lead is identified on
4.
Autornatic bipolar
5. A-udible tone tells when the device under good testins
linrited-energy
use of in-circuit testing
tested in all
being
can be
gate
or
-
lead
identified by color as Test Switch is
testing
polarity
devices
no need to take eyes
hard-to-set-at devices.
and
pulse
circuit
with
complete safety for the
switch
indication to identify
N-channel
sequentially
possible
know
left
GOOD
in
made without
with HI
when
testing with LO drive.
FET's.
or
off
permits
presence
in the
connects
configurations
the device terminal
position memorizing
drive. All leads
NPN
P-channel
circuit
for
board
highly
the
that
so
test
PNP
or
FET's.
test is
while
FEATURES
6.
of
7.
8.
of
9.
10.
n.
t2.
Measures beta of low-power in two high-current
for accurate overdissipation.
Measures sistors.
Measures gm of low-power Both depletion-mode FET's
Measures age
prevents
Has a
wide
Clip-on in difficult locations. further tests.
Choice out-of-circuit
ranges. A special
(1. = 2 arnp for
ttsting of
(gain-Uandwidth
&
be tested.
can
voltage
ratings up to
damage to devices
compressed
leakage current
test leads make
of
breakdown
test leads
tests.
100V. Automatic current
leakage
300
power
enchancement-mode
and
under
meter
on a
range
positive
Frees operator's hands
or
high-power
and
pSEC
0
product)
and
and
single meter.
front
l%
,
=
scale, which
connections
pulsing
200) transistors
of
high-power
reverse voltage leak'
test.
panel sockets
transistors
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circuit
without
bipolar
FET's.
power
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displays
to devices
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Determines
1. or out-of-circuit.
Determines
2. Identifies
3.
Identifies
4.
5. Indicates
channel). Identifies
6.
Measures
7.
transistors.
BRIEF
good
good Emitter-Base-Collector gate
lead
polarity
Cathode-Gate-Anode
all breakdown
or bad
or bad
FET.
of
good
of
transistors,
in' or
diodes
leads
devices
leads
leakage
and
SUMMARY
or SCR's,
FET's
out'of-circuit. -
of transistors.
(NPN
PNP;
or
of SCR's.
parameters
OF
in-
or P
N
HINTS
WHAT
of
AND
THE
Measures
8. Measures
9.
100
Measures
10. Measures
1 1.
0-100
Determines
12. Will
13. depletion
KINKS
WILL
530
lpg5 and BVggg
v.
reverse leakage
fr of
0-500
MHz,
whether
new
test
types.
DO
gate
leakage
transistors
of
current
bipolar
MHz,0-1500
device
FET's, both
power
FET's.
of
PIV
and
of diodes.
transistors,
MHz.
transistor,
a
is
enhancement
of diodes
ranges:
3
in
or SCR.
FET
up
to
and
{
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t
t
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IDENTIFYING TRANSISTORS
Nearly all
1.
2.
3. The T0-66
4. The base
5. Most
the tubular
either standard
Power TO-3 can and
packages usually, but
and continuity mounting
either facing the flat
case,
when
source in nearly interchanged
TO-5
transistors in stud
three-digit
the center
leail
the center
the collector
plastic FET's
facing the flat side
all
germanium
package.
either
be
2N-numbers are
power
are nearly
not always, connected
check
tab.
of most modern
the middle, but
junction
with no adverse
transistors come
type with flexible
packages
germanium,
transistors
always
lead. This
between
lead
side with the
lead
FET's, the source and drain can be
always
or the
is in the
have the
with the leads down and
DIODES
AND
in
.rnetal
or
leads,
or in the TO-5
siliCon
mostly
and the
silicon. The collector
the collector
plastic-type
right-hand
leads down.
middle.
gate
there are
effects.
or FET. Two-
germanium.
power
plastic
to the mounting
verified by a
be
can
lead
pin
and
transistors
lead
In the latter
on the right side
exceptions.
cases,
the
in
or
tab tab the
when
the
In
transistors
All
6.
emitter
and Darlingtons.
gain
some
have
will
leads interchanged,
with
with
the
the collector exception
of
{
{
Germanium
7.
their four Silicon light-sensitivg tiftrt.
is
is
can be Power
8. configurations following comparisons
The APPENDIX
9.
schematic symbols
the
530. This device
10.
extensive list
An parameters
signal
transparent
bands,
color
diodes
fne
either
FET's
prior
usually
urd must
"moose"
germanium or silicon.
in
similar
FET Drain Gate
Source
information
to testing.
provided
is
hollow
glass
or type
are
be
types,
packages
TO-3
to
bipolar
:
instruction
this
to
for
should be
of semiconductor
the APPENDIX
in
usually
diodes
can
cases
numbers
painted
protected
such as
Transistor
Collector Base Emitter
devices
recognized
be
with
either
printed
because
from
the'stud
generally have lead
transistors,
(case)
manual
tested by
used to identify
test
the
and
also.
by
three or
on them.
silicon
operating
is
ambient
package,
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with
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USING
MODEL 530
THE
I
{
IN-CIRCIIT
Make
TESTING
sure being tested, charged.
A. Transistors
1. Set the DRIVE
2. Connect the the three leads of the device test leads must
color Test kad Sockets Move
3. positions glows.
Switch whether the device is P
channel.
good
will do so in only
"THINGS
(see this
Test Switch
transistor
Identification good positions
IBad Identification Window
the cally all
BASE
4. If
there is lamps moved througlr its six the device under test
Device
a.
(-uy
b. Device with
Device
c.
"SPECIFICATIONS").
FET
d.
5. Re-test the transistors
most
adjacent Test BASE
Window.
then be identified. If
6.
the device tests
4(d)
above
If
the device
7.
position, circuit cedures.
SCR'S:
B.
the DRIVE switch
Set
1.
CAI.]"fION
all
power
is turned
off
in the
circuit
and that all capacitors are dis-
FET's:
and
Switch
three
be
(5)
test
leads
plugged
to the LO
you
into their
position.
(in
any manner) to
wish to test. The
respective
(6).
the Test
Switch
until one of the two red
A tone also will be
(8)
is ON. The lamp that
In LO
TO KNOW
(4)
NPN
drive,
most transistors
one
ABOUT
position,
through
slowly
lamps
(1)
heard if SPEAKER
glows
(l)
or PNP
indicates
(2)
that test
Test
Switch
THE 530").
all the leads of the
can be identified as shown in the I-ead
(LO
or
having junction
color indicated is
Window
good
no
glows)
as
with high
not function
(3).
HI
drive)
the
FET's
indication
Most FET's
in
same BASE
are
gate
the
(neither
the Test Switch
positions,
of
is one
the
leakage
properly
two
Test Switch
color shown in
will test
(3),
since
symmetrical. The
Iead of the
of the two
(a)
is slowly
in LO drive, then
following:
or very low
in
circuit).
open/shorted elements.
with excessive
that
will
device,
that test
Switch
shown
color
Only the
be true.
could
does not
HI
in
drive,
not test with
using HI
base
good
circuit shunting
LO drive.
drive. In
good
positions
in the kad
lead of the
using HI
test lemove
drive, then 4(a) or
good
in any Test Switch
the
HI
will do
so in
having the same
Identification
transistor
from the
device
and re-test using OUT-OF-CIRCUIT
(5)
to the
position.
HI
its six
(2),
or
or N oi
position
In
practi-
FET.
gain
(see
drive,
/wo
can
pro-
2. Connect the tfuee
3. Move
the three leads of the
the Test Switch positions until the position and position the
4.
The SCR
b. One
are a. One
haying
Identification
Lead
is
obtained:
NPN. PNP,
good
NOTE: indications
IDENTIFICATION:
LEAD
a. The BASE color
Window
tion NPN lamp
BASE color
Window
tion
(2)
PNP
the SCR
the
circuit
lamp
tests
5.
b. The
If from to excessive shunting
procedures.
circuit
Diodes:
C.
l. Set
LEAKAGE
2. Set Test Switch identification).
3. Set
4. Connect
NPN/PNP Switch
the
to
diode
be
tested.
blue
5. Adjust the LEAKAGE
approximately
panel.
trol
6.
7.
Depress while Switch (Green
While
the
keeping
(a)
to each identification.)
base
performing
LEAKAGE/GAIN
approximately
be
will Test Switch
Switch
Test
the shunting
on position ihe diode
having
cation full-scale heavily example,
-or
relay should re-tested
(
will
giving
under
the collector
Window
readings
shunted
transient
a
solenoid
a
be disconnected
using
(in
leads
test
you
(4)
wish to
slowly
SCR
NPN lamp
PNP lamp
a different
(2)
BASE
Window
following indications
the
if
only
is
the
same BASE
in the
gate
must
not have
shown
(3)
(1) glows.
in the
shown
cathode lead when
is the
glows.
should be
bad, then
and
it
tested again
in-circuit),
VOLTS control
(a)
to top
(12)
yellow
and
(14)
position
to PNP.
test leads across
VOLTS Control
l0 volts, as
indicated on
PUSH-TO-TEST this switch
while
)
give
the highest
test
(3). by
depressed,
of
step Meter
upper
the
6, observe
(19).
full scale
other
the
a lower
effect of
the circuitry.
reading,
is connected
(C)
color
If
both
the diode
low-resistance
The for one
reading, depending
in the is either
suppressor
In this case
coil.
from
OUT-OF-CIRCUIT
any manner)
test.
through
(l)
glows
glows
in
as shown in
color
(3).
color.
ldentifica'
kad
when
lead
ldentifica'
kad
removed
(muy
be
using
to zero.
(Green
the
Switch
(13)
rotate
two
results
the
the
positions.
meter
position of
position of
cuthode of
the
test lead
to the
positions
Lead
Identifi' produce
shorted
circuitry;
across
diode
the diode
the circuit
procedures.
to
its six
in one
another
the
the
subjebt
out'of-
base
the
(1a)
to
con'
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lest
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the
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(19).
meter
fr Tests:
3. Measurement
transistors A detailed provided in the appendix
of the
is
complex
explanation
parameters of bipolar
fr
theory and
in
of
of this manual.
performance.
fr measurements
position
uppermost position Switch
cation Connections provided
is
Socket
indicated
required,
for
position
for
positions
[rad
in
can
the device
or
(7).
The
an
by
"NC"
is
have
ldentification
be
"X".
entered.
I and Both
2. the
made
can
required
Where no connection
the adjacent
of
green
base
Window
the
to
inserted
be
connections
these
identifi-
test
into
Test
(3).
leads
Test
are
is
When
measuring
some transistors.
with may occur and the G500 is
always numerical the 0-500 rimge
To obtain reliable
a.
frequency characteristics
under test, the
of the device
previous
the Insert
b.
appropriate transistor leads must socket be made the three-lead connections additional the accuracy three-lead adapter absolutely necessary.
the fr
Set
c.
1500 range
0­meter
If the reading
d.
the transistor
of
fr, it is
on two
the range
value
lead designations.
(18)
ranges, such
MHz ranges.
reading
(in
this
applies).
lead identification
must
tests.
the transistor under
test socket
fr
to fit into
adapter
the
to
lead length
of
RANGE
and read
the
on
greater
is
under
important to
the same meter deflection
The fr of the transistor
that
example,
information
known
be
properly
If
the socket
provided to
transistor.
can be detrimental
this test; therefore,
should be
MHz Switch
the
MHz
1500
than 300, this is the
test.
know that,
as the 0-100
gives
the highest
the reading on
regarding
of the
(15)
the device
transistor
polarity
and
as determined
into the
test
(16).
or
match
cannot
provided,
make
Note that any
used only
(17)
to the
value on the fr
scale.
MHz
the
The
the
use
the
to
the
in
i
NUMBER
LEAD COLOR
TEST
(3)
Yellow
Device
Tests
BVCES, BVCEO,
ICpS
ICEO
BVCBO,tCgO
BVCpS
4. With Base
a.
b.
c.
IgCS
Ip,CO Ig,gO
BVECS, BVECO, BVEBO,
if
fr
Emitter
X X
NC
X X X
(Collector-Emitter
Shorted
Connect into the
Make position.
Move the which dicated by
transistor
test socket
the DRIVE
sure
Test Switch
produces a
the
AND
(2)
Green
Base
X
NC
X X NC X
to Emitter):
to the
(7).
switch
good
polarity
lights
(l)
Blue
Collector
X X X X X NC
Breakdown
test leads or
(5)
is in the
(4)
to the
indication,
(l)
or
(2).
Test Switch Position
I I
I 2 2 2
Voltage
plug
LO
position
in-
as
it
1
!
I
{
I
l
e. If the observed
the RANGE,
and observe
range reading transistor
If
f .
the observed RANGE, and observe
the transistor
of readings
If
E.
All eliminate the identification when the device lead the following required for positions
there
ranges
absolute
NOTE
voltage and
of
MHz
greater than
is
under
MHz
meter
below 5 on
is a difference
the scales
where
value for
ON
BREAKDOWN
breakdown
need to
when
beginning
table
the
device
Test Switch
less than 300, set
reading
test.
reading
switch
under
VOLTAGE AND
identification
indicates
is
switch
(18).
fr is the
know
(4)
(17)
the
meter
50,
this
is less than
(17)
to the
This
test. The accuracy
range is
this
in readings
overlap,
most accurate.
TESTS
tests outlined here
the device lead
test.
the
the connections
tests. The indicated
correspond
to the 0'500
(18).
If
the
is the fr of
0-100 range
is the fr reading
questionable.
the
In
is known,
to the
the
50, set the
of
on two
largest
cases
good-bad
If the
good
rn a of identified test
to about
and move positions which
the lowest GAIN transistor
d. Set
e. Set
indication
Test Switch
by observations
as follows:
o
Set the
10 volts.
o
Depress
the Test
r
Test Switch
The
indicated
(19)
Meter
leads can
the NPN/PM corresponding which lights.
the LEAKAGE
zero.
NOTE
paragraph
of
test
in two adjacent
(4),
the collector
LEAKAGE
PUSH-TO-TEST
the
gave a
is
VOLTS
Switch
be identified.
(4)
good
(4)
position
current
position in.which
the
Switch
to the
"A-1"
results
positions
can
during
indication.
VOLTS Control
the leakage
Control
Switch
between
LEAKAGE/
on
(12)
polarity
the
which
to
light
(14)
(13)
two
gives
the
(1)
be
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Depress
d.
set the LEAKAGE VOLTS specified
PUSH-TO-TEST
the
test voltage.
button
control
(13)
(14)
and
to the
e.
Disconnect the voltmeter, if used, after the test
voltage has been
age
current
measurement will
set; otherwise the
in error.
be
leak-
Disconnect test voltage age current
With'the
f.
pressed, indicated on This test.
10. BVB3O With
Collector
a.
Set the LEAKAGE VOLTS zeto,
Set the
b.
adjacent paragraph indication
Disconnect
c.
connecting bending the transistor emitter
Depress
d.
adjust the until a current is meter device measured accurately impedance voltmeter emitter not leave the voltage is
the voltmeter, if used, after the
been set; otherwise the leak-
has
measurement
PUSH-TO-TEST
observe
LEAKAGE/GAIN meter
1699
is the
(Reverse
Emitter-Base
Open):
Test Switch
to that
"2"
which
in kad Identification
the
collector lead, either
the test lead if
collector lead and
in Test Socket
and base leads are
the PUSH-TO-TEST
LEAKAGE VOLTS
increase
sharp
observed on LEAKAGE/GAIN
(19).
This is
under test. This voltage
terminals of the
voltmeter
adjusted.
will
the leakage
value of the device
Breakdown
(4)
used for the BV6'ps
has the
so
(7)
connected.
or
the BVegO voltage
by
connecting a
across the
device under test.
connected after the
in error.
be
button
sudden change in
(13)
de-
current
Control
to
the
sarne*Firr
Window
connected, or by
inserting the
so that
switch
Control
as
(19).
under
Voltage
(la)
to
position
test of
color
(3).
by
dis-
the
only
(13)
and
(14)
of the
can be
high-
base and
Do
With pressed, dicated is
the
12. BVBCO Volfage With
a. Set
zeto.
Set the Test Switch
b.
adjacent to paiagfaph indication in I-ead Identification Window
Disconnect the
c.
necting the test lead if so bending the base sistor in Test Socket emitter and
Depress the adjust the LEAKAGE VOLTS until current is observed on LEAKAGE/GAIN meter device under test. This voltage measured accurately impedance emitter terminals of the not voltage
I3CO
13.
Base
Open):
PUSH-TO-TEST
the
observe
LEAKAGE/GAIN meter
on
IpgO
value of
(Reverse
Base Open):
LEAKAGE VOLTS
the
that
"2"
which has the same-Fise
collector
PUSH-TO-TEST
a sharp
(19).
leave the
is adjusted.
(Reverse
increase or
This is the BVECO voltage
voltmeter across the
voltmeter
Emitter-Collector
the leakage current as
the
button
device under
Emitter-Collector
(13)
(19).
test.
Breakdown
Control
(4)
to the
used for the BV6'pg test
lead, either
base
lead
connected, or by
and inserting the tran-
(7)
so that
leads are
switch
sudden change in
by connecting a
device
connected
position
by discon-
only
connected.
(13)
control
can be
collector and
under test. Do
after
Current
de-
This
(14)
color
and
(14)
of
high-
With
in-
to
of
(3).
the
the
the
l4
(Reverse
IBgg
11. tor
Open):
This
current
voltage.
follows:
a. Leave
in the The transistor
b.
the If
c.
required, the AGE VOLTS exact test impedance voltmeter base
d. Depress the
set the specified
Emitter-Base
is
a specified limit at a
If
these values are known,
Test Switch previous
previous
only an approximate voltage indication
terminals
LEAKAGE VOLTS
test. connections
test.
panel control
voltage is desired, connect a high-
of the device
PUSH-TO-TEST
test voltage.
Current With Collec-
specified test
proceed
(4)
in
the
calibration of the LEAK-
(14)
to the emitter and
position
test
are the
can
under test.
control
same as in
be used.
button
(14)
(13)
to the
used
If the
as
is
and
This
current is a specified limit voltage. If follows:
Leave
a.
in The
b.
the If
required, AGE VOLTS exact test impedance collector terminals
Depress
d.
set the specified test voltage.
e.
Disconnect test age
these values
Test
Switch
previous
the
transistor
previous
only
voltage
current measurement
test.
an approximate voltage
the panel
control
voltage is
voltmeter to
PUSH-TO-TEST
the
LEAKAGE VOLTS
the voltmeter,
has
at a specified
arc known,
(a)
in the
test.
connections are
calibration of the LEAK-
of the
been
test
the same as in
(14)
can be used.
desired, connect a
the emitter
device under test.
button
control
used, after the
if
set;
otherwise the leak-
will
in error.
be
proceed
position
indication
(13)
(14)
used
If
high-
to the
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as
is
the
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SI
3. IpSS
Current:
Currents
l0 volts;
up
the microamps the Ip55
values
to 5
current
when
milliamps
testing
for
drain-to-source.voltages
values
obtained considered characteristic
Fig.
(Sqf. full-scale considerably reading value
is
geater
is
measured
between
accurate
usually is
3). Most power
readings
higher
obtained
than 5
accurately
can
be
indication
above
10 volts.
many J-FET's
above
l0 volts,
5
and l0
because
the
constant
FET's
because
than 5
the IpSS
milliamps. If
below 5 volts,
milliamps
with
the Model
measured
is
limited
Although
are
specified
the Ip55
volts
drain
above
a few
will
values a
full-scale
the
actual IOSS
and
cannot
530.
below
to 100
at
cariSe
current
volts
provide
are
be
microamperes some cases
FET
4.
Gate
to-Gate lrakage.
Note
a.
in the GOOD test.
b. Set
polarity Set LEAKAGE
c.
volts, age,
to several
will be
l-eakage:
the
Drain-to-Gate and/or Source-
polarity
the NPN/PNP
that indicated in
of
VOLTS Adjust
approximately,
if known.
milliamperes,
limited
to 5 mA.
indicated by
(12)
Switch
(a).
or the desired
lights
to the
(14)
and in
(1)
(2)
or
opposite
l0
to
test volt-
I
I
a
s
F3 z
Llj (E
E l
=.
-il
G
o
I
Fig. 3.
a.
b.
c.
e.
f.
'cs=0
/
l,/
t/
It
a
f,
17
I
I
7
246810
Vs5-
DRAIN SOURCE
Typical
Set zeto.
Move Test
produces a good Set the NPN/PNP switch
indicated by GOOD Depress the Increase LEAKAGE
observe LEAKAGE/GAIN meter exceed parameters meter can be connected source of the exact voltage corresponding served rent exceeds 5 exceeds 100
panel
cause of The LEAIGGE/GAIN meter
IpSS.
depletion
mode
the LEAKAGE
Switch
(4)
indication.
test lights
PUSH-TO-TEST
VOLTS
volts unless
10
known. A
are
the
device
IOSS
reading. Once
milliamps
microamps
voltage calibration does
the
IpSS
built-in
of
current limiting circuitry.
FET's
T--------
(VOLTS)
VOLTAGE
FET
VOLTS
to a
(12)
button
FET
the
high-impedance
across the drain
test to
under
the observed cur-
below
above l0 volts, the
range from
can
I
V
I
-0
2v
-0
4v
I
-0
6v
i
-0
8v
I
10V
I
-r
,y
-------
t4v
I
characteristics.
or
(14)
which
position
(2).
control
position
to the
(l)
(13).
(14)
control
(19).
type and
and
Do not
test
volt-
and
determine
to an ob-
10 volts or
not
apply be-
(19)
will read
a few
to
d. Depress the
(13) six meter will
Test Switch
FET
5.
(Junction
a. With the
inserted in Switch Switch La*p
Note
b.
Identification connection
c.
Set LEAKAGE
d.
Set the polarity
e. Pqsition
associated with the
Window
f.
Depress slowly (14) until a sudden indicated on LEAKAGE/GAIN The have FET's:
MOS-FET:
Depletion
6.
PUSH-TO-TEST
and move
positions
(19).
the Test Switch
and watch
If
the device
indicate zero current
positions.
Drain-to-Gate
or Source-to-Gate
Diodes):
FET connected
test socket
(5)
in
(4)
until
(2)
(l)
or
the base
position
HI
the
good
a
will light.
which appears
color Window
gate
to the
VOLTS
NPN/PNP
indicated
the
Test
switch
by lights Switch
the
collector lead
in the
(3). the PUSH-TO-TEST
adjust the
starting
LEAKAGE VOLTS
zero
at
increase
current and the
following
the
J-FET:
Forward for
meaning for
gate-to-channel
the
tion. The Breakdown
combined channel
leakage protection device.
Mode
FET's
(low-power):
button
(4)
switch
through all
LEAKAGE/GAIN
good,
is
in two
the meter
the six
of
Leakage
place
leads or
DRIVE
to the test
(7)
and operate
indication
is obtained.
in the
(3).
This identifies
FET under test.
of the
(12)
to
(l)
or
so that the
lead
is
Lead
ldentification
switch
(14)
to z.ero.
match the.
(2).
indicated
(13)
control
(4)
gate
control
gradually
and
in
leakage
increasing current is
meter
corresponding voltage
two
types of
bias
current
and
voltage
P-N
voltage for
of
currents
the
gate-to-
current and the
diode
if present on
,
Test
l*ad
the
color
as
and
(19).
junc-
the
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PNP
good
indication.
4. The
SCR is
obtained. a. One NPN indication. b. One
Indications
c.
only
must not have same BASE color.
all
if
the following are
LEAD IDENTIFICATION:
a.
The BASE tion NPN
b. The
tion Window is the cathode PNP
color shown Window lamp
BASE lamp
(3)
(l)
color shown in the kad
(2)
is the
glows.
glows.
in the I*ad
gate
lead
lead
ldeptifica-
when the
ldentifica-
when the
A. Test
B. Good/Bad Test Circuitry
Switch
The 530
l.
lever switch front
device being testing. positions, the three test leads or is
further testing.
"normal" connected
the testing
test leads are emitter
for
In two
2.
device is
circuitry. This is true since all bipolar transistors have
collector and
junction
switch
display the same
tion Window
good
In LO
3.
only one test switch
drive and lower detection sensitivity allow the
detector to test
gain
single test switch
properly
530.
l. The
generators to test
second. These short, high-current applied to the for testing NPN/N-CH devices, followed
negative
During polarity which saturation.
semiconductor tester uses a six-position
located
panel.
This switch
tested
this test switch is
As
the device that is
connected
FET's).
gain,
device.
drive,
connection.
Model 530
a device
these
drives
in all
The
connection,
in the standard triangle
circuits and
connected
circuits
positions
is applied to
respectively
of the six
connected
although usually very
emitter
FET's
are symmetrical. These
whenever
a transistor should indicate
the device
for further
produce
that
periodically,
collector
pulse
for testing
pulses,
the
(See
Fig. 4,
MODEL 530 CIRCUIT
at the top right
is used
in the
plugged
possible
uppermost
that the
to the
positions,
properly
interchanged,
are
are always adjacent and always
base color
A device that indicates position
test circuitry
collector
the 530
position
as
in LO drive is
gain
testing with the
a series of
(drain);
shorter
a
the
base
(drain)
pulses
to
correct'
moved
connected
into the test socket
configurations
position
is
test
the
configuration
green
blue,
collector, base, and
(drain, gate
using
for the
little,
in the lBad Identifica-
is
since limited
good
only
uses two
pulses
about
seven
the first is
PM/P-CH
pulse
(gate)
of the device,
voltage toward
A and B.)
of the
corner
connect
manner
through its
either to
is the
socket is
yellow
and
and source
HI
drive, the basic
when the
and most
two
indicating
good
in its
good
connected
Model
clock
designed
times
pulses
positive
by
devices.
of the
the
for
for
test
test
base high
in a
per
are
same
to
DESCRIPTION
Taking
refer which test
I and flip-flop 2. mately 500 Hz circuits.
2.
The toggles sequence circuit, and the
The circuits arc which
+5V A
3.
will see The the waveform'B'.
Note
a
in
a
collector first
If collector its going action
and
of If a PNP
transition form This and the
latch flip-flop
Of output, since similarly gating reaching flipflops I and indications.
The input to
a closer look at the
Fig.
to
runs
period
pulse-forming
collector
can deliver several
and
properly
collector
base
that during
negative
the device
base
transition,
is
the signal
Fig.
'A'
transition
course,
4 and schematic.
at approximately 7
while simultaneously resetting flip-flop
and RS
pulses for
of
base
(drain)
level-shifting
-5V,
or return to zerovolts.
connected
both waveforms
(drain)
(gate)
of the
(drain)
and being tested is
(drain)
(gate)
is
present
produced
4. or P-channel
occurs during the
Fig.
of
produced
2 of
other
all
differentiated, but the synchronized
circuits
prevent
flip-flop
basic test
The slow
llz,
initiates each
fast
The
and controls
circuit uses a
flip-flop to
the collector
(gate)
drive
and the base
hundred
NPN or N-channel
'A'
will
device under test
positive
the
voltage, the base
positive.
then
voltage
(a
4,
(positive-going)
pulses
voltage
will drop
positive.
driven
which will only occur if
good
device), is differentiated
is
device is tested, the turn-on
and in
signal is inverted
Fig.4.
appear at the
transitions of
the unwanted
2, thus eliminating wrong
I is enabled only during the
runs
clock
produce
complementary drivers
and
see
waveform
NPN
used
second half
the opposite
at approxi-
pulse-forming
the
combination
the
(drain)
circuit.
(gate)
milliamperes
'B'
of
excursion of
(gate)
or N-channel,
abruptly when
This negative-
to latch flip-f[op 1
is differentiated
and
differentiator
pulsg
pulses
circuitry,
clock,
of
proper
drive
drive
at
device
(Fig.
a).
'A',
and
will see
the
is driven
the
gain
of
wave-
direction.
used to
'A'
are
from
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4.
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+5V
or tested was a P-channel. The output
a LED
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When either flip-flop
driver is activated through the
Leakage/Breakdown
c.
1. The
2. Taking a
530 leakage/breakdown
externally
an and. current feedback, the
external load
A four-stage amplifier circuit
driver which in turn drives
meter to 5 mA non-linear scale.
voltage
in which a
and similarly
PNP or
Only the flip-flop
of device being
of flip-flops
-
5V,
depending
good
DRIVER
to turn on
the
LED.
speaker,
closer
circuitry,
the
NPN/N-channel
I or 2 is latched,
and
indicating a
Circuitry
Test
controlled
sensors
voltage regulator that
(See
Fig. 5
look
refer to
NPN or N-channel device
flip-flop
P-channel device can
which corresponds
tested
can
I and2 of
on whether
MN/P-channel
from
the activated
which
corresponding
audible
voltage
power
DC
control
and schematic).
at the leakage/breakdown
Fig. 5
2 is enabled
latched.
be Fig. 4 are either
the device
PIIP/
or
produces
good
automatically,
is used
the
and schematic.
flip-flop
enough
panel
front
or the
tone is heard
circuitry
supply.
PNP/
the speaker
device.
Voltage
feeds
to
drive
on a 0
meter,
be
to
uses
the
via
voltage-adjust
A
power
DC
panel
front
regulated circuit,
series
100V. The voltage
to voltage and current
contrbl
external
The
3. to the switch TEST TO-TEST
When panel can
the
impedance drops,
fed starts to through and constant the
lOV. If external voltage
a
indicated current will increase to
Further complete
zeto-. The can deliver
the load.
external load
voltage
(NPN
SWITCH,
the LEAKAGE
is turned clockwise,
go
up to
load current
through
back
reduce
the load.
voltage across
the
voltage below
current-limiting
reduction
potentiometer is
supply.
switch is
short,
vbltage
This
LEAKAGE
regulator
sensors,
voltage
N-channel/PNP
current
load
only
and current
(device
regulator
is activated
and
pressed.
DC, but
100V
100
is
the
the voltage
the voltage
This
of
the external
impedance
on
5 milliamperes.
of the load
will
regulator
5 mA
potentiometer which
VOLTS
and
under
VOLTS control
the external pA
voltage
output
100
about
circuit
the LEAKAGE/GAIN
reduce
to the
connected
control,
vary
it
can
is fed back
automatically
which
outputs
test)
is
through
P-channel),
this is
or
to maintain
pA
is reduced
is currentJimited
external load.
the
when
on
load
ture as
less. As
regulator
and current
voltage
will
continue
drops
load
the
to lower the
10
volts,
over and
takes
impedance,
load
to a
the
is
drives
zero
from
through
the
to
connected
polarity
the lever
PUSH-
the
front
the
voltage
long as the load which
sensors,
pA
100
reduction
until
to about
low
the
the
meter
up to
voltage
to
and
a
.ir
I
n c
.l
is
a
Fig.
Voltage
Adjust
R72
5. Block
diagram,
Voltage
Regulator
o11,
o10,
o12
og,o12
R70,R77
Amp
Stage
tc10, D14
D15,
leakage/breakdown circuitry.
D16,
D17
External
Device
Under
Load
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A.
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J.
4.
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SWITCH
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Meter
Turn the GAIN suitable meter
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the 530
off.
indicate zero,
indicate zrjro
on, if
zero,
turn the 530 power
the 530
five screws
panel).
back
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with
Refer to Fig. 8
Turn
(9)
to
and adjust zero
STRIP TRANSFORMER
If
LEAKAGE/
just
the LEAKAGE/
on. suitable screw-
"TRANSISTOR
if not, remove
insert a
below the
on top
on top
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scale.
scale,
meter
bbttom
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PWR
switch
meter
p
on
for
(19)
CAL
trimpot R-106 holding (9)
in the LEAKAGE/GAIN top
scale. Refer
B.
Leakage l. LEAKAGE/GAN
2. Plug
3.
4.
5.
Circuitry
calibrated
the Model
power
on.
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Test switch
NPN/PNP Connect a 5.1
milliamp sockets connected meter).
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Model
adjust front panel
so that
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the
TRANSISTOR
"TRANSISTOR
Calibration
per
as
switch
meter, to the
(6)
of the 530.
to
the
530 PUSH-TO-TEST
the
external
suitable screwdriver
to Fig. 8
KO resistor
meter
meter
section
530
into
(a)
to the
(12)
to
positive
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meter reads
SPEAKER
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BETA/FET gm
BETA" position)
(19)
for trimpot
(19)
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power
top-most
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blue
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lead
reads
should
above.
source
in series
yellow
an
socket
of the
switch
VOLTS
0.9
milliamp
switch
so that
zero
location.
be zero
and turn
position.
with a DC
test
should
external
(13)
control
Set
lead
and
(14)
DC.
on
I
be
MAIN P. C.
26
BOARD
FRONT PANEL
Fig.
8.
Bottom
view
of Model
TEST
SCREW
530, with
bottom
#1
panel
removed.
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17,
Hi I Meter Scale
Fig.
"TRANSISTOR
pot
R-92 with
AGE/GAIN
value
CAL"
of the LEAKAGE/GAIN
p
11.
Hi
calibration
BETA"
position,
suitable screwdriver
(19)
meter (found
reads
step 6) on
in
meter
chart.
and adjust trim-
so that LEAK-
the recorded
the
"HI
p"
(19).
Pulse Height in
Volts
"HI
scale
p
{V}
Fig.
(d)
Adjust R-22
milliamperes
(e)
Remove sistor with lead be
between 9
operation.
NPN
12.
Field
NPN
into front
current
(See
Fig.
PNP
Socket
B
calibration,
for
a
(See
Fig.
Transistor
panel
meter in
l3).
Current
1l
and
Socket
fr
circuit.
collector
8
current of l0
for
location of R-22).
and insert PNP
socket
labeled PNP
series with
measured
milliamperes
the
for
Tran-
(15)
collector
should proper
E.
fr
Circuit Calibration
1.
Tum Model meter screwdriver adjust
2. Remove the two on
3.
Turn Model plugged meter on the RANGE, (18)
zero
4.
Calibration Equipment
(a) (b)
(c)
(18)
does
in
530
it to
indicate zero
the Model
five
screws
the
back
530 power
into fr
(18)
reading
does
not read
reading
(Fig.
of
Automatic
Required:
.
o
good
4ny
hecision Any known
sistors. Tum Model Insert NPN
sistor
socket
Place
current
(See
lead.
Fig.
off.
If fr
not indicate zero,
530
just
below
on
the
bottom on the
the hole
(three
panel).
on. Without
sockets
MHz
(15)
of zero
Switch
zero,
or
for
(17).
adjust
8). Bias
Circuit.
quality
Model
530
Transistor
labeled
meter in
digital Voltmeter (B
2S0).
good
NPN
power
on. into front panel
(16).
NPN
series with
12.)
OUT-OF-CIRCUIT
insert
a suitable
the
meter
top
scale.
panel
bottom
any
(16),
each
range
If
R-55
by
check
the fr
to obtain
and
removing
panel
and
transistors
for
fr
selected
meter
& K-
and PNP
Tran-
tran-
the
collector
Fig.
13.
Field
calibration,
5.
Calibration
a
oscillators.
Equipment
.
of I MHz, l0
Required:
Frequency
Counter
at frequency up
Precision
.
Any
Model 1801).
NPN
transistor with an fr
fr
circuit.
MHz,
and 30 MHz
-
100
mV sensitivity
to 30 MHz
(B
of
K-
&
greater
than 500 MHz.
.
Non-metalliccoil-adjustingtool.
(a)
Tum
Model
(b)
Insert
NPJrl labeled ments location
NPN
are
of
TP-4
530 power
transistor
(16).
taken
at
and
on.
into
front panel
All
frequency
TP-4.
oscillator
measure-
See Fig.
coils.
socket
8
for
28
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2.
(g)
Being
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front
edge toward the transformer.
board with in the vertical position components.
To replace previous
Removal
(u)
On the and RANGE
(b)
Turn the panel
of the
the
front
the front
the
steps for removal.
of fr P.C.
control panel,
remove
the Model
control
up,
MHz
panel
the
switch
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main
board
mounting
530 over
face
break
any wires,
P.C.
board
the
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edge
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for
full
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board, reverse
for
service.
pull
to remove
(17).
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the
access to
nut from
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and the
raise
the
slide it
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board
all
the
the knob
the
bottom
NOTES
(.)
Remove three
screws screws panel.
(d)
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(identified fr P.C.
board
o
Two
o
Two
(e)
Lift the
suitable position ponents.
(f)
To
replace
previous
the
bottom panel
in
the
in
the
back
the four P.C.
with
located screws screws
fr
board out
the fr P.C.
steps for removal.
bottom panel
panel
board
an asterick
as follows:
near
back
near front
for
access
by removing
nearest
panel.
panel.
and
board,
mounting
in Fig.
rotate
to
service
reverse
the
8)
and-
bottom
screws
fiom
it to
com-
the
two
the
a
the
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I€
FIELD-EFFECT
-
common
Bm
drain
current to
mode.
channel.
current A layer, or by the type of P-channel
depletion-mode
transistor zero current.
depletion-type
sistor having gate-source
increased
applied
drain
from
enhancement-mode
effect from
drain
enhancement-type
transistor for be appropriate
field-effect
is due conduction from terminals.
gaie
which effective.
insulated-gate
having insulated from
junction
effect
form
metal-oxide-semiconductor
sistor. An insulated-gate the channel
N-channel
that has
A
flow
channel
to
a finite value
gate-source
(D,
the
transistor zero current.
gate-source
zero
increased
entirely
a
(G,'g).
'the
one
fiunction-gate)
transistor
P-N
insulating
is
an N-type
TRANSISTORS
source
gate-to-source
region
may
bulk material.
or
such that
or
d). channel.
to a finite
having
polarity.
transistor.
channel
voltage
The electrode electric
or
junction(s)
oxide
field-effect
of
is influenced
physically
majority
N-channel.
operation.
changing the
field-effect appreciable
voltage;
decreased
voltage.
region
A
operation.
such that
field-effect
substantially
voltage;
by the
application of
A transistor
to the
controlled
applied
field due
field-effect
gate
more the
channel.
that uses one
with
layer
between each
material.
transistor. A
conduction
transfer
semiconductor
The
decreases
the
according
into which
value
flow
transistor.
electrodes
field-effect
the
field-effect
conductance.
voltage
by
a transverse
be an inversion
type of
carriers
operation
The
the"magnitude
transistor. channel channel
The
changing the
increases
transistor.
zero
the
channel
of
majority
by an electric field
between
associated
to the
or
channel.
(MOS)
channel.
in
material
channel
during
gate-source
A field-effect
conductivity for
conductivity
to the
majority
operation
gate-source
the magnitude
channel gate-source
a
in which
the
with
control voltage
field-effe
A
which
transistor. A field-
more
field-effect
transistor
gate
electrode
field-effect
Ratio of
common
electrical
layer,
is determined
conduction;i.e.,
of
a field-effect
voltage
of
polarity
carriers flow
of
field-effect
A
conductivity
conductivity
the
conduition
carriers through
gate
and source
the region
ct transistor
electrically
are
gate
regions
AC
source
in which
field.
a diffused
from
the drain
tran-
zero
may
of
the
field-
a
voltage
of
t[e
may
voltage of
arising
that
tran-
which
in
and the
transistor
be
a
in
is
substrate
insulated-gate material which
substrate
ing the electrodes.
tetrode
having active of other this definition.
triode field-effect
a
Ip
terminal.
IOSS
into the drain zero.
an
15
terminal.
ICSS reverse
source. The direct
junction-gate
is reverse-biased the drain terminal nal.
15
terminal.
VBGSS
voltage drain
Note:
glte VBGSSp'
having
V-BCSSp
breakdown with terminal
V-BCSSn
breakdown
with
terminal
(U,
u) of
that
contains
may
be connected to
-
of
material that
insulating
gate,
-
drain current,
­This is an
off-state
-
gate
-
source
field-effect
a
a
a thin-film field-effect
field-effect
two independent
substrate terminated
elements
a
source, and a drain.
zerc-gate-voltage
current in
current,
field-effect transistor when
current,
-
gtesource
between
terminal
symbol
Jh9
should
shunting
-
forward
voltage
forward gate-source
short-circuited
reverse gate-source
voltage
reverse
short-circuited
vcsR.
VDD,
VG_G, source. connected
VSS
The DC
to
the reference
junction
a
field-effect
a channel, a
a terminal.
supports the
layer,
and
transistor. A
gates,
is
considered a
transistor. A
DC. The
terminal when
on-state
short-circuited
diodes or
gate-source
drain current. The direct
current
enhancement-type
an
DC. The
gate
current,
curient
with respect
is short-circuited
The direct
DC.
breakdown
gate
the
VB65g transistors. be used with
­supply voltage
and is
similar voltage-limiting
gate-source
between
voltage
to
the
between
voltage
to the
DC
supply
terminal.
field-effect
transistor.
thin semiconductor
the
source,
a source,
externally
gate
field-effect
direct
the
in a depletion-type
direct
drain short-circuited
into the
to the
voltage. The breakdown
source
to
primarily
The
insulated-gate
breakdown
gate
the
source
breakdown gate
the
voltage
transistor or
A semiconductor
source, and a drain
transistor. An insulat-
gate,
field-effect
and a and independently for
the
transistor having
current into
gate-source
device.
current into
gate
terminal of
gate
the
source terminal
to the
source
current into the
terminals
the
source
used
symbols
applied
applied source
applied
with
VBCSSR
and terminal.
and
voltage.
source
and the
voltage.
source terminals
and terminal.
for
drain,
to
and
layer,
drain
and
transistor
drain.
An
purpose
the
drain
current
voltage
device,
gate
the
terminal
and
termi-
source
with
the
terminal.
junction-
tiansistors
devices.
The
terminals
drain
V65p.
See
The
the
drain
See
gate,
a ciicuit
an
of
is
to
a
or
P-channel
that has a P-type
source
into the
32
field-effect
(S,
r). A
channel.
transistor. A
conduction
region
from
field-effect
channel. which
majority
transistor
carriers
flow
VOC
drain
VOS
drain
-
drain-gate
gate
and
-
drain-source
and source
voltage.
terminals.
voltage.
terminals.
The DC voltage
The DC
voltage
between
between
the
the
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TERM
DEFINITION
+
V(NPN)
-
(PNP)
V
BVcps
IcEs
BVcno
Icgo
BVcpo
IcEo
Collector-emitter current
Collector-emitter emitter.
Collector-base
rent (Iggg)
Collector-base current
Collector-emitter
current
Collector-emitter
(lCgS)
(ICgO)
breakdown voltage
with
current with
breakdown
with the emitter open.
breakdown
with
current
the
with
the
base
shorted to emitter.
the
voltage
base
with
at a specified cur-
emitter
the
voltage
open.
the base open.
at a
specified
base
shorted to
open.
at a specified
+V (NPN)
+V(NPN)
-V
(PNP)
-V(PNP)
Bvpcs
IEcs
BvBco
Inco
Bvpgo
IBgo
Reverse emitter-collector specified collector.
Emitter-collector collector
Reverse emitter-collector specified
Emitter-collector reverse
Reverse emitter-base current
Emitter-base reverse
current
and
current
voltage.
(IfgO)
voltage.
(1865)
current
reverse voltage.
(IpCO)
with
current with
with
current
breakdown voltage
the
collector
breakdown
with
the
with
the
breakdown voltage
the
with
the
voltage
base shorted
base shorted
open.
base
the
base
at a specified
open.
collector
open
open
at a
to
to
at
and
and
+V(NPN
)
+V(NPN)
+V(NPN
)
-V(PNP)
-V(PNP)
-V(PNP)
34
SAION
st
Graphic Symbols
Semiconductor
Devices
for
semiconductor
Semiconductor rectifier diode;
Capacitive diode
Temperature-dependent d iode
Photosensitive
diode;
metallic
(varactor)
type
rectifier
A{-K
(]R
@
tlR
@
sTYrEr@
STYTE'O
O
\'^r
ry
Unidirectional
diode;
down
Bidirectional
down diode;
Light-activated type
negative
trigger
negative
trigger
resistance
diac
resistance break-
diac
break-
ilpil-typo
g
^g
PilP-type
ilpil_type
pi{p-typeg
,tr,r,@
b
$,-t
sTYrE2ou*
Photoemissive
Unidirectional
Bidirectional
diode
type
voltage regulator
diode;
a-r,
Q7
sTYr.Ero
OR
O
sTYrE2@
STYLET
o
sTYu2
@
Thyristor, bidirectional
Phototra (N gion
Current
PN P
N PN transistor
Unijunction
nsistor
-type)
PN
connection)
regulator
transistor
transistor
(without
diode
external base-re-
with N-type base
type; bi-switch
,@,
p
o4F
g
I
g
I
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tr
one high-frequency diyidual current deternrined transistor frequency tinres the low-frequency greater decreases divided illustrated than I MHz where frequency current decreased frequency
characteristics of following
is
gain
by 2
gain
of
the in the shorted
The above description
rnethod
transistor
than the
fr
characteristics
has
is constant from
by the transistor cut-off at
at a rate of
in Fig.
at
to
fr,
is the frequency
transistor
common emitter
mathematical
frequency (fc)
which
the
cut-off
each
tirue
l5
which
frequency
is the
value
a
according
DEFINITION
(AC)
to the
a transistor
6
for
the slope
the transistor
is equal
used
a
low-frequency
current
dB
the
transistor
of
to the
emitter.
equation :
to nleasure
of
a transistor.
DC up
characteristics.
and is defined
gain
current
frequency.
per
octave.
frequency
A at
is negative.
which
at
one.
Therefore, let
following
OF fr
which
at
one,
to
of
with
mode
current
can be
and the
and define
current
to
some
reduced
is gain).
At
the
current
(The
current
is doubled).
frequencies
can
the
gain
The highest
actually
the
current
us
definition:
current
the transistor
collector
versus
represented
fr EXPLANATION
tl're
Each
in-
gain.
This
frequency
is the
This
as the
(.707
dB
3
frequencies
gain
gain
This is greater
provide
gain
has
this
call
gain
frequency
by the
current that
is
gain
versus frequency that the than that of cut-off both transistors frequencies
U J
(,
Thus,
fr
tirnes
Fig.
Let
P=',*Jt*;ffi:t'
lxf=poxfc=fr
from
gain
is equal
frequency
one,
is
to the product
the
cut-off
l5 shows
frequency
low
transistor
of
the transistors
definition,
or
three examples
characteristics.
than transistor
can
fr
unity,
and
frequency.
be
of
current
A, but transistor
the
are
is the frequency
the above
the
of
It is interesting
gain
B; therefore,
same
different.
equation
frequency
low
transistor
of
transistor
A has a
although the
l-3dB)
9=17.7
which
at
shows
current
current
to observe
B is less
lower
fr of
the
cut-oif
gain
=
p
current
=
low
go
current
Therefore,
frequency:
frequencies
At
frequency:
a­lJ
frequency
po
+-lT-
r
gain
gain.
frequencies
at
t)-
,J
f
=
P
much
Ao
f
f,
f fc
Bo
-T=
greater
poxfc
-T--
-
-@
-
=
much
Po
po
!)
l'c
frequency
frequency
cut-off
less
than
than
the
cut-off
cut-off
15. p versus frequency
Fig.
TransistorAfr=poxfc= TransistorB Another example
frequency transistors,
greater
is
much
the
frequency, This method test
than
Transistor C fr
Taken
greater
Thus, a
current
frequencies
fr=0o
current
but, because of
from
practical
and
gain
of
that
=po
previous
a
than
the
fr=0xf=0oxfcwhenflfc
gain
at a frequency
then
multiply
is used
follows:
as
ro,
l00x l
=
fc
x
is transistor
the
x
cut-off
method
in
the
50x2MHz
that is less than
its high
other
two
=25
fc
equation,
frequency:
for
measuring fr
current
Model
tjinrirtors
MHz
which has a low-
C
frequency,
cut-off
transistors.
x
MHz
15
when
greater
than
gain
times frequency.
530 for
A,
B and
C.
=
l00MHz
=
100MHz
other
the
=
375MHz
the frequency
is to measure
the
three
two
its
cut-off
different
fr
is
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6E
WARRANTY SERVICE
INSTRUCTIONS
Refer
1.
2.
3. lf
If your
to the
adjustments Defgctive parts
period.
should state the model date the terms
of
the
above-mentioned
your
with Enclose or ship
agency
your
a letter
PREPAID
(see
list of authorized B & K-Precision
local
distributor for
MAINTENANCE
may
that
was
unit
Warranty.
the
unit,
list enclosed with unit).
be applicable.
removed
be sent
and serial number
pack describing the
from units which are within the One
PREPAID
purchased.
procedures
it securely
([IPS
preferred)
name
the
B &
DYNASCAN
2815
your
section of
to the
of the
parts
These
not
do
(preferably
problem
of
Service Deportment
K-Precision Product
Chicago, Illinois 60618
and the
to
your
CORPORATION
West
Irving
B & K-Precision
Service Department
unit from which the
will
service
nearest service agency,
exchanged
be
correct
in the original include nearest B &
agencies
Group
Park Road
instruction
Year
listed below.
parts
at
problem you
the
your
carton
name and address.
K-Precision
has
been
or write to:
manual for
Limited
were removed and
no
charge,
or
authorized
misplaced,
Warranty
Be
under the
experiencing
are
double-packed).
Deliver
sure to
to,
service
contact
40
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98909
B
& K.PRECISION
MODEL
488-195-9-OO3
530 PAR.TS
LIST
SCHEMATIC SYMBOL
R85
R79
R83,
81 Rl21 R101,
55 R22,97 R72 R92,
106 R56,59 RI03,58
c44 c42 c39,39,40,41 c20',25
c56,
57
,47,
50,49
c56,46 c43
L1 L2 L3
DESCRIPTION
RESISTORS
g-lKo,
!2%,r/qw,
y2%,y;W,
L3Ko,
!2%,y4W,
18KO, 199_KO,. ?0%, /eW,Horizontal
qg!{o,
$9Vo,laW,Horizontal
lg$sffl, P9Vo, 30Ksl,
I_0_0KQ,- P.0 ?!ta,P0_V9,lcW,Honzontal
IKdl,,!20%,/cW,Horizontal
W,
+\07o,r/zW,Linear
7.o'_!:Y,
& CONTROIS
Deposited Deposited Deposited
Hotizontal
C:rbon
Horizontal
CAPACITORS
@I,iOVDC
lQy.f l9Q{r@_10VDC
@25VDC
1Q09qr
47p,t@6.3vDcTantalum­.orur
|
250vDc
@
.9474@?J0V .|pt@l00VPolyester..
Electrolytic Electrolytic
Electrolytic
polyester
Polyester
coIIs
Oscillator, Oscillator, Oscillator,30MHz
I
MHz
lg
MHz
Carbon Carbon C:rbon
Mount Mount Mount
Pot . .
Mount Mount Mount
Linear
Trimpot
Linear
Trimpbt . .009-224-i{0
Linear
Trimirot .
Linear Linear Linear
.....
Trimpot . Trimpot Trimiot .
B&K
PART NO.
002-039-9{0 002{40-9{0 002{41-9{0
.
008-2
1 6-9-00
.
008-241-9-00
.
.008-301-9{0
008-286-9{0
. . .
00g-297-9-00
. .008-289-9{0
.
021{40-9{01
.
022{50_t{0i
022084-ri0r
...027-013-9{01
.
.025427-9-001
....025-096-9{01
....025-I2O-gOOi
....044-035-9{01
. .
.044{36-t{0i
...044{39-g{Oi
coltrPosrrE
499-n4-9-ml
MODEL
530
PARTS
UST
SCTIEMATIC SYMBOL
Dl4,
15,
16,
r7,24,25
D19,20,21,22,
23,3I,33,34, 35,
1,2,3,
13,18,32
8D4,5,6,7rL0,
It,27,28,30
D9,
10
D12,26
Q9,10,
Ir,12
Q4,5
2,
3,14,
Ql,
17,18,19, 22,24,29
Q13,20,21,23,
25,26,27, 28, 16
Qls
IC1, IC6, ICg,
rc3
ICl0
lc2,rc4,Ic7,Icg
IC5
DESCRIPIION
DIODES
IN695,GermaniumDiode
l
IN4148,
Rectifier
l
5.1V,
{Vo,IW Zener l2V,!5%,1W 2N5550
MPS
2369 NPN
MPS
6515 NPN
MPS
6519 PNP Transistor
)
SPS-2306
AND
Silicon
Diode
Diode
Zener
NPNTransistor
Transistor
Transistor
NPNTransistor.
INTEGRATED
LM324, 4013, 4011, 40z3,Triple
Quad
Dud
Quad
OP-Amp
D Flip-Flop
2Input
Nand
3Input
TRANSISTORS
Diode
Diode
.
.
CIRCI,IITS
Gate
Nand
Gate
B&K PART
NO.
...150{02-9{01
.
151-038-9{01
.
151{50-9{01
.
152-030-9-001
. .
152{39-9{01
....176133-9{01
. . tZ6{49-9O01
. .
126-050-9{01
. . .
t77-OtS-9-001
...t76{.29-9-001
307-060-9{01 307-062-9{01
. . . .
307-063-9-001
...307470-9{01
S9
s4
S1
s3
S8
s2 s6
s7
S5
SWITCHES
Iradldentification,hver Spring Return, fr
Range, SPDT, DPDT, DPDT,
i$|T:
Momentary4-Pole,Push-Button
Rotary
.
MHz
(Speaker
Slide
(Power
Slide
PC
33!il$!
(Drive
Slide,
S'*l/H'*,' : : : :
ON/OFF)
ON/OFF)
LO/HI)
: : . : : :
....080{02-9401
. . .084-001-9{01
. . . .084{01-9{03
. . . .
: : : : : : :
:1084{4se{01
...088-029-9-001
.083-195-9-001 .083-205-9{01
084{43-9-001
ots
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Standard value schematic previous Advance ordering
B
diagram. open remittance
replacement
& K-PRECISION.
Minimum
account
must cover
parts.
resistors
and capacitors
charge
arrangements
postage
DYNAIrcAN
$5.00
have
CORP.
are
per
invoice.
been
or
express
o
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listed.
not
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made
charges.
Cortland
Values
will
or remittance
b€
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60035
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