Bitatek IM0002 Users Manual
Frey M1 Module
18 July 2016
Version 2.0
Page 1
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax+886 2 2290 0029
Contents
Charpt 1. Revision History ..................................................................... 4
Charpt 2. Introduction ............................................................................ 5
Charpt 3. Product Concept ................................................................ .... 6
3.1. Main Feature .......................................................................... 6
3.1.1. Chipset on module ................................................................. 6
3.1.2. Memory .................................................................................. 6
3.1.3. Multimedia ............................................................................. 6
3.1.4. Audio (PM8952 codec ) ......................................................... 7
3.1.5. Expansion Slot Interface ........................................................ 7
3.1.6. USB ....................................................................................... 7
3.1.7. Keypad................................................................................... 7
3.1.8. Dimension .............................................................................. 7
3.1.9. Operation temperature ........................................................... 7
3.2. Module Block Diagram ........................................................... 8
3.3. Pin Definition .......................................................................... 8
3.4. Pad assignments (Top view) ................................ ................ 27
3.5. Electrical Specification ......................................................... 28
3.5.1. Input power specification ..................................................... 28
3.5.2. Output power specification ................................................... 29
3.5.3. Current consumption ........................................................... 32
3.5.4. Digital logic characteristics ................................................... 32
3.5.5. Coin-cell charging ................................................................ 34
3.5.6. Audio ................................................................................... 34
3.5.7. Vibrator ................................................................................ 37
3.5.8. Display ± bias ...................................................................... 37
3.5.9. Flash drivers (including torch mode) .................................... 38
3.5.10. Display backlight (WLEDs) .................................................. 39
3.5.11. System clock (BB_CLK)....................................................... 40
3.5.12. RF Transmit and Receiver Specifications ............................ 40
3.5.13. Electrostatic Discharge ........................................................ 42
Charpt 4. Module Mounting Issues ...................................................... 44
4.1. Solder Paste ........................................................................ 44
4.2. Stencil Printing ..................................................................... 44
Page 2
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4.2.1. General Stencil Considerations ........................................... 44
4.2.2. Used Parameters and Recommendations ........................... 45
4.2.3. Pick and Place ..................................................................... 45
4.2.4. Reflow Profile ....................................................................... 45
4.3. Soldering Conditions and Temperature ............................... 47
4.3.1. Reflow Profile ....................................................................... 47
4.3.2. Maximum Temperature and Duration .................................. 48
4.4. Soldering Process Evaluation .............................................. 48
4.4.1. Visual Inspection .................................................................. 48
4.4.2. X-Ray Inspection and Void Content ..................................... 48
4.5. Board Level Reliability Investigation .................................... 49
4.6. Desoldering Process ............................................................ 50
4.6.1. Preparation of LGA Module ................................................. 51
4.6.2. Baking of Application Board ................................................. 51
4.6.3. Removal of LGA Module ...................................................... 51
Charpt 5. Packaging ............................................................................ 52
5.1. Mechanical Dimensions of Frey M1 ..................................... 52
5.2. Shipping Materials ............................................................... 54
5.2.1. Moisture Barrier Bag ............................................................ 56
5.3. Packing Label ...................................................................... 58
5.4. Storage Conditions .............................................................. 62
5.5. Moisture Sensitivity Level .................................................... 63
5.6. Durability and Mechanical Handling ..................................... 63
5.6.1. Storage Life ......................................................................... 63
5.6.2. Processing Life .................................................................... 63
5.6.3. Electrostatic Discharge ........................................................ 63
Charpt 6. Regulatory and Type Approval Information.......................... 64
6.1. Safety Precautions ............................................................... 66
6.2. Safety .................................................................................. 68
Charpt 7. Appendix .............................................................................. 70
7.1. Abbreviations ....................................................................... 70
7.2. Mounting Advice Sheet ........................................................ 70
Page 3
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax+886 2 2290 0029
Version
Date
Description
1.00
2016/06/21
Initial release
2.00
2016/7/18
Update FCC statement
Charpt 1. Revision History
Changes to the original manual are listed below:
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
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Page 4
Charpt 2. Introduction
This document defines the specification for FREY M1. FREY M1 is a smart module for
handheld device and builds in Bluetooth, WiFi and GPS function. It also can support SD
card, LCM , Touch Screen , Audio , dual camera , Flash LED , Accelerometer /
Magnetometer / Gyroscope / Proximity & Light Sensor functions through application design
board.
Page 5
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Charpt 3. Product Concept
3.1. Main Feature
3.1.1. Chipset on module
Digital processor : APQ8052 (ARM Cortex-A53 octa cores)
Quad core at 1.516 GHz, 512 kB L2 cache
Quad core at 1.209 GHz, 512 kB L2 cache
Power management : PM8952 and PMI8952
WLAN/BT/FM : WCN3680B
WLAN IEEE 802.11a/b/g/n/ac dual bands
Bluetooth V2.1BER/EDR+3.0HS+4.1 LE
FM RDS & RBDS, RX only
GPS : WGR7640
GPS, Glonass , Galileo or Beidou
3.1.2. Memory
eMCP , 2GB LPDDR3 RAM plus 16GB eMMC Flash ROM
3.1.3. Multimedia
Display interface：
Support one 4-lane MIPI DSI port , FHD (1920 × 1200) 60 fps
Camera interface：
Support 4-lane + 4-lane or 4-lane + 2-lane + 1-lane MIPI CSI port
Two Flash LED interface
Graphics：
Qualcomm® Adreno™ 405
Touch screen：
Capacitive panels via external IC by I2C
Page 6
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Item
Min.
Typ.
Max.
Unit
Normal temperature range
Extreme temperature range
+15
-30
+25 +55
+70
°C
°C
3.1.4. Audio (PM8952 codec )
Support two Microphones interface with noise cancellation
Support one speaker interface
Support one receiver interface
Support one audio jack interface
Support one vibrator control interface
3.1.5. Expansion Slot Interface
One micro SD Memory slot interface with SDHC
UIM interface x1
3.1.6. USB
Support one USB OTG
3.1.7. Keypad
Support 5x5 Key matrix
3.1.8. Dimension
44 x 33.6 x 2.7 mm
3.1.9. Operation temperature
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Page 7
Pin
Number
Pin Name
Wakeup
Pad
Type
Functional description
Power
W18
USB_VBUS_IN
PI, PO
Input power from selected
source, or output during
USB-OTG.
W19
USB_VBUS_IN
PI, PO
Input power from selected
source, or output during
USB-OTG.
X18
USB_VBUS_IN
PI, PO
Input power from selected
source, or output during
3.2. Module Block Diagram
3.3. Pin Definition
AI : Analog input ; AO : Analog output ;
DI : Digital input ; DO : Digital output
PI : Power input ; PO : Power output
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USB-OTG.
X19
USB_VBUS_IN
PI, PO
Input power from selected
source, or output during
USB-OTG.
T18
VBATT
PI, PO
Battery power supply
T19
VBATT
PI, PO
Battery power supply
U18
VBATT
PI, PO
Battery power supply
U19
VBATT
PI, PO
Battery power supply
Z18
VPH_PWR
PI, PO
Primary system power
supply node
Z19
VPH_PWR
PI, PO
Primary system power
supply node
AA18
VPH_PWR
PI, PO
Primary system power
supply node
AA19
VPH_PWR
PI, PO
Primary system power
supply node
U16
VREG_L1
PO
LDO output
F16
VREG_L4
PO
LDO output
C15
VREG_L5
PO
LDO output
F12
VREG_L6
PO
LDO output
C19
VREG_L10
PO
LDO output
D17
VREG_L11
PO
LDO output
E13
VREG_L12
PO
LDO output
C18
VREG_L14
PO
LDO output
C16
VREG_L16
PO
LDO output
E16
VREG_L17
PO
LDO output
D19
VREG_L18
PO
LDO output
D18
VREG_L22
PO
LDO output
T17
VREG_L23
PO
LDO output
U17
PMI8952_VBIAS
PO
Dedicated voltage source
for battery-related resistor
networks, not use for other
purpose.
X20
SYSON
PO
LDO output that supplies
SCHG FET drivers
RTC Battery
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P20
VCOIN
PI, PO
For RTC battery.
Clock
F17
PM8952_BB_CLK2
DO
Buffered baseband
(low-power) XO clock 2
System
W17
KYPD_PWR_N
DI
Internal pull-up to dVdd;
keep C load < 10 pF. Dual
function:
1. Keypad power on;
initiates power on when
grounded
2. Can be configured as
stage 2 or stage 3 reset if
held LOW longer
X15
RESIN_N
DI
PMIC reset input ; initiates
stage 2 or stage 3 reset if
held LOW
W20
PMI8952_CHG_EN
DI
Charger enable
V20
CHG_VBAT_SNS
AI
Sensed battery voltage for
charger circuits
T20
BATT_ID
AI
Battery ID input to ADC;
also detects missing
battery
Y16
CS_MINUS
AI
Current sense resistor —
minus side (low side)
V15
CS_PLUS
AI
Current sense resistor —
plus side (high side)
V16
BATT_MINUS
AI
Battery minus (-) terminal
sense input
U15
BATT_PLUS
AI
Battery plus (+) terminal
sense input
X17
BATT_THERM
AI
Battery temperature input
to ADC (measures pack
temperature) , default NTC
is 47KΩ±1% in EVB
battery .
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V17
PA_THERM
AI
AMUX input – PA
thermistor divider
V19
PMI8952_USB_EN
DO
Enable USB path from
external power multiplexer
Y18
PMI8952_USB_SNS
AI
USB input voltage sense
pin from external power
multiplexer
V18
PMI8952_DC_EN
DO
Enable 2nd power path
from external power
multiplexer
Y19
PMI8952_DC_SNS
AI
2nd power voltage sense to
determine in or out of valid
range
Z16
NC NC
Keep it floating and doesn't
connect to GND.
Audio
H18
MIC_BIAS1
AO
Microphone bias #1
I18
MIC_BIAS2
AO
Microphone bias #2
H19
MIC1_IN_M
AI
Microphone input 1, minus
H20
MIC1_IN_P
AI
Microphone input 1, plus
M19
MIC2_IN
AI
Microphone input 2
L18
MIC3_IN
AI
Microphone input 3
K18
GND_CFILT
GND
Microphone bias filter
ground
J19
HPH_L
AO
Headphone output, left
channel
J20
HPH_R
AO
Headphone output, right
channel
K20
HPH_REF
AI
Headphone ground
reference
N18
HS_DET
AI
Headset detection
L20
EARO_M
AO
Earpiece output, minus (-)
L19
EARO_P
AO
Earpiece output, plus (+)
N20
SPKR_DRV_M
AO
Class-D speaker driver
output, minus (-)
N19
SPKR_DRV_P
AO
Class-D speaker driver
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Page 11
output, plus (+)
Vibrator
Y15
HAP_OUT_N
AO
Vibrator driver output
negative
Y14
HAP_OUT_P
AO
Vibrator driver output
positive
SD
V1
SDC2_CLK
DO
Secure digital controller 2
clock
X2
SDC2_CMD
DI,DO
Secure digital controller 2
command
W1
SDC2_DATA_0
DI,DO
Secure digital controller 2
data bit 0
V2
SDC2_DATA_1
DI,DO
Secure digital controller 2
data bit 1
V3
SDC2_DATA_2
DI,DO
Secure digital controller 2
data bit 2
W2
SDC2_DATA_3
DI,DO
Secure digital controller 2
data bit 3
USB
Z15
PMI8952_USB_ID
AI, AO
Dual function:
1. OTG mode enable
(programmable polarity;
can also be controlled by
OTG enable bit)
2. OTG ID monitor to detect
the OTG ID resistor value.
H13
USB_HS_DM
DI,DO
USB HS data minus
H14
USB_HS_DP
DI,DO
USB HS data plus
R19
PMI_USB_DM
DI
USB data minus for power
source detection only;
modem IC handles data
transactions
R18
PMI_USB_DP
DI
USB data plus for power
source detection only;
modem IC handles data
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transactions
LED driver
X9
VREG_WLED_ANOD
E
PO
LCM WLED boost output
Y13
WLED_SINK1
AO
WLED low-side current sink
input, string 1
Z14
WLED_SINK2
AO
WLED low-side current sink
input, string 2
Y12
WLED_SINK3
AO
WLED low-side current sink
input, string 3
Z12
WLED_SINK4
AO
WLED low-side current sink
input, string 4
W14
WLED_CABC
DI
Content adaptive backlight
control (CABC); PWM
signal from display
controller for dynamic
dimming of LCD
X16
FLASH_LED1
AO
High-side current source
for flash/torch LED1 anode
Z17
FLASH_LED2
AO
High-side current source
for flash/torch LED2 anode
Y17
CHARGE_LED_RED
AO
Current sink for charging
indication
Display
V14
VREG_DISP_N5V
PO
Regulated output for the
display’s negative bias
V13
VREG_DISP_P5V
PO
Regulated output for the
display’s positive bias
U14
NC NC
Keep it floating and doesn't
connect to GND.
K2
MIPI_DSI_CLK_N
DO
MIPI DSI clock negative
K3
MIPI_DSI_CLK_P
DO
MIPI DSI clock positive
J2
MIPI_DSI_LN0_N
DO
MIPI DSI data0 negative
J3
MIPI_DSI_LN0_P
DO
MIPI DSI data0 positive
I2
MIPI_DSI_LN1_N
DO
MIPI DSI data1 negative
I1
MIPI_DSI_LN1_P
DO
MIPI DSI data1 positive
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K1
MIPI_DSI_LN2_N
DO
MIPI DSI data2 negative
J1
MIPI_DSI_LN2_P
DO
MIPI DSI data2 positive
L2
MIPI_DSI_LN3_N
DO
MIPI DSI data3 negative
L3
MIPI_DSI_LN3_P
DO
MIPI DSI data3 positive
CAMERA
P3
MIPI_CSI0_CLK_N
DI
MIPI CSI clock negative
P2
MIPI_CSI0_CLK_P
DI
MIPI CSI0 clock positive
Q2
MIPI_CSI0_LN0_N
DI
MIPI CSI0 data0 negative
Q3
MIPI_CSI0_LN0_P
DI
MIPI CSI0 data0 positive
R2
MIPI_CSI0_LN2_N
DI
MIPI CSI0 data1 negative
S2
MIPI_CSI0_LN2_P
DI
MIPI CSI0 data1 positive
S1
MIPI_CSI0_LN3_N
DI
MIPI CSI0 data2 negative
R1
MIPI_CSI0_LN3_P
DI
MIPI CSI0 data2 positive
Q1
MIPI_CSI0_LN4_N
DI
MIPI CSI0 data3 negative
P1
MIPI_CSI0_LN4_P
DI
MIPI CSI0 data3 positive
N3
MIPI_CSI1_CLK_N
DI
MIPI CSI1 clock negative
N2
MIPI_CSI1_CLK_P
DI
MIPI CSI1 clock positive
O3
MIPI_CSI1_LN0_N
DI
MIPI CSI1 data0 negative
O2
MIPI_CSI1_LN0_P
DI
MIPI CSI1 data0 positive
N1
MIPI_CSI1_LN2_N
DI
MIPI CSI1 data1 negative
O1
MIPI_CSI1_LN2_P
DI
MIPI CSI1 data1 positive
M3
MIPI_CSI1_LN3_N
DI
MIPI CSI1 data2 negative
M2
MIPI_CSI1_LN3_P
DI
MIPI CSI1 data2 positive
L1
MIPI_CSI1_LN4_N
DI
MIPI CSI1 data3 negative
M1
MIPI_CSI1_LN4_P
DI
MIPI CSI1 data3 positive
Antenna
A2
WLAN_BT_ANT
ANT
WLAN/BT antenna
A19
GPS_ANT
ANT
GPS antenna
A13
FM_ANT
ANT
FM RX antenna
MPP(Multi-Purpose Pin)
X14
PMI8952_MPP_1
MPP
1. Configurable as digital
I/Os
2. Analog multiplexer inputs
3. Even MPPs configurable
as current sinks; odd MPPs
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configurable as analog
outputs
X13
PMI8952_MPP_2
MPP
1. Configurable as digital
I/Os
2. Analog multiplexer inputs
3. Even MPPs configurable
as current sinks; odd MPPs
configurable as analog
outputs
W13
PMI8952_MPP_3
MPP
1. Configurable as digital
I/Os
2. Analog multiplexer inputs
3. Even MPPs configurable
as current sinks; odd MPPs
configurable as analog
outputs
G16
PM8952_MPP_02
MPP
1. Configurable as digital
I/Os
2. Level-translating
bidirectional I/Os
3. Analog multiplexer inputs
4. Even MPPs can be
current sinks and odd
MPPs can be VREF buffer
outputs
F15
PM8952_MPP_03
MPP
1. Configurable as digital
I/Os
2. Level-translating
bidirectional I/Os
3. Analog multiplexer inputs
4. Even MPPs can be
current sinks and odd
MPPs can be VREF buffer
outputs
G15
PM8952_MPP_04
MPP
1. Configurable as digital
I/Os
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2. Level-translating
bidirectional I/Os
3. Analog multiplexer inputs
4. Even MPPs can be
current sinks and odd
MPPs can be VREF buffer
outputs
GPIO
E2
GPIO_0
GPIO
1. Configurable I/O
2. BLSP1_SPI_MOSI
3. BLSP1_UART_TX
F2
GPIO_1
GPIO
1. Configurable I/O
2. BLSP3_SPI_CS_N
3. BLSP3_I2C_SDA
4. GP_CLK_2B
E3
GPIO_2
V
GPIO
1. Configurable I/O
2. BLSP8_SPI_MISO
F3
GPIO_3
GPIO
1. Configurable I/O
2. BLSP1_SPI_CLK
3. BLSP1_UART_RFR_N
4. BLSP1_I2C_SCL
U4
GPIO_4
GPIO
1. Configurable I/O
2. BLSP2_SPI_MOSI
3. BLSP2_UART_TX
T4
GPIO_5
V
GPIO
1. Configurable I/O
2. BLSP2_SPI_MISO
3. BLSP2_UART_RX
4. LDO_EN
X3
GPIO_6
GPIO
1. Configurable I/O
2. BLSP2_SPI_CS_N
3. BLSP2_UART_CTS_N
4. BLSP2_I2C_SDA
5. GP_CLK_1B
W3
GPIO_7
GPIO
1. Configurable I/O
2. BLSP2_SPI_CLK
3. BLSP2_UART_RFR_N
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4. BLSP2_I2C_SCL
5. GP_PDM_2A
I3
GPIO_8
GPIO
1. Configurable I/O
H2
GPIO_9
GPIO
1. Configurable I/O
G3
GPIO_10
V
GPIO
1. Configurable I/O
2. BLSP1_SPI_MISO
3. BLSP1_UART_RX
G2
GPIO_11
GPIO
1. Configurable I/O
2. BLSP3_SPI_CLK
3. BLSP3_I2C_SCL
4. GP_CLK_3B
D4
GPIO_12
V
GPIO
1. Configurable I/O
2. BLSP4_SPI_MOSI
3. MI2S_2_D0
D1
GPIO_13
V
GPIO
1. Configurable I/O
2. BLSP4_SPI_MISO
3. MI2S_2_D1
F1
GPIO_14
GPIO
1. Configurable I/O
2. BLSP4_SPI_CS_N
3. BLSP4_I2C_SDA
E1
GPIO_15
GPIO
1. Configurable I/O
2. BLSP4_SPI_CLK
3. BLSP4_I2C_SCL
E4
GPIO_16
GPIO
1. Configurable I/O
2. BLSP5_SPI_MOSI
3. BLSP5_UART_TX
G4
GPIO_17
V
GPIO
1. Configurable I/O
2. BLSP5_SPI_MISO
3. BLSP5_UART_RX
B4
GPIO_18
GPIO
1. Configurable I/O
2. BLSP5_SPI_CS_N
3. BLSP5_UART_CTS_N
4. BLSP5_I2C_SDA
C4
GPIO_19
GPIO
1. Configurable I/O
2. BLSP5_SPI_CLK
3. BLSP5_UART_RFR_N
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4. BLSP5_I2C_SCL
V9
GPIO_20
GPIO
1. Configurable I/O
2. BLSP6_SPI_MOSI
3. BLSP6_UART_TX
4. GP_PDM_1B
W9
GPIO_21
V
GPIO
1. Configurable I/O
2. BLSP6_SPI_MISO
3. BLSP6_UART_RX
T15
GPIO_22
GPIO
1. Configurable I/O
2. BLSP6_SPI_CS_N
3. BLSP6_UART_CTS_N
4. BLSP6_I2C_SDA
T16
GPIO_23
GPIO
1. Configurable I/O
C1
GPIO_24
GPIO
1. Configurable I/O
2. SDE_VSYNC_P
G1
GPIO_25
V
GPIO
1. Configurable I/O
2. SDE_VSYNC_S
3. PRI_MI2S_MCLK_A
4. SEC_MI2S_MCLK_A
T12
GPIO_26
GPIO
1. Configurable I/O
Y9
GPIO_27
GPIO
1. Configurable I/O
2. CAM_MCLK1
T13
GPIO_28
1. Configurable I/O
2. CAM_MCLK2
Y11
GPIO_29
GPIO
1. Configurable I/O
2. BLSP6_SPI_CS2_N
3. GP_CLK1
Z11
GPIO_30
GPIO
1. Configurable I/O
2. CCI_I2C0_SCL
W10
GPIO_31
V
GPIO
1. Configurable I/O
2. CCI_I2C1_SDA
Y8
GPIO_32
GPIO
1. Configurable I/O
2. CCI_I2C1_SCL
T8
GPIO_33
GPIO
1. Configurable I/O
2. CCI_TIMER0
X10
GPIO_35
V
GPIO
1. Configurable I/O
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax+886 2 2290 0029
Page 18
W11
GPIO_36
V
GPIO
1. Configurable I/O
W8
GPIO_37
V
GPIO
1. Configurable I/O
V8
GPIO_38
V
GPIO
1. Configurable I/O
Z8
GPIO_39
GPIO
1. Configurable I/O
2. CCI_ASYNC0
3. GP_MN
Z13
GPIO_40
GPIO
1. Configurable I/O
X11
GPIO_41
GPIO
1. Configurable I/O
2. SD_WRITE_PROTECT
Z10
GPIO_42
V
GPIO
1. Configurable I/O
2. GP_CLK_1A
Y10
GPIO_43
V
GPIO
1. Configurable I/O
2. GP_CLK_2A
V12
GPIO_44
V
GPIO
1. Configurable I/O
2. GP_CLK_3A
T9
GPIO_45
V
GPIO
1. Configurable I/O
2. GP_PDM_1A
V10
GPIO_46
V
GPIO
1. Configurable I/O
2. GP_CLK0
X12
GPIO_47
GPIO
1. Configurable I/O
2. CCI_I2C0_SDA
U9
GPIO_48
V
GPIO
1. Configurable I/O
2. BLSP6_SPI_CS2_N
3. GP_PDM_0B
W12
GPIO_50
GPIO
1. Configurable I/O
F14
GPIO_51
GPIO
1. Configurable I/O
F13
GPIO_52
GPIO
1. Configurable I/O
H12
GPIO_53
GPIO
1. Configurable I/O
2. UIM1_RESET
B11
GPIO_54
V
GPIO
1. Configurable I/O
2. UIM1_PRESENT
G9
GPIO_57
GPIO
1. Configurable I/O
2. UIM2_RESET
F11
GPIO_58
V
GPIO
1. Configurable I/O
2. UIM2_PRESENT
E14
GPIO_59
GPIO
1. Configurable I/O
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax+886 2 2290 0029
Page 19
E12
GPIO_60
GPIO
1. Configurable I/O
G12
GPIO_61
GPIO
1. Configurable I/O
G11
GPIO_62
V
GPIO
1. Configurable I/O
T11
GPIO_63
GPIO
1. Configurable I/O
2. CAM_MCLK0
U13
GPIO_64
GPIO
1. Configurable I/O
H6
GPIO_65
V
GPIO
1. Configurable I/O
T14
GPIO_67
V
GPIO
1. Configurable I/O
H3
GPIO_68
GPIO
1. Configurable I/O
H4
GPIO_85
V
GPIO
1. Configurable I/O
D5
GPIO_86
GPIO
1. Configurable I/O
E5
GPIO_87
GPIO
1. Configurable I/O
C5
GPIO_88
GPIO
1. Configurable I/O
2. BLSP8_I2C_SDA
3. BLSP8_SPI_CS_N
F6
GPIO_89
GPIO
1. Configurable I/O
2. DMIC0_CLK
H8
GPIO_90
V
GPIO
1. Configurable I/O
2. DMIC0_DATA
A4
GPIO_91
GPIO
1. Configurable I/O
2. MI2S_1_SCK
B5
GPIO_92
GPIO
1. Configurable I/O
2. BLSP7_SPI_MOSI
3. MI2S_1_WS
A5
GPIO_93
V
GPIO
1. Configurable I/O
2. BLSP7_SPI_MISO
3. MI2S_1_D0
D2
GPIO_94
GPIO
1. Configurable I/O
2. WSA_IO_DATA
3. BLSP7_SPI_CS_N
4. BLSP7_I2C_SDA
D3
GPIO_95
GPIO
1. Configurable I/O
2. WSA_IO_CLK
3. BLSP7_SPI_CLK
4. BLSP7_I2C_SCL
C2
GPIO_96
GPIO
1. Configurable I/O
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax+886 2 2290 0029
Page 20
2. BLSP8_SPI_MOSI
C6
GPIO_97
GPIO
1. Configurable I/O
2. BLSP1_SPI_CS_N
3. BLSP1_UART_CTS_N
4. BLSP1_I2C_SDA
D6
GPIO_98
GPIO
1. Configurable I/O
2. MI2S_1_D1
C3
GPIO_99
GPIO
1. Configurable I/O
2. BLSP8_I2C_SCL
3. BLSP8_SPI_CLK
D12
GPIO_100
GPIO
1. Configurable I/O
2. GRFC_0
E11
GPIO_101
GPIO
1. Configurable I/O
2. GRFC_1
C10
GPIO_102
GPIO
1. Configurable I/O
2. GRFC_2
D11
GPIO_103
GPIO
1. Configurable I/O
2. GRFC_3
D10
GPIO_104
GPIO
1. Configurable I/O
2. GRFC_4
H10
GPIO_105
GPIO
1. Configurable I/O
2. GRFC_5
B10
GPIO_106
GPIO
1. Configurable I/O
H11
GPIO_110
GPIO
1.Configurable I/O
2. GRFC_10
E10
GPIO_115
GPIO
1.Configurable I/O
2. GRFC_15
3.
GSM_TX_PHASE_TXDAC
1
F10
GPIO_116
GPIO
1. Configurable I/O
2. GRFC_28
G10
GPIO_117
GPIO
1.Configurable I/O
2.
SM_TX_PHASE_TXDAC0
3. GRFC_27
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax+886 2 2290 0029
Page 21
F8
GPIO_118
GPIO
1.Configurable I/O
2. RFFE1_CLK
E8
GPIO_119
GPIO
1.Configurable I/O
2. RFFE1_DATA
G8
GPIO_120
GPIO
1. Configurable I/O
2. RFFE2_CLK
G7
GPIO_121
GPIO
1. Configurable I/O
2. RFFE2_DATA
G6
GPIO_122
GPIO
1. Configurable I/O
2. RFFE4_CLK
G5
GPIO_123
GPIO
1. Configurable I/O
2. RFFE4_DATA
H5
GPIO_124
GPIO
1. Configurable I/O
2. RFFE5_CLK
F5
GPIO_125
GPIO
1. Configurable I/O
2. RFFE5_DATA
H7
GPIO_126
GPIO
1. Configurable I/O
2. RFFE3_CLK
F4
GPIO_127
GPIO
1. Configurable I/O
2. RFFE3_DATA
W4
GPIO_128
GPIO
1. Configurable I/O
V4
GPIO_129
GPIO
1. Configurable I/O
T3
GPIO_130
GPIO
1. Configurable I/O
X8
GPIO_131
GPIO
1. Configurable I/O
U8
GPIO_132
GPIO
1. Configurable I/O
Z9
GPIO_133
GPIO
1. Configurable I/O
W15
PMI8952_GPIO_1
GPIO
1. Configurable I/O
W16
PMI8952_GPIO_2
GPIO
1. Configurable I/O
D16
PM8952_GPIO_01
GPIO
1. Configurable I/O
D15
PM8952_GPIO_02
GPIO
1. Configurable I/O
H16
PM8952_GPIO_04
GPIO
1. Configurable I/O
C17
PM8952_GPIO_05
GPIO
1. Configurable I/O
E15
PM8952_GPIO_06
GPIO
1. Configurable I/O
P18
PM8952_GPIO_07
GPIO
1. Configurable I/O
P19
PM8952_GPIO_08
GPIO
1. Configurable I/O
GND
Page 22
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel +886 2 2298 8588
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax+886 2 2290 0029
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