BenQ V772 Service Manual

V772 CRT Monitor Service Guide

ACER V772 DEFLECTION CIRCUIT OPERATION THEORY

1. The Block Diagram of Deflection:

H-sync
V-sync

AutoSync Deflection

IC TDA4856

Digital
Controller

Controller

I2C BUS

Tilt
Circuit

Circuit Operation Theory

Rotation

Vertical
Deflection
Output
IC TDA4866

H-SIZE

Compensation

Dynamic

Regulation

Feedback

Step Up
for B+

Horizontal

Deflection Output

Circuit

Shut down

Circuit

G1 & Spot
Killer Circuit

Dynamic
Focus

G1

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V772 CRT Monitor Service Guide

2. Autosync Deflection Controller (TDA4856)

Circuit Operation Theory

2.1 pin 1 is AFC feedback.

2.2 pin XRAY: if V XRAY > threshold (6.25V typical) switches the whole IC into protection mode.

2.3 pin 3,4,5,6,8 for B+ control function block.

2.4 pin 11(EWDRV) is a parabolic waveform used for pincushion correction

2.5 pin 16 generates video claming & blanking pulse.

2.6 pin 18,19 is I2C data.

2.7 pin 21 V-regulation.

2.8 the resistor from pin 28 (HREF) to ground determines the maximum oscillator frequency.

2.9 the resistor from pin 27 (HBUF) to pin 28 defines the frequency range.

2.10 pin 31 H-regulation.

2.11 pin 32 focus.

+48V

7
GND

HPLL1
26

8200P
100V
(PE)

R205

110K

HVADJ

(OPEN)

6

BDRV

HBUF
27

R214

1.27K
(1%)

VR201

R267

56K

C202

0.01U
100V

(PE)

R237

10K

R266

8.2M

ZD204

30V

D201

1N4148

JUMPER

R206

C222

(EL)

R208

5
BIN

HREF
28

R215

2.67K
(1%)

R257R238

+14V

+

R263

R235

1K

2.2K12K

ZD201

12V

R216

C204

+

15.8K

2.2U
(1%)

50V

(EL)

10K

HFLB

FOCUSFOCUS

R268

120K

R260

390K

C226C203

2200P

100U

100V

25V

(EL)

(PE)

1U
50V

+

1M

4

BSENS

HCAP
29

C210C208

0.01U
100V

(EPI)

3
BOP

HPLL2
30

C211C209

2200P
100V
(PE)

C227

0.1U
50V
(D)

2

XRAY

HSMOD
31

R220

JUMPER

1

HFLB

FOCUS
32

R261

(OPEN)

100K

(1%)

D207

1N4148

+14V

R221

10K

TP3 TP2

D206

(OPEN)

R222

4.7K
1/4W

R218R217

22.1K
(1%)

R262

(OPEN)

D208

(OPEN)

Q201

H945

PWM

+48V

HSMOD

SC2

SC1

SC0

HDRV

EWDRV

V2
V1

VBL

HBL

CLAMP

HULK

SCL

SDA

VSMOD

R270

10K

+14V

R264

100

(OPEN)

R201

100

R202

100

R258

R209

100

R210

100

R265

100

16

CLBL

HUNLOCK
17

R211

JUMPER

15

HSYNC

SCL
18

14

VSYNC

SDA
19

13

VOUT1

ASCOR
20

12

VOUT2

VSMOD
21

C206

0.1U
100V

(PE)

R236

10
1/2W
(FS)

11

EWDRV

VAGC
22

+14V

R212

22.1K
(1%)

C207

0.1U
100V
(PE)

10
VCC

VREF
23

R204

2.2K
1/4W

C201

+

47U
50V

(EL)

9

i.c.

VCAP
24

C205

2.2U
50V

(EL)

0.1U
100V
(PE)

+

R203

62K

8

HDRV

IC201

TDA4856

SGND
25

R213

3.3K

HV-ADJ

Fig 2 Autosync Deflection Controller circuit

3. H-Driver & Output CKT:

3.1 HDRV signal comes from IC201 pin8, then goes into Q301, Q301 constitutes an inverting stage
and combines with T302 to drive Q302.

3.2 Q302, C306, C309, D305 constitute the H-output CKT with diode modulator mode.

3.3 Q324 & Q325 constitute a switch for lower frequency driver switching to cover the low h

HOT

fe

running under low frequency will occur poor-drive condition.

2

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V772 CRT Monitor Service Guide

Circuit Operation Theory

Fig 3 HDRV & output circuit

4. Dynamic focus CKT

According to the CRT spec
H dynamic focus Vpp = 300 V

V dynamic focus Vpp = 130 V

4-1 Vertical dynamic focus
The signal from IC201 (pin 32) is a vertical frequency parabolic waveform.
Q321: an inverting amplifier stage.

4-2 Horizontal dynamic focus:

The waveform of C313 (CS-2, CS-1) is a horizontal frequency parabolic waveform, and is amplified by

T304.

3

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V772 CRT Monitor Service Guide

+14V

Circuit Operation Theory

C327

10U
50V

(EL)

19.20113.001

C328

470P

1KV
(D)

DAF

R373

150

1/2W

T304

3

4

C329

0.033U

R327

10
1W

(FS)

2

R379

1K
2W

1

400V

(MPE)

CS-2

CS-1

FOCUS

+

C346

22U
16V

(EL)

-190V

R391

1K

R351

68K

R352

3.9K

Q321

BF423

R353

560K
1/4W

+

Fig 4 Dynamic Focus circuit

5. Brightness & spot killer CKT.

5.1 G1 CKT
The bright control signal from UC controller is about 0 ~ 5V, when the voltage of bright control signal
decreases, the current flow through R241 increases and the voltage of G1 increases.

5.2 Blanking CKT

To avoid the disturbed picture display on the screen, we have to blank the monitor in the following

situations.
(1) when display mode is changed.
(2) when the monitor enter the power saving mode.
(3) blank the vertical retrace line
when the " blank" signal becomes "high" Q208 "ON" , Q203 "OFF".G1 voltage is about ( -190 *
R271/(R271+R241)) ≒ -184V. The signal which is IC201 (pin 16) is inverted and amplified by Q202,

and coupling to G1.During the vertical retrace interval , the G1 voltage will be drop down about 48V.

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V772 CRT Monitor Service Guide

Circuit Operation Theory

+

C224

0.22U
250V
(EL)

R271

1/2W

+45V

R232

5.6K
1/2W

C223

0.01U
50V
(D)

CLAMP

R254

2.7K

Q202

H945

R239

6.8K

1M

BLANK

HULK

R255

10K

R256

10K

Q208

H945

BRITE

G1

ZD203

5.1V

R269

+6.5V

R231

100
1/4W

R240

3.3K

Q203

BF423

R241

100K

1K

1/2W

-190V

Fig5 Brightness & Spot killer circuit

6. BDRV and step-up CKT

6.1 The "BDRV" signal from TDA4856 pin6 is a square waveform. It is inverted and amplified by
Q201, Q311 and Q312 constitute a buffer stage.

6.2 Q325, L301, D318, C323 is step-up circuit B+ = 45 * ( T

on

+ T

off

) / T

off

.

+45VB+

C334

1000P

A

+

R333

10
1W

C323

4.7U
250V
(EL)

D318

UG4D

1KV
(D)

IRF630

Q325

C322

(OPEN)

100V

(PE) 19.40195.001

R371

10K

L301

900UH

R370

47

+14V

Q311

H945

Q312

A733

PWM

F

ig 6 BDRV & Step-up circuit

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V772 CRT Monitor Service Guide

7. HV Shutdown Circuit

Circuit Operation Theory

The IC201 pin2 (XRAY) provides a voltage detector with a threshold. If the voltage at pin XRAY
exceeds this threshold (6.25v typical) the pins HDRV, BDRV, VOUT1 and VOUT2 are floating.
When anode voltage increases, the voltage at FBT (pin3) increases, the voltage at IC201 pin2 increases.
The shutdown voltage is about 28KV.

C204 R216

+

2.2U

16

15

CLBL

HSYNC

14

131211

VSYNC

VOUT1

VOUT2

10
VCC

EWDRV

9
i.c.

TDA4856

8
HDRV

IC201

7
GND

6
BDRV

5
BIN

4
BSENS

3
BOP

2

1
HFLB

XRAY

50V

(EL)

15.8K

(1%)

R217 R218

100K

(1%)

TP3 TP2

22.1K

(1%)

+48V

HUNLOCK

ASCOR

SCL

SDA

17

18

19

20

VAGC

VSMOD
21

22

VREF
23

VCAP
24

SGND

HPLL1

25

26

HBUF
27

HREF
28

HCAP
29

HPLL2

HSMOD

30

31

FOCUS
32

Fig 7 HV- shutdown CKT

8.Horizontal linearity CKT

V772 Cs control truth table
Frequency range SC0 SC1 SC2 Cs Capacitor
Fh＜ 36K 0 0 0 C310+C311+C312+C313

36K＜Fh＜40K 0 0 1 C310+C311+C312

40K＜Fh＜51K 1 0 1 C310+C312

51K＜Fh＜62K 1 0 1 C310+C312

62K＜Fh＜72K 1 1 1 C310

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V772 CRT Monitor Service Guide

D

DYH+

DYH-

L304

10UH

19.50051.051

54

0.15U
250V

R338

100K
1/4W

A

Q309

IRF630

A

R313

47K

D312

RGP10J

CS-2

CS-1

B

R309

220

2W

C321

560P

1KV

C310

0.3U
400V

(MPP)

R321

100K
1/4W

B

Q324

C2235

C312

0.33
250V

(MPP)

Q308

IRF630

R324

47K

C315

0.047U
50V
(D)

Circuit Operation Theory

T301

19.70066.001

1

*

(RED)

B+

A

2

10
2W

C317

50V
(D)

Q322

H945

(MPP)(MPP)

IRF640

C311C313

1.0U
250V

Q307

D322

1N4148

R319

10K

C330

(OPEN)

50V
(D)

A

R317

47K

D310

FR155

R326

4.7K

R312

4.7K

+6.5V

H-LIN

FR155

C316

0.047U
50V

(D)

Q304

H945

D309

Q303

H945

R311

47K

+14V

R316

4.7K

+14V

R315

R325

47K

47K

SC0

SC1

SC2

5

3

4

6

9

R322

32

R320

100K
1/4W

0.047U

D311

FR155

Q305

H945

15

12

(WHT)

16

8

Fig 8 Linear circuit

7

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