Benq R31E, Quanta ED5 Schematics

Page 1
1
PCB P/N AND DESCRIPTION
PCB ED5 MB(8L,309X218, REVA) P/N: DA0ED5MB8A8
PCB ED5 MB(8L,309X218,REVB) P/N: DA0ED5MB8B6
A A
PCB ED5 USB/B(8L, 47.5X16.8, REVA) P/N: DA0ED5SB8A5
PCB ED5 USB/B(8L,47.5X16.8,REVB) P/N: DA0ED5SB8B3
DDRII-SODIMM1
DDRII-SODIMM2
PG 7,8
Panel Connector
B B
S-Video
VGA
SATA - HDD
PG 20
PG 20
PG 20
2
3
ED5
4
SATA PATA
ED5 SATA ASSY P/N ED5 MB S/S ASSY P/N: 51ED5SS0018 ED5 MB C/S ASSY P/N: 41ED5CS0015 ED5 MB ASSY P/N: 31ED5MB0012
ED5 USB/B S/S ASSY P/N: 4NED5SS0011 ED5 USB/B ASSY P/N: 3NED5UB0011
5
6
ED5 ASSY P/N ED5 MB S/S ASSY P/N: 51ED5SS0000 ED5 MB C/S ASSY P/N: 41ED5CS0007 ED5 MB ASSY P/N: 31ED5MB0004
ANTW/O ANT
ED5 USB/B S/S ASSY P/N: 4NED5SS0002 ED5 USB/B ASSY P/N: 3NED5UB0003
7
VCC_CORE
+1.2V
+VCCP
8
CPU VR
PG 30
+1.2V +VCCP
PG 31
533/ 667 MHZ DDR IIPG 7,8
LVDS
TVOUT
VGA
SATA0
AMD S1
Turion 64 Rev.F Dual-Core/ Sempron Rev.F Single-Core
Dual-Core 35W / Single-Core 25W
(638 S1g1 socket)
PG 3,4,5,6
HT_LINK
RS485
465 FCBGA
PG 9,10,11,12
A_LINK
PG 19PG 19
HOST 133/166MHz
PCIE 100MHz VGA 96MHz USB 48MHz REF 14MHz
PCI-E, 1X
PCI-E, 1X
PCI-E, 1X
PCI-E, 1X
CLOCK GENERATOR
ICS951462
PG 13
Express Card
PCIE1 & USB4
Mini PCI-E Card (WLAN)
PCIE2
Mini PCI-E Card (TV)
PCIE3 & USB5
NEW CARD
PCI Express Mini Card
PCI Express Mini Card
LAN RTL8111B-GR
PCIE0
PG 23
PG 24
PG 19
PG 19
+1.8VSUS +1.8V
SMDDR_VTERM
+3VPCU +3V_S5 +3VSUS +5VSUS +5V +12V
VIN
WIRE
RJ45Magnetics
+1.8VSUS SMDDR VTERM
PG 32
PG 33
CHARGER
PG 34
PG 21
PATA - HDD
PATA 100
SB460
PG 21
549 BGA
C C
Internal ODD CD-ROM
PG 21
Azalia
USB2.0 (P0~P7)
PCI Bus 33MHz
Bluetooth
USB7
USB2.0 I/O Ports
USB0 & USB1
DSC USB I/F
USB6
PG 22
PG 22
PG 22
B/B CN.
USB2 & USB3
PG 22
ANTENNA JACK
USB2.0 I/O
USB DAUGHTERBOARD
Azalia Audio
PG 26
LPC
PG 14,15,16,17
KBC
Amplifier MAX9755A
D D
MIC.
PG 27
INT. S.P.
PG 27 PG 27
1
PG 27
H.P
Azalia MDC
PG 26
MODEM RJ 11
PG 23
2
3
K/B CONN.
PG 29
NS97551
Touch Pad
PG 29
X-Bus
4
PG 28
Flash ROM
PG 28
SWITCH LED
PG 29
5
TI PCI8402
AD17 REQ3#, GNT3# INTE#, INTG#, INTH#
Card Reader
PG 25
6
PG 24,25
IEEE1394 CN.
PG 25
Size Document Number Rev
Date: Sheet of
MINI PCI CN.
AD20 REQ2#, GNT2# INTF#, INTG#
DEBUG PURPOSE ONLY
Quanta Computer Inc.
BLOCK DIAGRAM
7
PROJECT : ED5
1 34Monday, April 10, 2006
PG 18
1A
8
Page 2
5
4
3
2
1
TABLE OF CONTENTS
Page 01 : BLOCK DIAGRAM Page 02 : TABLE OF CONTENTS Page 03 : ATHLON64 HT I/F Page 04 : ATHLON64 DDRII MEMORY
I/F
Page 05 : ATHLON64 CTRL & DEBUG
D D
Page 06 : ATHLON64 PWR & GND Page 07 : DDRII SODIMMX2 Page 08 : DDRII TERMINATION Page 09 : RS485-HT LINK0
I/F
Page 10 : RS485-PCIE LINK I/ F Page 11 : RS485-SYSTEM I/F & C LKGEN Page 12 : RS485-POWER Page 13 : CLOCK GENERATOR Page 14 : SB460M-PCIE/ PCI/CPU/LPC Page 15 : SB460M ACPI/GPIO/USB/AC97 Page 16 : SB460M HDD/POWER/DECOUP LI Page 17 : SB460M STRAPS Page 18 : MINI P CI Page 19 : MINI CARD TV & WLAN Page 20 : CRT&LVDS&S-VIDE0&DCS
C C
Page 21 : HDD & CDROM , HOLES Page 22 : USB, BLUETOOTH Page 23 : LAN PCI-E RJ45 & RJ11 Page 24 : PCI8402_1 & NEW CARD Page 25 : PCI8402_2 (1394/5IN1) Page 26 : AUDIO(ALC262) & MDC Page 27 : AUDIO(AMP&POWER&HP CON) Page 28 : PC97551 & FLASH Page 29 : LED & SW & KB & TP & FAN Page 30 : CPU CORE MAX8774 Page 31 : 1.2V/1.5V/2.5V Page 32 : 1.8V/DDRII Page 33 : SYSTEM 3V/5V Page 34 : BATTERY CHARGER
B B
POWER VOLTAGE ACTIVE SCOPE
+12V
-12V
+5V
+3.3V
+5VALW
+3.3VALW
SYSTEMRC485
+1.8VALW
+5V_DUAL
+3.3V_DUAL
VCCCORE
VCCP
CPU
VCCA
VCC_NB
VDD_CPU
VDD_MEM
VDD18
VDDA18
VDDA12
AVDD
NB
AVDDQ
PLVDD
LPVDD
LVDDR
VDDR3
VTT_DDR
VDD_CLK
+3.3V_SB
+1.8V_SB
+3.3VALW_SB
+1.8VALW_SB
+1.8V_SUB_PHY
AVDD_CK
V5_REF
CPU-PWR
PCIE_PVDD
PCIE_VDDR
SB460 SB
+1.8V_ATA
PLLVDD_ATA
XTLVDD_ATA
AVDD_USB_TX
AVDD_USB_RX
+3.3V_AVDDC
V_BAT
+12V
-12V
+5V
+3.3V
+5V
+3.3V
+2.5V S0-S5 TRACE 30 MIL 21
+5V
+3.3V
VID[0..6]
+1.05V
+1.5V OFF IN S3-S5 TRACE 20 MIL
+1.2V/1.0V
+1.05V
+1.8V
+1.8V OFF IN S3-S5 TRACE 20 MIL 12
+3.3V
+1.8V
+1.8V
+1.8V
+1.8V
+3.3V
+1.8V 21PLANEOFF IN S3-S5
+3.3V
+1.8V
+1.8V
+1.8V 21OFF IN S3-S5
+5V 21OFF IN S3-S5
+1.05V 21OFF IN S3-S5
+1.8V 18OFF IN S3-S5
+1.8V 18PLANE+COPEROFF IN S3-S5
+1.8V 20PLANEOFF IN S3-S5
+1.8V 20OFF IN S3-S5
+1.8V 20OFF IN S3-S5
+1.8V 19PLANE+COPERS0-S5
+1.8V 19PLANE+COPERS0-S5
+3.3V 19S0-S5
+3.0V -- TRACE 10 MIL 18
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5
S0-S5
S0-S5
S0-S5
S0-S5
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5 PLANE+COPER 38
S0-S3
OFF IN S3-S5 12
OFF IN S3-S5 12
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5 TRACE 30 MIL 11
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5
OFF IN S3-S5
S0-S5 PLANE 21
S0-S5
S0-S5
ROUTING
PLANE
TRACE 20 MIL
PLANE
PLANE
PLANE/ 50 MIL
TRACE 30 MIL
PLANE/ 100 MIL
PLANE/ 50 MIL
PLANE+COPER
PLANE+COPER
PLANE+COPER
PLANE+COPER
COPPER+1.8V
PLANE+COPPER+1.2V
TRACE 20 MIL
TRACE 20 MIL
TRACE 20 MIL
TRACE 20 MIL 11
TRACE 30 MIL
PLANE
PLANE
TRACE 30 MIL
TRACE 10 MIL
TRACE 10 MIL
TRACE 20 MIL
TRACE 20 MIL
TRACE 20 MIL
TRACE 20 MIL
TRACE 20 MIL
PAGE
41
41
41
41
41
41
41
41
37
38
38
39
40
11
11
11
11+3.3V
40+0.9V COPPER
14+3.3V COPPER
PS_ON, SLP_S3#, SLP_S5#
21
21
21
+5VALW
RSMRST#
+12V,5V,3.3V
VDRM_PWRGD
VCC_NB_PWRGD
VRM_PWRGD
NB_PWRGD
SB_PWRGD
CPU_PWRGD
PCI_RST#
CPU_RST#
BONEFISH POWER UP SEQUENCE
T2
T1>= 70 ms
1ms < T2 < 10ms 1ms < T3 < 5ms
T3T1
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM
5
4
3
2
Date: Sheet of
1
2 34Monday, April 10, 2006
1A
Page 3
5
4
3
2
1
D D
HT_CADIN15_P(9) HT_CADIN15_N(9) HT_CADIN14_P(9) HT_CADIN14_N(9) HT_CADIN13_P(9)
C C
B B
VLDT_RUN
HT_CADIN13_N(9) HT_CADIN12_P(9) HT_CADIN12_N(9) HT_CADIN11_P(9) HT_CADIN11_N(9) HT_CADIN10_P(9) HT_CADIN10_N(9) HT_CADIN9_P(9) HT_CADIN9_N(9) HT_CADIN8_P(9) HT_CADIN8_N(9) HT_CADIN7_P(9) HT_CADIN7_N(9) HT_CADIN6_P(9) HT_CADIN6_N(9) HT_CADIN5_P(9) HT_CADIN5_N(9) HT_CADIN4_P(9) HT_CADIN4_N(9) HT_CADIN3_P(9) HT_CADIN3_N(9) HT_CADIN2_P(9) HT_CADIN2_N(9) HT_CADIN1_P(9) HT_CADIN1_N(9) HT_CADIN0_P(9) HT_CADIN0_N(9)
HT_CLKIN1_P(9) HT_CLKIN1_N(9) HT_CLKIN0_P(9) HT_CLKIN0_N(9)
R76 49.9/F
R80
49.9/F
HT_CTLIN0_P(9) HT_CTLIN0_N(9)
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VLDT_RUN
U21A
D4
VLDT_A3
D3
VLDT_A2
D2
VLDT_A1
D1
VLDT_A0
N5
L0_CADIN_H15
P5
L0_CADIN_L15
M3
L0_CADIN_H14
M4
L0_CADIN_L14
L5
L0_CADIN_H13
M5
L0_CADIN_L13
K3
L0_CADIN_H12
K4
L0_CADIN_L12
H3
L0_CADIN_H11
H4
L0_CADIN_L11
G5
L0_CADIN_H10
H5
L0_CADIN_L10
F3
L0_CADIN_H9
F4
L0_CADIN_L9
E5
L0_CADIN_H8
F5
L0_CADIN_L8
N3
L0_CADIN_H7
N2
L0_CADIN_L7
L1
L0_CADIN_H6
M1
L0_CADIN_L6
L3
L0_CADIN_H5
L2
L0_CADIN_L5
J1
L0_CADIN_H4
K1
L0_CADIN_L4
G1
L0_CADIN_H3
H1
L0_CADIN_L3
G3
L0_CADIN_H2
G2
L0_CADIN_L2
E1
L0_CADIN_H1
F1
L0_CADIN_L1
E3
L0_CADIN_H0
E2
L0_CADIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H 1
L0_CTLOUT_L 1
L0_CTLOUT_H 0
L0_CTLOUT_L 0
Athlon 64 S1 Processor Socket
VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0
AE5 AE4 AE3 AE2
T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1
Y4 Y3 Y1 W1
T5 R5
R2 R3
HT_CPU_CTLOU T1_PHT_CTLIN1_P HT_CPU_CTLOU T1_NHT_CTLIN1_N
C118
4.7U/6.3V_6
HT_CADOUT15_ P (9) HT_CADOUT15_ N (9) HT_CADOUT14_ P (9) HT_CADOUT14_ N (9) HT_CADOUT13_ P (9) HT_CADOUT13_ N (9) HT_CADOUT12_ P (9) HT_CADOUT12_ N (9) HT_CADOUT11_ P (9) HT_CADOUT11_ N (9) HT_CADOUT10_ P (9) HT_CADOUT10_ N (9) HT_CADOUT9_P (9) HT_CADOUT9_N (9) HT_CADOUT8_P (9) HT_CADOUT8_N (9) HT_CADOUT7_P (9) HT_CADOUT7_N (9) HT_CADOUT6_P (9) HT_CADOUT6_N (9) HT_CADOUT5_P (9) HT_CADOUT5_N (9) HT_CADOUT4_P (9) HT_CADOUT4_N (9) HT_CADOUT3_P (9) HT_CADOUT3_N (9) HT_CADOUT2_P (9) HT_CADOUT2_N (9) HT_CADOUT1_P (9) HT_CADOUT1_N (9) HT_CADOUT0_P (9) HT_CADOUT0_N (9)
HT_CLKOUT1_P (9) HT_CLKOUT1_N ( 9) HT_CLKOUT0_P (9) HT_CLKOUT0_N ( 9)
HT_CTLOUT0_P (9) HT_CTLOUT 0_N (9)
T29 T30
+1.2V
L58
L57
FBJ3216HS800
FBJ3216HS800
80 ohm(4A)
VLDT_RUN
C105
4.7U/6.3V_6
C104
4.7U/6.3V_6
C110 .22U/6V_4
C116 .22U/6V_4
12
C108 10P_4
LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS
12
C112 10P_4
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Num ber Rev
ATHLON64 HT I/F
5
4
3
2
Date: Sheet of
3 34Monday, April 10, 2006
1
1A
Page 4
A
B
C
D
E
C180 .1U_4
C148 .22U/6V_4
C181 1000p/50V_4
U21B
MEMVREF
VTT_SENSE
MEMZN MEMZP
MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0
MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0
MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0
MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0
MA_BANK2 MA_BANK1 MA_BANK0
MA_RAS_L MA_CAS_L MA_WE_L
C135 .22U/6V_4
+1.8VSUS
R140 2K/F
R141 2K/F
MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1
MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1
MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0
MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10
MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_BANK2 MB_BANK1 MB_BANK0
MB_RAS_L MB_CAS_L
MB_WE_L
DDR II: CMD/CTRL/CLK
Athlon 64 S1 Processor Socket
C137 1000p/50V_4
VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9
C153 1000p/50V_4
D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10
Y16 AA16 E16 F16
AF18 AF17 A17 A18
W23 W26 V20 U19
J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24
K26 T26 U26
U24 V26 U22
+0.9V_VTER
M_B_A15 M_B_A14 M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0
C154 1000p/50V_4
M_ODT3 (7,8) M_ODT2 (7,8) M_ODT1 (7,8) M_ODT0 (7,8)
M_B_BS#2 (7,8) M_B_BS#1 (7,8) M_B_BS#0 (7,8)
M_B_RAS# (7,8) M_B_CAS# (7,8) M_B_WE# (7,8)
C144 1000p/50V_4
M_CLKOUT1 (7) M_CLKOUT1# (7) M_CLKOUT0 (7) M_CLKOUT0# (7)
M_CLKOUT4 (7) M_CLKOUT4# (7) M_CLKOUT3 (7) M_CLKOUT3# (7)
M_B_A[0..15] (7,8)
C134
C136
180P_4
180P_4
C147 180P_4
C138 180P_4
Processor DDR2 Memory Interface
M_B_DQ[0..63](7)
To SODIMM socket B
(Far)
M_B_DM[0..7](7) M_A_DM[0..7] (7)
M_B_DQS[0..7](7)
M_B_DQS#[0..7](7)
M_B_DQ63 M_B_DQ62 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ58 M_B_DQ57 M_B_DQ56 M_B_DQ55 M_B_DQ54 M_B_DQ53 M_B_DQ52 M_B_DQ51 M_B_DQ50 M_B_DQ49 M_B_DQ48 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ43 M_B_DQ42 M_B_DQ41 M_B_DQ40 M_B_DQ39 M_B_DQ38 M_B_DQ37 M_B_DQ36 M_B_DQ35 M_B_DQ34 M_B_DQ33 M_B_DQ32 M_B_DQ31 M_B_DQ30 M_B_DQ29 M_B_DQ28 M_B_DQ27 M_B_DQ26 M_B_DQ25 M_B_DQ24 M_B_DQ23 M_B_DQ22 M_B_DQ21 M_B_DQ20 M_B_DQ19 M_B_DQ18 M_B_DQ17 M_B_DQ16 M_B_DQ15 M_B_DQ14 M_B_DQ13 M_B_DQ12 M_B_DQ11 M_B_DQ10 M_B_DQ9 M_B_DQ8 M_B_DQ7 M_B_DQ6 M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ1 M_B_DQ0
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DM7 M_B_DM6 M_B_DM5 M_B_DM4 M_B_DM3 M_B_DM2 M_B_DM1 M_B_DM0
M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0
AD11 AF11 AF14 AE14
AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24
AD12 AC16 AE22 AB26
AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26
Y11
G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11
E25 A22 B16 A12
F26 E26 A24 A23 D16 C16 C12 B12
U21C
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0
MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0
DDR: DATA
Athlon 64 S1 Processor Socket
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0
MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0
AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12
Y13 AB16 Y19 AC24 F24 E19 C15 E12
W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13
M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56 M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40 M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32 M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16 M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8 M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0
M_A_DM7 M_A_DM6 M_A_DM5 M_A_DM4 M_A_DM3 M_A_DM2 M_A_DM1 M_A_DM0
M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS3 M_A_DQS#3 M_A_DQS2 M_A_DQS#2 M_A_DQS1 M_A_DQS#1 M_A_DQS0 M_A_DQS#0
M_A_DQS[0..7](7)
M_A_DQS#[0..7](7)
M_A_DQ[0..63] (7)
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
To SODIMM socket A
(near)
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWE R SUPPLY THROUGH TH E PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DE COUPLING NEAR THE CPU PACKAGE
4 4
+1.8VSUS
R363
39.2F
1 2
R365
39.2F
1 2
PLACE THEM CLOSE T O CPU WITHIN 1"
3 3
2 2
C150
C157
4.7U/6.3V_6
4.7U/6.3V_6
1 1
+0.9V_VTER
C132
4.7U/6.3V_6
M_A_CS#3(7,8) M_A_CS#2(7,8) M_A_CS#1(7,8) M_A_CS#0(7,8)
M_B_CS#3(7,8) M_B_CS#2(7,8) M_B_CS#1(7,8) M_B_CS#0(7,8)
M_A_A[0..15](7,8)
C151
4.7U/6.3V_6
CPU_M_VREF
M_A_A15 M_A_A14 M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0
C145 .22U/6V_4
AE10 AF10
W17
Y10
V19 J22 V22 T19
Y26 J24
W24
U23
H26 J23 J20 J21
K19 K20 V24 K24 L20 R19 L19 L22 L21 M19 M20 M24 M22 N22 N21 R21
K22 R20 T22
T20 U20 U21
VTT_SENSE
T45
M_ZN M_ZP
M_CKE3(7,8) M_CKE2(7,8) M_CKE1(7,8) M_CKE0(7,8)
M_A_BS#2(7,8) M_A_BS#1(7,8) M_A_BS#0(7,8)
M_A_RAS#(7,8) M_A_CAS#(7,8)
M_A_WE#(7,8)
C133 .22U/6V_4
PROJECT : ED5
Size Document Number Rev
ATHLON64 DDRII MEMORY I/F
A
B
C
D
Date: Sheet of
Quanta Computer Inc.
E
4 34Monday, April 10, 2006
1A
Page 5
5
LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 m il TRACES TO EXIT BALL FIELD) AND 500 mils LONG.
CPU_VDDA_RUN
CPU_VDDA_ RUN
MMBT3904
Q10
CPUCLK(13)
CPUCLK#(13)
+1.8V
R346
300_4
R72 *0_4
R114
300_4
2
C163
4.7U/6.3V _6
+1.8V +3V
R350
300_4
+1.8V
+1.8V
R342 *0_4
R343 0_4
R70 330_4
13
D D
CPU_PW RGD(14,15)
C C
LDT_STOP#(11,14,15 )
LDT_RST#(14)
EC_PWR GD(14,15,28 )
NB_PWR GD(11,28 )
B B
+1.8VSUS
R73
300_4
H_PROCHOT#
L27 BL M18PG330S N1D
C127
C131
.22U/6V_ 4
3900p/2 5V
C489 39 00p/25V
C488 39 00p/25V
+1.8VSUS
R348 *4.7K/F_4
1
2
+1.8VSUS
1
2
+1.8VSUS
1
2
CPU_PROCHO T# (15)
5
3
C161 .1U _4
5
3
5
3
CPU_EC_P ROCHOT# (28)
+2.5V
C490 100U/6.3 V_3528
CPU_CLKIN _SC_P CPU_CLKIN _SC_N
R366
169F
ECN 2A Remove R348 for Power seq uence
C487 .1U _4
CPU_ALL_ PWROK
4
U20 NC7SZ08P 5X_NL
CPU_LDTSTOP#
4
U9 NC7SZ08P 5X_NL
C484 .1U _4
CPU_HT_RESE T#
4
U19 NC7SZ08P 5X_NL
CPU H/W MONITOR
KBSMDATCPU_TEST5_THE RMDC KBSMCLK
+3V
R340 10K_4
1
Q23 2N7002E-L F
+3V
R345
10K_4
2
To SB GPIO
3
To FAN
+3V
A A
R341 47/F_6
CPU_TEST4_THE RMDA
10 mil trace / 10 mil space
15 MIL
3V_THM
C477 .1U_4
C479 2200P/5 0V_4
5
Address 98H
U17 G781
1
VCC
-ALT
3
DXN
SMDATA
2
DXP
SMCLK
4 5
-OVT GND
6 7 8
+1.8VSUS
MAX6648_AL# (15)
MAX6648_OV# (29)
4
If AMD SI is not used, the SID pin can be left unconnected and SIC
should have a 300- (±5%) pulldown to VSS.
R351 *300
+1.8V
R349 *300
R347 300_4
CPU_SIC_R CPU_SID_R
place them to CPU within 1"
To Power
D3A:Add LEVEL-SHIFT circuit on PSI# that between CPU and POWER
PSI#
SB_THERMTRIP# (15)
separated input voltage
0104
4
+1.8V
R78 *330_ 4
H_THERMTRIP#
+3V
R338 10K_4
1
+3V
R339 10K_4
Q11 *MMBT3904
2
1 3
Q21
2
2N7002E -LF
3
Q22
2
2N7002E -LF
3
1
Q12
2
MMBT3904
1 3
MBDATA_CPU (28)
MBCLK_CP U (28)
R86
4.7K/F_4
3
ATHLON Control and Debug
COREFB+V(3 0)
COREFB-(30)
+1.8V +3V
R545
10K_4
2
1 3
Q39 MMBT3904
R90
4.7K/F_4
THERM_SYS_P WR (33)
R546 1K/F_4
EC_PWR GD
VLDT_RUN
PWR_PS I# (30)
3
R75 4 4.2F
R74 4 4.2F
CPU_VDDIO _SUS_FB_H
T21
CPU_VDDIO _SUS_FB_L
T23
T37 T35
T26 T20
T19 T112
T50 T58 T55 T56 T28
T57 T52 T53 T54
CPU_TEST27_ SINGLECHAIN CPU_TEST26_ BURNIN# CPU_PRES ENT# CPU_TEST25_ H_BYPASSCLK _H
CPU_TEST21_ SCANEN CPU_TEST20_ SCANCLK2 CPU_TEST24_ SCANCLK1 CPU_TEST22_ SCANSHIFTEN CPU_TEST12_ SCANSHIFTENB CPU_TEST15_ BP1 CPU_TEST14_ BP0
CPU_TEST25_ L_BYPASSCLK _L CPU_TEST19_ PLLTEST0 CPU_TEST18_ PLLTEST1
CPU_VDDA_ RUN
CPU_HT_RESE T#
T110
CPU_ALL_ PWROK
T111
CPU_LDTSTOP#
T46
T109
T22
CPU_CLKIN _SC_P CPU_CLKIN _SC_N
CPU_DBRDY
CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
CPU_TEST25_ H_BYPASSCLK _H CPU_TEST25_ L_BYPASSCLK _L CPU_TEST19_ PLLTEST0 CPU_TEST18_ PLLTEST1
CPU_TEST17_ BP3 CPU_TEST16_ BP2 CPU_TEST15_ BP1 CPU_TEST14_ BP0 CPU_TEST12_ SCANSHIFTENB
CPU_TEST07_ ANALOG_T CPU_TEST6_DI ECRACKMON CPU_TEST5_THE RMDC CPU_TEST4_THE RMDA CPU_TEST3_G ATE0 CPU_TEST2_DR AIN0
CPU_RSVD_ MA0_CLK3_P CPU_RSVD_ MA0_CLK3_N CPU_RSVD_ MA0_CLK0_P CPU_RSVD_ MA0_CLK0_N
CPU_RSVD_ MB0_CLK3_P CPU_RSVD_ MB0_CLK3_N CPU_RSVD_ MB0_CLK0_P CPU_RSVD_ MB0_CLK0_N
R359 300_4 R352 300_4 R354 1K/F_4 R87 510/F_4
R356 300_4 R353 300_4 R355 300_4 R357 300_4 R358 300_4 R91 300_4 R85 300_4
R82 510/F_4 R89 300_4 R123 300_4
2
U21D
F8
VDDA2
F9
VDDA1
B7
RESET_L
A7
PWROK
F10
CPU_SIC_R CPU_SID_R
CPU_HTREF1 CPU_HTREF0
LDTSTOP_L
AF4
SIC
AF5
SID
P6
HT_REF1
R6
HT_REF0
F6
VDD_FB_H
E6
VDD_FB_L
W9
VDDIO_FB_ H
Y9
VDDIO_FB_ L
A9
CLKIN_H
A8
CLKIN_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9 AE9
TDI TDO
E9
TEST25_H
E8
TEST25_L
G9
TEST19
H10
TEST18
AA7
TEST13
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
TEST5
W8
TEST4
Y6
TEST3
AB6
TEST2
P20
RSVD0
P19
RSVD1
N20
RSVD2
N19
RSVD3
MISC
R26
RSVD4
R25
RSVD5
P22
RSVD6
R22
RSVD7
AMD NPT S1 SOCKET Processor Socket
+1.8VSUS
IF no use which Net need pull-up or down
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
2
THERMTRIP_L
PROCHOT_L
CPU_PRES ENT_L
PSI_L
DBREQ_L
TEST29_H TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H
TEST28_L
TEST27 TEST26 TEST10
TEST8
RSVD8 RSVD9
RSVD10 RSVD11
RSVD12 RSVD13 RSVD14
RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20
+1.8VSUS
R81 300_4
H_THERMTRIP#
AF6
H_PROCHOT#
AC7
A5
VID5
C6
VID4
A6
VID3
A4
VID2
C5
VID1
B5
VID0
CPU_PRES ENT#
AC6
A3
E10
C9 C8
AE7 AD7 AE8 AB8 AF7
J7 H8 AF8 AE6 K8 C4
H16 B18
B3 C1
H6 G6 D5
R24 W18 R23 AA8 H18 H19
PSI#
PSI_L is a Power Status Indicator signal. This signal is asserted
T27
when the processor is in a low powerstate. PSI_L should be connected to the power supply controller, if the controller supports “skipmode, or diode emulation mode”. PSI_L is asserted by the processor during the C3 and S1 states.
CPU_DBREQ #
CPU_TDO
CPU_TEST29_ H_FBCLKOUT_P CPU_TEST29_ L_FBCLKOUT_N
CPU_TEST24_ SCANCLK1 CPU_TEST23_ TSTUPD CPU_TEST22_ SCANSHIFTEN CPU_TEST21_ SCANEN CPU_TEST20_ SCANCLK2
CPU_TEST28_ H_PLLCHRZ_P CPU_TEST28_ L_PLLCHRZ_N CPU_TEST27_ SINGLECHAIN CPU_TEST26_ BURNIN# CPU_TEST10_ ANALOGOUT CPU_TEST08_ DIG_T
CPU_MA_RE SET# CPU_MB_RE SET#
CPU_RSVD_ VIDSTRB1 CPU_RSVD_ VIDSTRB0
CPU_RSVD_ VDDNB_FB_P CPU_RSVD_ VDDNB_FB_N CPU_RSVD_ CORE_TYPE
+1.8VSUS
R364 220_4
R361 220_4
R360 220_4
CPU_TMS
CPU_TDI CPU_TRST# CPU_TDO
R92 80.6F
ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"
HDT CONNECTOR
R362 220_4
R120 220_4
CPU_DBREQ #
CPU_DBRDY
CPU_TCK
LDT_RST#
PUT CLOSE ON LAYOUT
Size Document Num ber Rev
ATHLON64 CTRL & DEBUG
Date: Sheet of
1
VID5 (30) VID4 (30) VID3 (30) VID2 (30) VID1 (30) VID0 (30)
T113
T36 T44
T42 T24
T48 T49
T25
T32 T40 T31
T47 T43 T34 T41R84300_ 4 T38 T39 T33 T63
PROJECT : ED5
Quanta Computer Inc.
1
5 34Monday, April 10 , 2006
2A
Page 6
5
4
3
2
1
VCC_COR E VCC_COR E
D D
C C
B B
A1
AC4 AD2
M10
N11
R11
U11 U13
U21E
VDD1 VDD2
G4
VDD3
H2
VDD4
J9
VDD5
J11
VDD6
J13
VDD7
K6
VDD8
K10
VDD9
K12
VDD10
K14
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
L11
VDD15
L13
VDD16
M2
VDD17
M6
VDD18
M8
VDD19 VDD20
N7
VDD21
N9
VDD22 VDD23
P8
VDD24
P10
VDD25
R4
VDD26
R7
VDD27
R9
VDD28 VDD29
T2
VDD30
T6
VDD31
T8
VDD32
T10
VDD33
T12
VDD34
T14
VDD35
U7
VDD36
U9
VDD37 VDD38 VDD39
V6
VDD40
V8
VDD41
V10
VDD42
POWE R
Athlon 64 S1 Processor Socket
VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8
VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27
V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16
H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25
+1.8VSUS
A26
AA4 AA11 AA13 AA15 AA17 AA19
AB2
AB7
AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21
AD6
AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23
D11
D13
D15
D17
D19
D21
D23
D25
H21
H23
U21F
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62 VSS63 VSS64
J4
VSS65
GROUND
Athlon 64 S1 Processor Socket
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
C206
4.7U/6.3V_ 6
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS
C205
4.7U/6.3V_ 6
BOTTOMSIDE DECOUPLING
VCC_COR E
VCC_COR E
+1.8VSUS
C204
4.7U/6.3V_ 6
C100 22U/10V_ 8
C123 .22U/6V_4
C207 22U/10V_ 8
C203
4.7U/6.3V_ 6
C98 22U/10V_ 8
C124 .22U/6V_4
C208 22U/10V_ 8
C109 22U/10V_ 8
C139 .01U_4
C187 .22U/6V_4
C198 .22U/6V_4
C102 22U/10V_ 8
C143 180P_4
C189 .22U/6V_4
C191 .22U/6V_4
C107 22U/10V_ 8
C101 22U/10V_ 8
C190 .22U/6V_4
C114 22U/10V_ 8
C199 .22U/6V_4
C202 .01U_4
C117 22U/10V_ 8
C197 .01U_4
C119 22U/10V_ 8
C201 10P_4
C200 180P_4
C614 180P_4
Athlon 64 S1g1
uPGA638
A A
Top View
AF1
PROCESSOR POWER AND GROUND
PROJECT : ED5
Quanta Computer Inc.
Size Do cument Number Rev
ATHLON64 PWR & GND
5
4
3
2
Date: Sheet of
6 34Monday, April 10, 2006
1
1A
Page 7
A
+1.8VSUS
B
C
+1.8VSUS
D
E
A0 A1 A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9 A10
90
A11
89
A12 A13
86
A14
84
A15
BA0 BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3 DM4 DM5 DM6 DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3 DQS4 DQS5 DQS6 DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3 DQS4 DQS5 DQS6 DQS7
30
CK0
32
CK0 CK1 CK1
79
CKE0
80
CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
818287889596103
VDD0
VDD1
(H=9.2)
VSS22
VSS21
R277
1K/F_4
R275
1K/F_4
M_B_A[0..15](4,8)
M_B_BS#0(4,8) M_B_BS#1(4,8) M_B_BS#2(4,8)
M_B_DM[0..7](4)
M_B_DQS[0..7](4)
M_B_DQS#[0..7](4)
M_CLKOUT3(4)
M_CLKOUT3#(4)
M_CLKOUT4(4)
M_CLKOUT4#(4)
M_B_RAS#(4,8) M_B_CAS#(4,8)
M_B_WE#(4,8) M_B_CS#0(4,8) M_B_CS#1(4,8)
R279 0_4 R278 10K_4
+3V
+3V
C353
2.2U/10V/X5R
1 2
C365 .1U_4
M_A_A[0..15](4,8)
4 4
M_A_BS#0(4,8) M_A_BS#1(4,8) M_A_BS#2(4,8)
M_A_DM[0..7](4)
3 3
M_A_DQS[0..7](4)
M_A_DQS#[0..7](4)
M_CLKOUT0(4)
M_CLKOUT0#(4)
M_CLKOUT1(4)
M_CLKOUT1#(4)
M_CLKOUT0
C175
1.5P_4
M_CLKOUT0#
2 2
M_CLKOUT1
C173
1.5P_4
M_CLKOUT1#
SMBDT(13) SMBCK(13)
+3V
C322 .1U_4
+1.8VSUS
1 1
M_A_RAS#(4,8) M_A_CAS#(4,8)
M_A_CS#0(4,8) M_A_CS#1(4,8)
C310 .1U_4
MVREF_DIM
C316
2.2U/10V/X5R
1 2
M_A_WE#(4,8)
M_A_A0
102
M_A_A1
101
M_A_A2
100
M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10
105
M_A_A11 M_A_A12
116
M_A_A14 M_A_A15
107
106
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4
130
M_A_DM5
147
M_A_DM6
170
M_A_DM7
185
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4
131
M_A_DQS5
148
M_A_DQS6
169
M_A_DQS7
188
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4
129
M_A_DQS#5
146
M_A_DQS#6
167
M_A_DQS#7
186
164
166
M_CKE0(4,8) M_CKE1(4,8)
M_ODT0(4,8) M_ODT1(4,8)
C311 .1U_4
A
108
113
109
110
115
114
119
198
200
195
197
199
818287889596103
A0 A1
VDD0
VDD1
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9 A10
90
A11
89
A12 A13
86
A14
84
A15
BA0 BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3 DM4 DM5 DM6 DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3 DQS4 DQS5 DQS6 DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3 DQS4 DQS5 DQS6 DQS7
30
CK0
32
CK0 CK1 CK1
79
CKE0
80
CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd
1
VREF
2
VSS0
3
VSS1
(H=5.2)
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
VSS22
VSS21
VDD2
VDD3
VDD4
CN26
REVERSE
VSS25
VSS24
VSS23
111
104
112
117
118
VDD5
VDD6
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1
NC2
NC3
NC4
5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194
50 69 83 120 163
M_A_DQ1 M_A_DQ5 M_A_DQ2 M_A_DQ3 M_A_DQ0 M_A_DQ4 M_A_DQ7 M_A_DQ6 M_A_DQ12 M_A_DQ8 M_A_DQ10 M_A_DQ14 M_A_DQ13 M_A_DQ9 M_A_DQ15 M_A_DQ11 M_A_DQ21 M_A_DQ17 M_A_DQ23 M_A_DQ18 M_A_DQ20 M_A_DQ19 M_A_DQ22 M_A_DQ16 M_A_DQ29 M_A_DQ28 M_A_DQ31 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ27 M_A_DQ30 M_A_DQ32 M_A_DQ36 M_A_DQ37 M_A_DQ35 M_A_DQ33 M_A_DQ38 M_A_DQ34 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ46 M_A_DQ44 M_A_DQ45 M_A_DQ43 M_A_DQ47 M_A_DQ55 M_A_DQ54 M_A_DQ50 M_A_DQ51 M_A_DQ53 M_A_DQ48 M_A_DQ49 M_A_DQ52 M_A_DQ56 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ61 M_A_DQ63 M_A_DQ62
SO-DIMM
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
132
128
127
122
1217877727166656059
DDRII_SODIMM_R
B
+0.9V_REF
M_A_CS#2 (4,8) M_A_CS#3 (4,8)
+1.8VSUS
R276
*0_4
MVREF_DIM
C376 1U/10V_4
M_A_DQ[0..63] (4)
M_CLKOUT3
C176
1.5P_4
M_CLKOUT3#
M_CLKOUT4
C177
1.5P_4
M_CLKOUT4#
C374 .1U_4
+1.8VSUS
M_CKE2(4,8) M_CKE3(4,8)
M_ODT2(4,8) M_ODT3(4,8)
MVREF_DIM
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15M_A_A13
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_CLKOUT3 M_CLKOUT3# M_CLKOUT4 M_CLKOUT4#
SMBDT SMBCK
C364 .1U_4
C
102 101 100
105
116
107 106
130 147 170 185
131 148 169 188
129 146 167 186
164 166
108 113 109 110 115
114 119
198 200
195 197
199
104
VDD2
VDD3
VDD4
VDD5
VDD6
CN27
REVERSE
VSS27
VSS26
VSS25
VSS24
VSS23
111
112
117
118
VDD8
VDD7
VDD9
VDD10
SO-DIMM
VSS31
VSS30
VSS29
VSS28
128
127
122
1217877727166656059
DDRII_SODIMM_R
DQ0 DQ1 DQ2
VDD11
DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1 NC2 NC3 NC4
NC/TEST
VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
VSS32
132
M_B_DQ4
5
M_B_DQ1
7
M_B_DQ2
17
M_B_DQ3
19
M_B_DQ5
4
M_B_DQ0
6
M_B_DQ6
14
M_B_DQ7
16
M_B_DQ8
23
M_B_DQ9
25
M_B_DQ10
35
M_B_DQ15
37
M_B_DQ12
20
M_B_DQ13
22
M_B_DQ14
36
M_B_DQ11
38
M_B_DQ16
43
M_B_DQ21
45
M_B_DQ19
55
M_B_DQ23
57
M_B_DQ20
44
M_B_DQ17
46
M_B_DQ18
56
M_B_DQ22
58
M_B_DQ29
61
M_B_DQ28
63
M_B_DQ26
73
M_B_DQ27
75
M_B_DQ24
62
M_B_DQ25
64
M_B_DQ30
74
M_B_DQ31
76
M_B_DQ32
123
M_B_DQ36
125
M_B_DQ39
135
M_B_DQ35
137
M_B_DQ33
124
M_B_DQ37
126
M_B_DQ34
134
M_B_DQ38
136
M_B_DQ40
141
M_B_DQ41
143
M_B_DQ46
151
M_B_DQ43
153
M_B_DQ44
140
M_B_DQ45
142
M_B_DQ47
152
M_B_DQ42
154
M_B_DQ53
157
M_B_DQ49
159
M_B_DQ55
173
M_B_DQ54
175
M_B_DQ48
158
M_B_DQ52
160
M_B_DQ50
174
M_B_DQ51
176
M_B_DQ60
179
M_B_DQ57
181
M_B_DQ62
189
M_B_DQ59
191
M_B_DQ61
180
M_B_DQ56
182
M_B_DQ63
192
M_B_DQ58
194
50 69 83 120 163
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
M_B_DQ[0..63] (4)
M_B_CS#2 (4,8) M_B_CS#3 (4,8)
+1.8VSUS
*10U/6.3V/X5RC308
*10U/6.3V/X5RC380
10U/10V/X5R_8C338
10U/10V/X5R_8C361
.1U_4C 388
.1U_4C 362
.1U_4C 342
.1U_4C 347
.1U_4C 349
.1U_4C 345
.1U_4C 309
.1U_4C 299
.1U_4C 340
.1U_4C 348
.1U_4C 325
.1U_4C 372
.1U_4C 341
.1U_4C 370
.1U_4C 373
.1U_4C 392
.1U_4C 391
.1U_4C 389
.1U_4C 371
.1U_4C 378
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
DDR-II SODIMM*2
D
Date: Sheet of
7 34Monday, April 10, 2006
E
1A
Page 8
1
2
3
4
5
6
7
8
+0.9V_VTER
M_CKE0(4,7) M_CKE1(4,7) M_CKE2(4,7) M_CKE3(4,7)
M_ODT0(4,7) M_ODT1(4,7)
A A
B B
M_A_A[0..15](4,7)
+0.9V_VTER
*10U/6.3V/X5RC296
*10U/6.3V/X5RC363
.1U_4C270 .1U_4C393 .1U_4C328 .1U_4C330 .1U_4C329 .1U_4C368 .1U_4C326 .1U_4C385 .1U_4C327 *0.1U_4C346
C C
*0.1U_4C288 .1U_4C290 .1U_4C379 .1U_4C390 .1U_4C339 .1U_4C369 *0.1U_4C387 .1U_4C298 .1U_4C273 .1U_4C350 *0.1U_4C386 .1U_4C275 .1U_4C384 .1U_4C283 *0.1U_4C280 .1U_4C375
M_B_A[0..15](4,7)
M_ODT2(4,7) M_ODT3(4,7)
M_A_BS#0(4,7) M_A_BS#1(4,7) M_A_BS#2(4,7)
M_A_WE#(4,7) M_A_CAS#(4,7) M_A_RAS#(4,7)
M_B_BS#0(4,7) M_B_BS#1(4,7) M_B_BS#2(4,7)
M_B_WE#(4,7) M_B_CAS#(4,7) M_B_RAS#(4,7)
M_A_CS#0(4,7) M_A_CS#1(4,7) M_A_CS#2(4,7) M_A_CS#3(4,7)
M_B_CS#0(4,7) M_B_CS#1(4,7) M_B_CS#2(4,7) M_B_CS#3(4,7)
M_A_A13 M_A_A10 M_A_A0
M_A_A4 M_A_A6
M_A_A2
M_A_A7 M_A_A11 M_A_A12 M_A_A9 M_A_A3 M_A_A1 M_A_A8 M_A_A5 M_A_A14 M_A_A15
M_B_A0 M_B_A2 M_B_A4 M_B_A6 M_B_A7 M_B_A11 M_B_A3 M_B_A1 M_B_A8 M_B_A5 M_B_A12 M_B_A9 M_B_A10 M_B_A13 M_B_A14 M_B_A15
M_A_BS#0 M_A_BS#1 M_A_BS#2
M_A_WE# M_A_CAS# M_A_RAS#
M_B_BS#0 M_B_BS#1 M_B_BS#2
M_B_WE# M_B_CAS# M_B_RAS#
R204 56_4 R233 56_4 R272 56_4 R280 56_4
R230 56_4 R197 56_4 R283 56_4 R264 56_4
R201 56_4 R232 56_4 R202 56_4
R200 56_4 R199 56_4 R231 56_4
R268 56_4 R286 56_4 R270 56_4
R267 56_4 R266 56_4 R285 56_4
R229 56_4 R198 56_4 R203 56_4 R227 56_4
R284 56_4 R265 56_4 R271 56_4 R281 56_4
R228 56_4 R215 56_4 RP9 0404-56X2
1 2 3 4
RP10 0404-56X2
1 2 3 4
RP11 0404-56X2
1 2 3 4
RP7 0404-56X2
1 2 3 4
RP5 0404-56X2
1 2 3 4
RP6 0404-56X2
1 2 3 4
RP12 0404-56X2
1 2 3 4
RP16 0404-56X2
1 2 3 4
RP17 0404-56X2
1 2 3 4
RP18 0404-56X2
1 2 3 4
RP13 0404-56X2
1 2 3 4
RP14 0404-56X2
1 2 3 4
RP15 0404-56X2
1 2
3 4
R269 56_4 R282 56_4 RP19 0404-56X2
1 2
3 4
D D
PROJECT : ED5
Quanta Computer Inc.
Size Document Num ber Rev
DDR-II TERMINATION
1
2
3
4
5
6
Date: Sheet of
7
8 34Monday, April 10, 2006
8
1A
Page 9
5
D D
HT_CADOUT15_ P(3) HT_CADOUT15_ N(3) HT_CADOUT14_ P(3) HT_CADOUT14_ N(3) HT_CADOUT13_ P(3) HT_CADOUT13_ N(3) HT_CADOUT12_ P(3) HT_CADOUT12_ N(3) HT_CADOUT11_ P(3) HT_CADOUT11_ N(3) HT_CADOUT10_ P(3) HT_CADOUT10_ N(3) HT_CADOUT9_P(3) HT_CADOUT9_N(3) HT_CADOUT8_P(3)
C C
B B
VDDHT_PKG
HT_CADOUT8_N(3)
HT_CADOUT7_P(3) HT_CADOUT7_N(3) HT_CADOUT6_P(3) HT_CADOUT6_N(3) HT_CADOUT5_P(3) HT_CADOUT5_N(3) HT_CADOUT4_P(3) HT_CADOUT4_N(3) HT_CADOUT3_P(3) HT_CADOUT3_N(3) HT_CADOUT2_P(3) HT_CADOUT2_N(3) HT_CADOUT1_P(3) HT_CADOUT1_N(3) HT_CADOUT0_P(3) HT_CADOUT0_N(3)
HT_CLKOUT1_P(3) HT_CLKOUT1_N(3)
HT_CLKOUT0_P(3) HT_CLKOUT0_N(3)
HT_CTLOUT0_P(3) HT_CTLOUT 0_N( 3)
R336 49.9/F R59 100/F_4
R335
49.9/F
4
HT_RXCALP HT_RXCALN
R19 R18 R21 R22 U22 U21 U18
U19 W19 W20
AC21 AB22 AB20 AA20 AA19
Y19
T24 R25 U25 U24
V23 U23
V24
V25
AA25 AA24 AB23 AA23 AB24 AB25 AC24 AC25
W21 W22
Y24
W25
P24
P25
A24 C24
U16A
HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N
HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N
HT_RXCLK1P HT_RXCLK1N
HT_RXCLK0P HT_RXCLK0N
HT_RXCTLP HT_RXCTLN
HT_RXCALP HT_RXCALN
RS485M A11 HT
PART 1 OF 5
HYPER TRANSPORT CPU
I/F
3
HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N
HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N
HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22
N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25
L21 L22
J24 J25
N23 P23
C25 D24
HT_TXCALP HT_TXCALN
HT_CADIN15_P (3) HT_CADIN15_N (3) HT_CADIN14_P (3) HT_CADIN14_N (3) HT_CADIN13_P (3) HT_CADIN13_N (3) HT_CADIN12_P (3) HT_CADIN12_N (3) HT_CADIN11_P (3) HT_CADIN11_N (3) HT_CADIN10_P (3) HT_CADIN10_N (3) HT_CADIN9_P (3) HT_CADIN9_N ( 3) HT_CADIN8_P (3) HT_CADIN8_N ( 3)
HT_CADIN7_P (3) HT_CADIN7_N ( 3) HT_CADIN6_P (3) HT_CADIN6_N ( 3) HT_CADIN5_P (3) HT_CADIN5_N ( 3) HT_CADIN4_P (3) HT_CADIN4_N ( 3) HT_CADIN3_P (3) HT_CADIN3_N ( 3) HT_CADIN2_P (3) HT_CADIN2_N ( 3) HT_CADIN1_P (3) HT_CADIN1_N ( 3) HT_CADIN0_P (3) HT_CADIN0_N ( 3)
HT_CLKIN1_P (3) HT_CLKIN1_N (3)
HT_CLKIN0_P (3) HT_CLKIN0_N (3)
HT_CTLIN0_P ( 3) HT_CTLIN0_N (3)
2
1
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Num ber Rev
RS485-HT LINK0 I/F
5
4
3
2
Date: Sheet of
9 34Monday, April 10, 2006
1
1A
Page 10
5
VDD33
VIN
VIN
C52 .1U_4
+5VSUS
C156 .1U_4
VA
VA
D D
C113 .1U_4
C440 .1U_4
C85 .1U_4
C26 .1U_4
4
VIN
+3V
+1.8V
VLDT_RUN
C51 .1U_4
C121 .1U_4
C473 .1U_4
C103 .1U_4
3
2
1
VIN VDD33
VLDT_RUN
C97 .1U_4
VCC_CORE
C C
B B
VIN
VIN
C111 .1U_4
VCC_CORE
+1.2V
+1.8VSUS
C169 .1U_4
VCC_CORE
+1.8V
+3V
+1.8VSUS
C253 .1U_4
VIN
+3V
+1.8V
+1.2V
+1.2V
+5V
C68 .1U_4
+3V
+5V
GND
C65 .1U_4
+1.8VSUS
C548 .1U_4
+0.9V_VTER
LAN_PCIE_RXP0(23) LAN_PCIE_RXN0(23)
MINI_PCIE_RXP2(19) MINI_PCIE_RXN2(19)
MINI_PCIE_RXP3(19) MINI_PCIE_RXN3(19)
R214:
10KOhm FOR RS485
1.47KOhm FOR RS690
R213:
8.25KOhm FOR RS485 DNI FOR RS690
PCIE_RXP1(24) PCIE_TXP1 (24) PCIE_RXN1(24)
A_RX0P(14) A_RX0N(14)
A_RX1P(14) A_RX1N(14)
R47 10K_4 R54 8.25K/F_6
U16B
G5
GFX_RX0P
G4
GFX_RX0N
J8
GFX_RX1P
J7
GFX_RX1N
J4
GFX_RX2P
J5
GFX_RX2N
L8
GFX_RX3P
L7
GFX_RX3N
L4
GFX_RX4P
L5
GFX_RX4N
M8
GFX_RX5P
M7
GFX_RX5N
M4
GFX_RX6P
M5
GFX_RX6N
P8
GFX_RX7P
P7
GFX_RX7N
P4
GFX_RX8P
P5
GFX_RX8N
R4
GFX_RX9P
R5
GFX_RX9N
R7
GFX_RX10P
R8
GFX_RX10N
U4
GFX_RX11P
U5
GFX_RX11N
W4
GFX_RX12P
W5
GFX_RX12N
Y4
GFX_RX13P
Y5
GFX_RX13N
V9
GFX_RX14P
W9
GFX_RX14N
AB7
GFX_RX15P
AB6
GFX_RX15N
W11
GPP_RX0P
W12
GPP_RX0N
AA11
GPP_RX1P
AB11
GPP_RX1N
Y7
GPP_RX2P
AA7
GPP_RX2N
AB9
GPP_RX3P
AA9
GPP_RX3N
W14
SB_RX0P
W15
SB_RX0N
AB12
SB_RX1P
AA12
SB_RX1N
AA14
PCE_ISET(PCE_CALI)
AB14
PCE_TXISET(NC)
RS485M A11 HT
PART 2 OF 5
PCIE I/F
GFX
PCIE I/F GPP
PCIE I/F SB
PCE_PCAL(PCE_CALRP) PCE_NCAL(PCE_CALRN)
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P SB_TX0N
SB_TX1P SB_TX1N
J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2 T2 U1 V2 V1 V3 W3 W1 W2 Y2 AA1 AA2 AB2 AB1 AC1 AE3 AE4
GPP_TX0P_C
AD8
GPP_TX0N_C
AE8
GPP_TX1P_C
AD7
GPP_TX1N_C
AE7
GPP_TX2P_C
AD4
GPP_TX2N_C
AE5
GPP_TX3P_C
AD5
GPP_TX3N_C
AD6
A_TX0P_C
AE9
A_TX0N_C
AD10
A_TX1P_C
AC8
A_TX1N_C
AD9
R49 150/F_4
AD11
R46 100/F_4
AE11
C63 .1U_4
C62 .1U_4
C41 .1U_4
C48 .1U_4
C32 .1U_4
C34 .1U_4
C35 .1U_4
C36 .1U_4
C54 .1U_4
C66 .1U_4
C44 .1U_4
C50 .1U_4
VDDA12_PKG2
R216:
R215:
Place these caps close to connector
150 Ohm FOR RS485 562 Ohm FOR RS690
Ward update to 100 Ohm FOR RS485 2KOhm FOR RS690
LAN_PCIE_TXP0 (23) LAN_PCIE_TXN0 (23)
PCIE_TXN1 (24)
MINI_PCIE_TXP2 (19) MINI_PCIE_TXN2 (19)
MINI_PCIE_TXP3 (19) MINI_PCIE_TXN3 (19)
A_TX0P (14) A_TX0N (14)
A_TX1P (14) A_TX1N (14)
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
RS485-PCIE LINK I/F
5
4
3
2
Date: Sheet of
1
10 34Monday, April 10, 2006
1A
Page 11
5
R22 2K/F
R23 10K_4
HTPVDD+1.8V
C475
10U/10V/X5R_8
C40
10U/10V/X5R_8
+1.8V +3V
1 3
Q5 MMBT3904
STRP_DATA
TV_SWITCH
5
R26
10K_4
2
L20
C93
4.7U/6.3V_6
C49
4.7U/6.3V_6
R21 1K/F_4
LDT_STOP#_NB LDT_STOP#_NB
BK1608HS600
TV_C/R_SYS(20) TV_Y/G_SYS(20) TV_COMP_SYS(20)
VGA_RED(20) VGA_GRN(20) VGA_BLU(20)
LOAD_ROM#: LOAD ROM STRAP ENABLE
High, LOAD ROM STRAP DISABLE
Low, LOAD ROM STRAP ENABLE
L22
BK1608HS600
+1.8V PLLVDD
D D
C C
B B
A A
L12
BK1608HS600
LDT_STOP#(5,14,15)
+3V
AVDDQ+1.8V
4
+3V
L21
GND_AVSSQ
DDCCLK(20) DDCDAT(20)
NB_OSC(13)
BK1608HS600
R37 0_4
LOAD_ROM#
D6 RB751
2 1
AVDDQ
ALLOW_LDTSTOP(14)
PHL_CLK(20) PHL_DATA(20)
R34
4.7K/F_4
R64
150/F_6
R67
150/F_6
C88
2.2U/10V/X5R
1 2
R333 0_6
close to NB
R62
150/F_6
R68
150/F_6
4
NB_PWRGD(5,28)
NBSRC_CLKP(13) NBSRC_CLKN(13)
SBLINK_CLKP(13) SBLINK_CLKN(13)
R38 3K
BMREQ#(14)
ALINK_RST#(14,19,21,23,24)
C83
10U/10V/X5R_8
GND_AVSSQ
R63
150/F_6
close to NB
R66
150/F_6 L19 BK1608HS600
AVDD_NB
C472
4.7U/6.3V_6
C471 .1U_4
VSYNC(20) HSYNC(20)
R25 0_4 R24 0_4
PLLVDD
HTPVDD
R40 0_4
R58 10K_4
HTREFCLK(13)
T91
R29 *2.7K_4
R30 *2.7K_4 R31 *2.7K_4 R35 *2.7K_4 R36 *2.7K_4
T6 T10
T4 T2
3
AVDD_NB
AVDD1
TV_C/R_SYS TV_Y/G_SYS TV_COMP_SYS
R337 715/F
TV_SWITCH
3
+1.8V AVDD1
R332 0_6
C91 .1U_4
NB_RST#
PLLVDD12
DFT_GPIO0
DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5
STRP_DATA
U16C
B22
AVDD1
C22
AVDD2
G17
AVSSN1
H17
AVSSN2
A20
AVDDDI
B20
AVSSDI
A21
AVDDQ
A22
AVSSQ
C21
C_R
C20
Y_G
D19
COMP_B
E19
RED
F19
GREEN
G19
BLUE
C6
DACVSYNC
A5
DACHSYNC
B21
RSET
B6
DACSCL
A6
DACSDA
A10
PLLVDD(PLLVDD18)
B10
PLLVSS
B24
HTPVDD
B25
HTPVSS
C10
SYSRESET#
C11
POWERGOOD
C5
LDTSTOP#
B5
ALLOW_LDTSTOP
C23
HTTSTCLK
B23
HTREFCLK
C2
TVCLKIN
B11
OSCIN
A11
OSCOUT(PLLVDD12)
F2
GFX_CLKP
E1
GFX_CLKN
G1
SB_CLKP
G2
SB_CLKN
D6
DFT_GPIO0
D7
DFT_GPIO1
C8
DFT_GPIO2
C7
DFT_GPIO3
B8
DFT_GPIO4
A8
DFT_GPIO5
B2
BMREQb
A2
I2C_CLK
B4
I2C_DATA
AA15
THERMALDIODE_P
AB15
THERMALDIODE_N
C14
TMDS_HPD
B3
DDC_DATA
C3
TESTMODE
A3
STRP_DATA
RS485M A11 HT
C469
2.2U/10V/X5R
1 2
PART 3 OF 5
CRT/TVOUT
LVDS
PLL
PWR
PM
CLOCKs
DVO_D1(GPP_TX4N)
DVO_D3(GPP_RX4P) DVO_D4(GPP_RX4N)
DVO_D7(GPP_TX5N)
DVO
DVO_D9(GPP_RX5N)
MIS.
DVO_D10(GPP_RX5P)
RS485
OSCOUT(A11)
DVO_D0(AD14)
DVO_D1(AD15) DVO_D1
DVO_D3(AD16)
DVO_D7(AE19)
DVO_D8(AD19)
DVO_D9(AE20)
OSCOUT
DVO_D0
DVO_D3
DVO_D4
DVO_D7
DVO_D8
DVO_D9
DVO_D10DVO_D10(AD20)
2
TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N
TXCLK_LP
TXCLK_LN TXCLK_UP TXCLK_UN
LPVDD LPVSS
LVDDR18D_1 LVDDR18D_2 LVDDR18A_1 LVDDR18A_2
LVSSR1 LVSSR3 LVSSR5 LVSSR6 LVSSR7 LVSSR8
LVSSR12 LVSSR13
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
DVO_D0(GPP_TX4P)
DVO_D2(NC)
DVO_D5(NC) DVO_D6(NC)
DVO_D8(GPP_TX5P)
DVO_D11(NC)
DVO_VSYNC(NC)
DVO_DE(NC)
DVO_HSYNC(NC)
DVO_IDCKP(NC) DVO_IDCKN(NC)
RS690
PLLVDD12
GPP_TX4P
GPP_TX4N
GPP_RX4P
GPP_RX4NDVO_D4(AE16)
GPP_TX5N
GPP_TX5P
GPP_RX5N
GPP_RX5P
2
B14 B15 B13 A13 H14 G14 D17 E17
A15 B16 C17 C18 B17 A17 A18 B18
E15 D15 H15 G15
D14 E14
A12 B12 C12 C13
A16 A14 D12 C19 C15 C16
F14 F15
E12 G12 F12
AD14 AD15 AE15 AD16 AE16 AC17 AD18 AE19 AD19 AE20 AD20 AE21
AD13 AC13 AE13 AE17 AD17
1
TXLOUT0+ (20) TXLOUT0- (20) TXLOUT1+ (20) TXLOUT1- (20) TXLOUT2+ (20)
TXLOUT2- (20)
T13 T9
T94 T100 T15 T95 T98 T97 T102 T104
TXLCLKOUT+ (20)
LCD_PON
LVDS_BLON
R331 0_4
T3
LVDS_BLON
NB_PWRGD
NC7SZ08P5X_NL
TXLCLKOUT- (20)
T7 T8
C72 .1U_4
C71 .1U_4
CHECK TO
C84
220OHM
4.7U/6.3V_6
GND_LPVSS
C73
4.7U/6.3V_6
LCD_POWER_ON (20)
T96 T5 T93 T11 T101 T18 T14 T17 T106 T16 T108 T107
T99 T103 T92 T12 T105
LCD_PON
LVDS_BLON
+3V
U7
53
1
4
2
BK1608HS600
R55 0_6
R330 2K/F
R45 2K/F
ECN 2A: BOM Lose and stuff R43
R43 0_4
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
RS485-SYSTEM I/F & CLKGEN
Date: Sheet of
1
R56 0_6
RS485: LVDDR18A=1.8V
L13
+1.8V
11 34Monday, April 10, 2006
C81 .1U_4
GND_LPVSS
+1.8V
L56
BK1608HS600
C79
4.7U/6.3V_6
GND_LVSSR
BLON (20)
2A
Page 12
5
V12
M3
VSSA2
D D
VSSA1
4
V11
V14F3V15A1H1G3J2H3J6F1L6M2M6J3P6T1N3R6U2T3U3U6Y1W6AC2Y3Y9
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
AE6
AE10
VSSA8
VSSA9
VSSA10
VSSA11
VSSA13
VSSA15
VSSA16
VSSA14
VSSA12
P9
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA24
VSSA23
Y15
AC4
VSSA25
VSSA26
VSSA27
VSSA28
VSSA30
VSSA31
VSSA29
3
Y11R9AD1
AC5
AC6
AC7
AD3
AC9
AC10
G6
Y12
Y14
AA3
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
U16E RS485M A11 HT
2
1
GROUND
SUGGEST REMOVE L11 BEAD SAME AS CPU
1.2 PLAN FSB UNDER THIS PLAN
VLDT_RUN
80 ohm(4A)
PAR 5 OF 5
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS52
VSS54
VSS56
VSS57
VSS59
VSS24
A25
F11
D23E9G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14
L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
B7
W24
VSS43
Y22
AC23
D25
G24
AC14
AC22
R23C4AE22
H12
VSS51
T23
T25
AE14
H23
R17
VSS58
VSS55
VSS53
A23
F17D4M13
AC16
AC15
M17
+1.2V
80 ohm(4A)
L54
C75 1U/10V_4
C74 1U/10V_4
FBJ3216HS800
100U/6.3V_3528
VCC_NB
C70
C55
1U/10V_4
1U/10V_4
C60 1U/10V_4
D3A:Remove Jump
C458 100U/6.3V_3528
+1.2V
NB RS485 POWER STATES
Power Signal
VDDHT
VDDR
VDD18
VDDC
VDDA18
VDDA12
S0
ON
ON
ON
ON
ON
ON
ON
AVDDDI
PLLVDD
HTPVDD
VDDR3
LPVDD
LVDDR18D
ON
ON
ON
ON
ON
ON
LVDDR18A OFFON ON OFF OFF
S3
S1
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFFAVDD
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
S4/S5
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
G3
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
VDDA12
C95
C96
C C
B B
10U/10V/X5R_8
D25
2 1
2 1
+3V
SW1010C
+1.8V VDD18
L18 TI201209G121
2.2U/10V/X5R
RS485: VDDA18=1.8V
+1.8V VDDA18
L55 BLM18PG330SN1D
33 ohm (3000mA)
+3V VDDR3
L11 TI201209G121
+1.8V
VDDA12
C450
10U/10V/X5R_8
L17 TI201209G121
R41 0_6
RS485: 0 Ohm RESISTOR
A A
D24
SW1010C
C67
C90 1U/10V_4
D23
2 1
SW1010C
1 2
C443
10U/10V/X5R_8
C53
4.7U/6.3V_6
C78 1U/10V_4
C42
4.7U/6.3V_6
C89 1U/10V_4
C467
2.2U/10V/X5R
1 2
VDDDVO
C77 1U/10V_4
VDDPLL
C43 1U/10V_4
C92 1U/10V_4
C445 1U/10V_4
C76 1U/10V_4
C38 1U/10V_4
C80 1U/10V_410U/10V/X5R_8
C27 1U/10V_4
VDDA12_PKG1
C87 1U/10V_4
C31 1U/10V_4
VDDHT_PKG VDDA12_PKG1 VDDA12_PKG2
C446
10U/10V/X5R_8
C444 1U/10V_4
U16D
AE24
VDD_HT1
AD24
VDD_HT2
AD22
VDD_HT3
AB17
VDD_HT4
AE23
VDD_HT5
Y17
VDD_HT6
W17
VDD_HT7
AC18
VDD_HT8
AD21
VDD_HT9
AC19
VDD_HT10
AC20
VDD_HT11
AB19
VDD_HT12
AD23
VDD_HT13
AA17
VDD_HT14
AE25
VDD_HT15
J14
VDD18_1
J15
VDD18_2
AE2
VDDA18_1(VDDA12_13)
AB3
VDDA18_2(VDDA12_14)
U7
VDDA18_3(VDDA12_15)
W7
VDDA18_4(VDDA12_16)
AB4
VDDA18_5(VDDA12_17)
AC3
VDDA18_6(VDDA12_18)
AD2
VDDA18_7(VDDA12_19)
AE1
VDDA18_8(VDDA12_20)
E11
VDDR3_1
D11
VDDR3_2
AC12
VDD_DVO1(VDDR_1)
AD12
VDD_DVO2(VDDR_2)
AE12
VDD_DVO3(VDDR_3)
E7
VDDA12_13(VDDPLL_1)
F7
VDDA12_14(VDDPLL_2)
F9
VSSA49(VSSPLL_1)
G9
VSSA50(VSSPLL_2)
D22
VDDHT_PKG
M1
VDDA12_PKG1
AC11
VDDA12_PKG2
RS485M A11 HT
PART 4 OF 5
VDDA12_1 VDDA12_2 VDDA12_3 VDDA12_4 VDDA12_5 VDDA12_6 VDDA12_7 VDDA12_8
VDDA12_9 VDDA12_10 VDDA12_11 VDDA12_12
POWER
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32
D1 G7 E2 C1 E3 D2 M9 F4 B1 D3 L9 E6
L11 L13 L15 M12 R15 M14 N11 N13 N15 J11 H11 P12 P14 R11 R13 A19 B19 U11 U14 P17 L17 J19 D20 G20 A9 B9 C9 D9 A7 A4 U12 U15
C46 1U/10V_4
C45 1U/10V_4
C466
10U/10V/X5R_8
C447 C449
C39
10U/10V/X5R_8
1U/10V_4
C460
10U/10V/X5R_8
C470 1U/10V_4
C82 1U/10V_4
C448
10U/10V/X5R_8
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
RS485-POWER
5
4
3
2
Date: Sheet of
1
12 34Monday, April 10, 2006
1A
Page 13
5
4
3
2
1
+3V
L30 BK1608HS600
22 ohm/1A
D D
1- PLACE ALL SERIAL TERMINATION RESISTORS CLOSE TO U800
2- PUT DECOUPLING CAPS CLOSE TO Clock Gen.POWER PIN
C C
PDAT_SMB(15,19,24)
PCLK_SMB(15,19,24)
B B
CLK_VDD
C185 22U/10V_8
C183 .1U_4
C186 .1U_4
C179 .1U_4
+3V
L26 BK1608HS600
C184 .1U_4
300ohm/200mA
+3V
L25 BK1608HS600
3
R535 0_4
3
R536 0_4
+3V
+3V
2
2
Q15 *2N7002E-LF
1
Q14 *2N7002E-LF
1
300ohm/200mA
R110
R106
*10K_4
*10K_4
SMBDT
SMBCK
CLK_VDD
R113
10K_4
C146 1U/10V_4
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS1
FS2
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 1
CPU
FS0 HTT
SRCCLK
[2:1]
100.00
Hi-Z
X
180.00
220.00
100.00
133.33
200.00
Hi-Z
100.00
X/3 X/6
100.00
60.00
100.00 48.00
36.56
66.66
100.00
100.00
66.66
66.66
100.00 Normal ATHLON64 operation
C165
C178
C171
.1U_4
.1U_4
C159 1U/10V_4
CLK_VDD_REF
.1U_4
Parallel Resonance Crystal
C128 33P_4
C130 33P_4
USB
PCI
Hi-Z
48.00
48.00
48.00
30.00
73.12
48.00
33.33
33.33
48.00
C172
.1U_4
.1U_4
CLK_VDD_USB
C164 .1U_4
21
CLK_XOUT_R
Y3
14.31818MHZ
Ioh = 5 * Iref (2.32mA)
Voh = 0.71V @ 60 ohm
COMMENT
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
33.33 48.00
R102 *1M_4
R101 0_4
SMBCK(7) SMBDT(7)
CLK_VDD
CLK_XIN
CLK_XOUT
R126 475/F_4
U10
54
VDDCPU
14
VDD_SRC1
23
VDD_SRC2
28
VDD_SRC3
44
VDD_SRC4
5
VDD_48
39
VDD_ATIG
2
VDD_REF
60
VDDHTT
53
GND_CPU
15
GND_SRC1
22
GND_SRC2
29
GND_SRC3
45
GND_SRC4
8
GND_48
38
GND_ATIG
1
GND_REF
58
GNDHTT
3
XIN
4
XOUT
11
RESET_IN#
61
NC
9
SMBCLK
10
SMBDAT
48
IREF
ICS951462
CLKREQA# CONTROL SRC5,6,7 CLKREQB# CONTROL SRC2,3,4 CLKREQC# CONTROL SRC0,1
VDDA
GNDA
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
SRCCLKT0 SRCCLKC0 ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT1 SRCCLKC1
SRCCLKT2 SRCCLKC2
SRCCLKT3 SRCCLKC3
SRCCLKT4 SRCCLKC4
SRCCLKT5 SRCCLKC5
SRCCLKT6 SRCCLKC6
SRCCLKT7 SRCCLKC7
CLKREQA# CLKREQB# CLKREQC#
48MHz_1 48MHz_0
FS1/REF1 FS0/REF0 FS2/REF2
HTTCLK0
50 49
56 55 52 51
16 17 41 40 37 36 35 34 30 31 18 19 20 21 24 25 26 27 47 46 43 42 12 13
57 32 33
7 6
63 64 62 59
CLK_VDDA
CPUCLK_EXT_R CPUCLK#_EXT_R
SBLINK_CLKP_R SBLINK_CLKN_R NBSRC_CLKP_R NBSRC_CLKN_R
SBSRC_CLKP_R SBSRC_CLKN_R GPP_CLK0P_R GPP_CLK0N_R GPP_CLK1P_R GPP_CLK1N_R GPP_CLK2P_R GPP_CLK2N_R GPP_CLK3P_R GPP_CLK3N_R
R540 2.2K_4
R541 2.2K_4
R117 0_4 R156 0_4
T51
CLK_48M_1_R CLK_48M_2_R
CLK_VDDA
C174 .1U_4
R116 47/F_6 R121 47/F_6
R124 33/F_4 R127 33/F_4 R143 33/F_4C149 R146 33/F_4
R128 33/F_4 R132 33/F_4 R134 33/F_4 R138 33/F_4 R145 33/F_4 R149 33/F_4 R150 33/F_4 R153 33/F_4 R130 33/F_4 R135 33/F_4
CLK_VDD
R119 33/F_4 R115 33/F_4
SB_OSCIN_R
NB_OSCIN_R
HTREFCLK_R
L28 BK1608HS600
C170 22U/10V_8
R118 261/F
MINI_CLKREQ3# (19) NEW_CLKREQ# (24)
CLK48_PCM (24) USBCLK (15)
R105 33/F_4
R108 33/F_4
R112 33/F_4
R103 8.2K_4 R99 8.2K_4 R109 8.2K_4
+3V
CPUCLK (5) CPUCLK# (5)
SBLINK_CLKP (11) SBLINK_CLKN (11) NBSRC_CLKP (11) NBSRC_CLKN (11)
SBSRCCLK (14) SBSRCCLK# (14) CLK_PCIE_MINI_A (19)
CLK_PCIE_MINI_A# (19)
CLK_PCIE_LAN (23)
CLK_PCIE_LAN# (23)
CLK_PCIE_NEW (24) CLK_PCIE_NEW# (24)
CLK_PCIE_MINI_B (19)
CLK_PCIE_MINI_B# (19)
R129 49.9/F
R137 49.9/F
R154 49.9/F
CLK_VDD
R151 49.9/F
R111
49.9/F
R148 49.9/F
R144 49.9/F
R98
2.2K_4
R133 49.9/F
R139 49.9/F
R97
2.2K_4
SB_OSCIN (15)
NB_OSC (11)
HTREFCLK (11)
R104
2.2K_4
R100 *0_4 R96 *0_4 R107 *0_4
R122 49.9/F
R147 49.9/F
R142 49.9/F
R125 49.9/F
R136 49.9/F
R131 49.9/F
Check AMD clock
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
EXTERNAL CLOCK GENERATOR
5
4
3
2
Date: Sheet of
1
13 34Monday, April 10, 2006
1A
Page 14
EC_PWRGD
D D
R1735
R1737
R1738
PCIE Power
+1.8V
C C
L35
TI201209G121
5
C617 1000p/50V_4
ALINK_RST#(11,19,21,23,24)
U12
NC7SZ08P5X_NL
R221 *0_4
SB CALIBRATION RESISITOR VALUE
SB600
562 OHM 1%
2.05K 1%
0 ohm
C225
22U/10V_8
C243
.1U_4
SB460
150 OHM 1%
150 OHM 1%
4.12K 1%
+1.8V
C239
.1U_4
L61
SBK160808T-301Y-S
C233
.1U_4
+3VSUS
4
C244
.1U_4
53
1
2
10U/10V/X5R_8
C343 .1U_4
EC_PWRGD
SBSRCCLK(13)
SBSRCCLK#(13)
A_RX0P(10)
A_RX0N(10)
A_RX1P(10)
A_RX1N(10)
A_TX0P(10) A_TX0N(10) A_TX1P(10) A_TX1N(10)
PCIE_VDDR
C493
C492
1U/10V_4
C246
C238
.1U_4
.1U_4
RTC
D27 RB751
RTC_N02
RTC_N01
RTC_N03
2 1
D26 RB751
2 1
R481 1.5K/F_6
2 1
CN11 ACS_88266-0200
C383 1U/10V_4
RTC_N04
ECN 2A Per ME's request, Swap Pin1 and Pin2
+3VPCU
3VRTC
C549 .1U_4
R480 1K/F_4
Q31
MMBT3904
1 3
2
B B
A A
VCCRTC
C394 .1U_4
1 2
R482 1.5K/F_6
JP7 *Clear PAD
FOR SB600, CONNECT TO CPU_PG/LDT_PG FOR SB460, CONNECT TO
R290
SSMUXSEL/GPIO0
100/F_6
+5VSUS
R486
4.7K/F_6
R485 15K/F_6
4
R217 8.2K_4
16mA
C497 .01U_4 C526 *33P_4 C496 .01U_4 C495 .01U_4
T116 T115 T114 T117
T66 T62 T70 T67
C498
.1U_4
C234
.1U_4
R256 20M_4
CPU_PWRGD(5,15)
LDT_STOP#(5,11,15)
ALLOW_LDTSTOP(11)
LDT_RST#(5)
CPU_PWR_SB
PCIE_VDDR
C494 .01U_4
R382 150/F_6 R383 150/F_6
R381 4.12K/F_6
C237
C236
.1U_4
.1U_4
ATi Recommend Vendor: NSK Part Number: NXG 32.768KAE12FUD 16 PPM.
Y6 32.768KHZ
41
2 3
R226 20M_4
C366 18P_4
ATI recommand have internal pull-up
CPU_PWR_SB
R170 *10K_4
T60 T64 T65 T68
T71 T61 T59
T133
H_DPSLP#(15)
T69
R180 *0_4
R396 0_4
FOR SB460, THIS BALL IS LDT_RST# ONLY
3
U23A
AG10
A_RST#
J24
PCIE_RCLKP
J25
A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C
PCIE_CALRP PCIE_CALRN
PCIE_CALI
PCIE_PVDD
32K_X1
32K_X232K_X232K_X232K_X2
C352 18P_4
32K_X1
32K_X2
H_INTR H_NMI H_INIT#
H_IGNNE# BMREQ# H_A20M# H_FERR#
STP_CPU#
DPRSLPVR
PCIE_RCLKN
P29
PCIE_TX0P
P28
PCIE_TX0N
M29
PCIE_TX1P
M28
PCIE_TX1N
K29
PCIE_TX2P
K28
PCIE_TX2N
H29
PCIE_TX3P
H28
PCIE_TX3N
T25
PCIE_RX0P
T26
PCIE_RX0N
T22
PCIE_RX1P
T23
PCIE_RX1N
M25
PCIE_RX2P
M26
PCIE_RX2N
M22
PCIE_RX3P
M23
PCIE_RX3N
E29
PCIE_CALRP
E28
PCIE_CALRN
E27
PCIE_CALI
U29
PCIE_PVDD
U28
PCIE_PVSS
F27
PCIE_VDDR_1
F28
PCIE_VDDR_2
F29
PCIE_VDDR_3
G26
PCIE_VDDR_4
G27
PCIE_VDDR_5
G28
PCIE_VDDR_6
G29
PCIE_VDDR_7
J27
PCIE_VDDR_8
J29
PCIE_VDDR_9
L25
PCIE_VDDR_10
L26
PCIE_VDDR_11
L29
PCIE_VDDR_12
N29
PCIE_VDDR_13
D2
X1
C1
X2
AC26
CPU_PG/LDT_PG
W26
INTR/LINT0
W24
NMI/LINT1
W25
INIT#
AA24
SMI#
AA23
SLP#/LDT_STP#
AA22
IGNNE#/SIC
AA26
A20M#/SID
Y27
FERR#
AA25
STPCLK#/ALLOW_LDTSTP
AH9
CPU_STP#/DPSLP_3V#
B24
DPSLP_OD#/GPIO37
W23
DPRSLPVR
AC25
LDT_RST#/DPRSTP#/PROCHOT#
SB460
SB460 SB 27x27mm
Part 1 of 4
PCI
SPDIF_OUT/PCICLK7/GPIO41
PCI EXPRESS
INTERFACE
CBE2#/ROMWE#
PCI INTERFACE
DEVSEL#/ROMA0
TRDY#/ROMOE#
XTAL
LPC
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
CPU
RTC_IRQ#/GPIO69
RTC
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6
CLKS
PCIRST#
AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11
AD8/ROMA9
AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7
AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE3#
FRAME#
IRDY#
PAR/ROMA19
STOP# PERR# SERR# REQ0# REQ1#
REQ2# REQ3#/GPIO70 REQ4#/GPIO71
GNT0# GNT1#
GNT2# GNT3#/GPIO72 GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
VBAT
RTC_GND
U2 T2 U1 V2 W3 U3 V1 T1
AJ9
W7 Y1 W8 W5 AA5 Y3 AA6 AC5 AA7 AC3 AC7 AJ7 AD4 AB11 AE6 AC9 AA3 AJ4 AB1 AH4 AB2 AJ3 AB3 AH3 AC1 AH2 AC2 AH1 AD2 AG2 AD1 AG1 AB9 AF9 AJ5 AG3 AA2 AH6 AG5 AA1 AF7 Y2 AG8 AC11 AJ8 AE2 AG9 AH8 AH5 AD11 AF2 AH7 AB12 AG4 AG7 AF6
AD3 AF1 AF4 AF3
AG24 AG25 AH24 AH25 AF24 AJ24 AH26 W22 AF23
D3 F5
E1 D1
PCI_MINI PCI_591 PCI_PCM PCI_SIO PCI_CLK4 PCI_LAN PCI_CLK6 SPDIF_RR
PCIRST#_C
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1# REQ2# REQ3# REQ4# GNT0# GNT1# GNT2# GNT3# GNT4# CLKRUN# PCI_LOCK#
INTE# INTF# INTG# INTH#
LAD0 LAD1 LAD2 LAD3 LFRAME#/FWH4 LDRQ#0 LDRQ#1
SERIRQ
R441 22_4 R431 22_4 R442 22_4 R443 22_4 R445 22_4 R437 22_4 R444 22_4 R439 0_4
AD[0..31]
CBE0# (18,24) CBE1# (18,24) CBE2# (18,24) CBE3# (18,24) FRAME# (18,24) DEVSEL# (18,24) IRDY# (18,24) TRDY# (18,24) PAR (18,24) STOP# (18,24) PERR# (18,24) SERR# (18,24)
REQ2# (18) REQ3# (24)
GNT2# (18) GNT3# (24)
CLKRUN# (18,24,28)
VCCRTC
C524
1U/10V_4
2
PCLK_MINI PCLK_591 PCLK_PCM PCLK_SIO PCICLK4 PCLK_LAN PCICLK6
INTE# (24)
INTF# (18) INTG# (18,24) INTH# (24)
Add for debug.
PCLK_MINI (17,18) PCLK_591 (17,28) PCLK_PCM (17,24) PCLK_SIO (17) PCICLK4 (17) PCLK_LAN (17) PCICLK6 (17)
SB_SPDIF_OUT (17)
AD[0..31] (17,18,24)
EC_PWRGD(5,15,28)
PCIRST#_C
C517 *82P_4
LAD0/FWH0 (28) LAD1/FWH1 (28) LAD2/FWH2 (28) LAD3/FWH3 (28) LFRAME#/FWH4 (17,28)
BMREQ# (11) SERIRQ (18,24,28)
RTC_CLK (17) AUTO_ON# (17)
PCLK_MINI PCLK_591 PCLK_PCM PCLK_SIO PCICLK4 PCLK_LAN PCICLK6
+3V
C523
.1U_4
U25 NC7SZ08P5X_NL
53
1
2
R452
8.2K_4
R454 *0_4
ECN 2A BOM CHANGE AND UNMOUNTED R454
PCI_LOCK#
INTE# INTF# INTG# INTH#
SERIRQ
PERR# FRAME# TRDY# STOP#
REQ4# DEVSEL# REQ0# REQ2#
GNT0# GNT2# GNT3# GNT1#
REQ3# SERR# REQ1# IRDY#
C252 18P_4
PCIRST#
4
R253 8.2K_4 R251 8.2K_4 R479 8.2K_4 R262 8.2K_4 R252 8.2K_4
GNT4#
R263 *8.2K_4
PAR
R254 *8.2K_4
LAD3
R179 100K/F_4
LAD2
R401 100K/F_4
LAD1
R182 100K/F_4
LAD0
R185 100K/F_4
BMREQ#
RN2 10KX4_4
CLKRUN# LDRQ#1 LDRQ#0
1
Reserved For EMI
C527 *33P_4 C522 *33P_4 C528 *33P_4 C529 *33P_4 C531 *33P_4
C530 *33P_4
C532 82P_4
+3V
R183 10K_4
RN6 8.2KX4_4
1
2
3
4
5
6
78
RN7 8.2KX4_4
1
2
3
4
5
6
78
RN4 *8.2KX4_4
1
2
3
4
5
6
78
RN5 8.2KX4_4
1
2
3
4
5
6
78
R173 10K_4
1
2
3
4
5
6
78
PCIRST# (18,23,24,28)
C360 .1U_4
+3V
C240 .1U_4
C516 .1U_4
SB-1
R168 10K_4
H_DPSLP#
5
4
3
2
Size Document Number Rev Custom
SB460M PCIE/PCI/CPU/LPC I/F
Date: Sheet of
PROJECT : ED5
Quanta Computer Inc.
1
14 34Monday, April 10, 2006
2A
Page 15
5
R398 *22_4
SB_OSCIN
PU/PD Edison-- 11/07 Modify
D D
SUS_STAT#
SUSB# SUSC# DNBSW ON#
PME# SWI#
EMAIL_LED #
RI#
GPM7# GEVENT5# PCIE_W AKE#
MAX6648_AL#
C C
SB_THER MTRIP#
EXTEVNT1# GPIO5
PCLK_SMB PDAT_SMB
SB_LLB#
GPIO7 RCIN#
GPIO10 GPIO13
GPIO31
GPIO14 RST_HDD #
B B
GPIO1 GPIO3 GPIO0 PCSPK CPU_PRO CHOT#
If throttling from SM remore R264
AC_SDIN2 AZ_SDIN1 CD_SDIN0 AC_BITCLK _R AZ_RST# AZ_SYNC AZ_SDOU T AZ_BITCLK
CD_BITCLK A_MDC(26)
A A
AZ_BITCLK A(26)
R433 10K_4
R211 4.7K/F_4 R218 4.7K/F_4 R238 10K_4
R434 4.7K/F_4 R207 10K_4
R436 10K_4
R435 10 K_4
R422 10K_4 R456 10K_4 R210 4.7K/F_4
R457 10K_4
R214 10K_4
R171 10K_4 R408 4.7K/F_4
R165 2.2K_4 R379 2.2K_4
R432 *10K_ 4
R403 10K _4 R184 10K _4
R380 10K _4 R261 10K _4
R175 10K _4
R208 10K _4 R390 10K _4 R394 10K _4 R404 10K _4 R392 *10K_ 4 R393 10K _4 R385 10K _4
R196 10K _4 R212 10K _4 R206 10K _4 R255 10K _4 R426 10K _4 R237 10K _4 R235 10K _4 R234 10K _4
R249 39_ 4
C358
*22P_4
R250 39_ 4
C359
*22P_4
+3V_S5
+3V
AZ_BITCLK
Delay 20ms after S5 powerOK
C525 .1U_4
C217 .1U_4
H_DPSLP #(1 4)
MAX6648_AL#(5)
AZ_SDOU TA(26) AZ_RESE T#(26)
PME#(19,23,24)
RI#(24)
SUSB#(28)
SUSC#(28)
DNBSW ON#(28)
EC_PW RGD(5,14,28 )
GATEA20(28)
RCIN#(28)
SWI#(28)
PCIE_W AKE#(19,24 )
SB_THER MTRIP#(5)
RSMRST#(28)
SB_OSCIN(13)
CPU_PRO CHOT#(5)
RST_HDD #(21)
PCSPK(26) PCLK_SMB(13,19,24) PDAT_SMB(13 ,19,24)
CPU_PW RGD(5,1 4)
LDT_STOP#(5,11 ,14)
SB-2
5
AZ_RST#
USB_OCP 4#(22) USB_OCP 3#(22)
T134
SCI#(28) KBSMI#(28)
T136
AC_SDOU T(17) CD_SDIN0(26) AZ_SDIN1(26)
T79
T80
T77
+3V_S5
C356 *22P_ 4
C357 *22P_ 4
4
C500 *10P_4
SUS_STAT#
R194 10K_4 R193 10K_4
R402 0_4
BOARD_ID1 BOARD_ID0
R391 0_4
SB_LLB#
R424 0_4
T137
T78
R455 10 K_4
T119
H_DPSLP #
MAX6648_AL#
R240 0_4
T72
ECB 2A BOM CHAG E AND STUFF R240 . For CPU speed issue.
R244 39_ 4
R245 39_ 4
4
3
U23D
PME# RI# SUSB# SUSC# DNBSW ON#
GATEA20 RCIN# SWI# EXTEVNT1# GEVENT5# GPM7# PCIE_W AKE# EMAIL_LED # SB_THER MTRIP#
RSMRST#
SB_14M_X1
GPIO10 GPIO1 CPU_PRO CHOT# GPIO7 RST_HDD # GPIO5 PCSPK PCLK_SMB PDAT_SMB
GPIO0
USB_OCP 9# USB_OCP 8#
USB_OCP 7# USB_OCP 6#
USB_OCP 4# USB_OCP 3# USB_OCP 2# SCI# KBSMI#
AZ_BITCLK AZ_SDOU T
AZ_SYNC
AC_BITCLK _R AC_SDOU T CD_SDIN0 AZ_SDIN1 AC_SDIN2
AC_SYNC_R
AC_RST#
GPIO3 GPIO31 GPIO13
GPIO14
AZ_SDOU T AZ_RST#
A3
PCI_PME#/G EVENT4#
B2
RI#/EXTEVN T0#
F7
SLP_S3#
A5
SLP_S5#
E3
PWR_ BTN#
B5
PWR_ GOOD
B3
SUS_STA T#
F9
TEST2
E9
TEST1
G9
TEST0
AF26
GA20IN
AG26
KBRST#
D7
LPC_PME #/GEVENT3#
C25
LPC_SMI#/E XTEVNT1#
D9
S3_STAT E/GEVENT5#
F4
SYS_RESET #/GPM7#
E7
WAKE #/GEVENT8#
C2
BLINK/GPM6 #
G7
SMBALER T#/THRMTRIP#/GEVE NT2#
E2
RSMRST#
B23
14M_OSC
C28
SATA_IS0# /GPIO10
A26
ROM_CS# /GPIO1
B29
GHI#/SATA_ IS1#/GP IO6
A23
WD_ PWRGD/GPIO7
B27
SMARTVO LT/SATA_IS2#/GPIO4
D23
SHUTDOW N#/GPIO5
B26
SPKR/GPIO2
C27
SCL0/GPO C0#
B28
SDA0/GPO C1#
C3
SCL1/GPO C2#
F3
SDA1/GPO C3#
D26
DDC1_SC L/GPIO9
C26
DDC1_SD A/GPIO8
A27
SSMUXSE L/SATA_IS3#/GPIO0
A4
LLB#/GPIO6 6
C6
USB_OC9 #/SLP_S2/GPM9#
C5
USB_OC8 #/AZ_DOCK_RST #/GPM8#
C4
USB_OC7 #/GEVENT7#
B4
USB_OC6 #/GEVENT6#
B6
USB_OC5 #/DDR3_RST#/GP M5#
A6
USB_OC4 #/GPM4#
C8
USB_OC3 #/GPM3#
C7
USB_OC2 #/GPM2#
B8
USB_OC1 #/GPM1#
A8
USB_OC0 #/GPM0#
N2
AZ_BITCLK
M2
AZ_SDOU T
K2
AZ_SDIN3/G PIO46
L3
AZ_SYNC
K3
AZ_RST#
L1
AC_BITCLK /GPIO38
L2
AC_SDOU T/GPIO39
L4
ACZ_SDIN0 /GPIO42
J2
ACZ_SDIN1 /GPIO43
J4
ACZ_SDIN2 /GPIO44
M3
AC_SYNC/GPIO4 0
L5
AC_RST# /GPIO45
E23
NC1
AC21
NC2
AD7
NC3
AE7
NC4
AA4 F19
NC5 AVSS_US B_22
T4
NC6
D4
NC7
AB19
NC8
SB460
CD_SYNC_M DC(26)
AZ_SYNCA(26)
SB460 SB 27x27mm
Part 4 of 4
ACPI / WAKE
UP EVENTS
OSC / RST
GPIO
USB OC
AC97 AZALIA
R242 39_4
C354 *22P_ 4
R243 39_4
C355 *22P_ 4
3
USB INTERFACE
USB PWR
AZ_SYNC
USBCLK
USB_RCO MP
USB_ATE ST1 USB_ATE ST0
USB_HSD P9+ USB_HSD M9-
USB_HSD P8+ USB_HSD M8-
USB_HSD P7+ USB_HSD M7-
USB_HSD P6+ USB_HSD M6-
USB_HSD P5+ USB_HSD M5-
USB_HSD P4+ USB_HSD M4-
USB_HSD P3+ USB_HSD M3-
USB_HSD P2+ USB_HSD M2-
USB_HSD P1+ USB_HSD M1-
USB_HSD P0+ USB_HSD M0-
AVDDTX_ 0 AVDDTX_ 1 AVDDTX_ 2 AVDDTX_ 3 AVDDTX_ 4 AVDDRX_ 0 AVDDRX_ 1 AVDDRX_ 2 AVDDRX_ 3 AVDDRX_ 4
AVDDC
AVSSC
AVSS_US B_1 AVSS_US B_2 AVSS_US B_3 AVSS_US B_4 AVSS_US B_5 AVSS_US B_6 AVSS_US B_7 AVSS_US B_8
AVSS_US B_9 AVSS_US B_10 AVSS_US B_11 AVSS_US B_12 AVSS_US B_13 AVSS_US B_14 AVSS_US B_15 AVSS_US B_16 AVSS_US B_17 AVSS_US B_18 AVSS_US B_19 AVSS_US B_20 AVSS_US B_21
AVSS_US B_23 AVSS_US B_24 AVSS_US B_25 AVSS_US B_26 AVSS_US B_27 AVSS_US B_28 AVSS_US B_29 AVSS_US B_30 AVSS_US B_31 AVSS_US B_32 AVSS_US B_33
SB_48M_X1
A17
USB_RCO MP
A14
A11 A10
H12 G12
E12 D12
E14 D14
G14 H14
D16 E16
D18 E18
G16 H16
G18 H18
D19 E19
G19 H19
B9 B11 B13 B16 B18 A9 B10 B12 B14 B17
A12
A13
A16 C9 C10 C11 C12 C13 C14 C16 C17 C18 C19 C20 D11 D21 E11 E21 F11 F12 F14 F16 F18
F21 G11 G21 H11 H21 J11 J12 J14 J16 J18 J19
CD_RESE T#_MDC(26)CD_SDOU TA_MDC(26)
2
C508 *10P_4
R413 *22_4
R409 0_6
R411 *0_6
R414 11.8 K/F_4
ECN 2A
T127
CHANGE R 414'S FOOTPRINT TO 0402
T130
T76
T74
T75 T73
USBP7+ (22) USBP7- (22 )
USBP6+ (20) USBP6- (20)
USBP5+ (19) USBP5- (19 )
USBP4+ (24) USBP4- (24 )
USBP3+ (22) USBP3- (22 )
USBP2+ (22) USBP2- (22 )
USBP1+ (22) USBP1- (22 )
USBP0+ (22) USBP0- (22 )
AVDD_US B
R430 39_ 4
C519 *22P_ 4
R429 39_ 4
C518 *22P_ 4
2
USBCLK (13)
USB0: M/B IO USB1: M/B IO USB2: D/B IO USB3: D/B IO USB4: NEW CARD USB5: MINI CARD USB6: DSC USB7: BLU ETOOTH
USB power
AVDD_US B
C514
22U/10V_ 8
C267 .1U_4
+3.3V_AV DDC
C512
2.2U/10V/X 5R
1 2
+3V
ALAN????
1
USB power use S3 power,But Over current signal datasheet is S5 only,But ATI FAE say use S3 is ok
+3V_S5
AZ_RST# KBSMI#
USB_OCP 2# SCI#
USB_OCP 9# USB_OCP 8#
USB_OCP 3# USB_OCP 4# USB_OCP 6# USB_OCP 7#
C289
C297 1U/10V_4
C262 .1U_4
C513 1U/10V_4
For SATA mount R172, For PATA mount R176
*10K_4@SATA R172
R164 *10K_ 4
Board ID
.1U_4
C511
.1U_4
BOARD_ID0
BOARD_ID1
ID1 ID0
00
R428 *10K_ 4
R420 4.7K/F_4
RP20 10KX2_4
RP8 10KX2_4
RN3 10KX4_4
C274
.1U_4
SBK1608 08T-301Y-S
10K_4@PATA R176
R167 10K _4
1 3
1 3
2 4 6
L63
TI201209G121
C281
.1U_4
L62
2 4
2 4
1 3 5 78
A-Test
+3V_S5
C367 .1U_4
+3VSUS
01
10
11
Size Do cument Number Rev Custom
Date: Sheet of
PROJECT : ED5
Quanta Computer Inc.
SB460M ACPI/GPIO/USB/AC97
15 34Mond ay, April 10, 2006
1
2A
Page 16
5
C259 .1U_4
C504 .01U_4 C507 .01U_4
*1K/F_4@SATA R191
SATA_ACT#
PLLVDD_ATA
XTLVDD_ATA
+1.8V_ATA
C276 .1U_4
SATA_TXP0(21) SATA_TXN0(21)
SATA_RXN0(21) SATA_RXP0(21)
D D
+3V+5V
R205
R213
4.7K/F_4
4.7K/F_4
2
Q18 *MMBT3904@SATA
SATA_LED#(29)
13
SATA Power
C C
B B
L42 *SBK160808T-301Y-S@SATA
+1.8V
L43 *SBK160808T-301Y-S@SATA
+1.8V +1.8V_ATA
L40 *TI201209G121_8@SATA
C250
22U/10V_8
R190 0_6@PATA
R192 0_6@PATA
R186 0_6@PATA
XTLVDD_ATA+1.8V
C282 22U/10V_8
C300 22U/10V_8
For First build ,If next build no use remove from BOM.
PLLVDD_ATA
C285 .1U_4
C268 1U/10V_4
C278 1U/10V_4
C277 .1U_4
XTLVDD_ATA
PLLVDD_ATA
+1.8V_ATA
C271 .1U_4
SATA_TX0+_C SATA_TX0-_C
T120 T118
T121 T123
T129 T126
T124 T125
T135 T131
T132 T128
SATA_CAL
SATA_X1
SATA_X2
C266 .1U_4
SATA clock Option
For First build ,If next build no use remove from BOM.
C214 *27P_4@SATA
C216
Y5
*25MHZ@SATA
2 1
A A
*27P_4@SATA
SB-3
R159 *33/F_4
R_3COM_25MLSATA_X1
R161
R160 *10M_4@SATA
SATA_X2
5
0_4@PATA
Modify Resistor
D3A:R161 When PATA mount CS00002JB38 SATA And Osc mount CS04992FB31
Y4
3
OUT
*25MHZ_OSC
VCC
VSSOE
4
21
AH21
AJ21
AH20
AJ20
AH18
AJ18
AH17
AJ17
AH13 AH14
AH16
AJ16
AJ11
AH11
AH12
AJ13
AF12
AD16
AD18
AC12
AD14
AJ10
AC16
AE14 AE16 AE18 AE19 AF19
AF21 AG22 AG23
AH22
AH23
AJ12 AJ14 AJ19 AJ22 AJ23
AB14
AB16
AB18
AC14
AC18
AC19
AD12
AD19
AD21
AE12
AE21
AF11
AF14
AF16
AF18 AG11 AG12 AG13 AG14 AG16 AG17 AG18 AG19 AG20 AG21
AH10
AH19
VCC_Y6
U23B
SB460
4
SATA_TX0+ SATA_TX0-
SATA_RX0­SATA_RX0+
SATA_TX1+ SATA_TX1-
SATA_RX1­SATA_RX1+
SATA_TX2+ SATA_TX2-
SATA_RX2­SATA_RX2+
SATA_TX3+ SATA_TX3-
SATA_RX3­SATA_RX3+
SATA_CAL
SATA_X1
SATA_X2
SATA_ACT#/GPIO67
PLLVDD_SATA_1 PLLVDD_SATA_2
XTLVDD_SATA
AVDD_SATA_1 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_4 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 AVDD_SATA_8 AVDD_SATA_9 AVDD_SATA_10 AVDD_SATA_11 AVDD_SATA_12 AVDD_SATA_13 AVDD_SATA_14 AVDD_SATA_15
AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 AVSS_SATA_21 AVSS_SATA_22 AVSS_SATA_23 AVSS_SATA_24 AVSS_SATA_25 AVSS_SATA_26 AVSS_SATA_27
L32
*BLM11A121S_6
C213 *.1U_4
4
SB460 SB 27x27mm
Part 2 of 4
SERIAL
ATA
SERIAL ATA
POWER
+3V
C502 *.1U_4
ATA 66/100
SPI_HOLD#/GPIO31
SPI ROMHW
ROM_RST#/GPIO14
TEMPIN3/TALERT#/GPIO64
MONITOR
IDE_IORDY
IDE_IRQ
IDE_A0 IDE_A1 IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#
IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23
IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11 SPI_CLK/GPIO47
SPI_CS#/GPIO32
LAN_RST#/GPIO13
FANOUT0/GPIO3
FANOUT1/GPIO48 FANOUT2/GPIO49
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63
VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60
AVDD
AVSS
AB29 AA28 AA29 AB27 Y28 AB28 AC27 AC29 AC28 W28 W27
AD28 AD26 AE29 AF27 AG29 AH28 AJ28 AJ27 AH27 AG27 AG28 AF28 AF29 AE28 AD25 AD29
J3 J6 G3 G2 G6
C23 G5
M4 T3 V4
N3 P2 W4
P5 P7 P8 T8 T7
V5 L7 M8 V6 M6 P4 M7 V7
N1
M1
3
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
+1.8VUSB_PHY
R209 1K/F_4
+5V
+3V
D10 SW1010C
3
+3V
PHDRDY (21) IRQ14 (21) PDA0 (21) PDA1 (21) PDA2 (21) PDDACK# (17,21) PDDREQ (21) PDIOR# (21) PDIOW# (21) PDCS1# (21) PDCS3# (21)
+1.8V
+3V_S5
+1.8V_S5
C255
C254
.1U_4
.1U_4
2 1
L34
FBJ3216HS800
80ohm/4A
PDD[0..15] (21)
L36
FBJ3216HS800
80ohm/4A
L46
SBK160808T-301Y-S
L44
SBK160808T-301Y-S
+1.8V
EMI--11/08
C256 .1U_4
C219
100U/6.3V_3528
C301 .1U_4
C235 .1U_4
C221
100U/6.3V_3528
C286 .1U_4
C269 .1U_4
C351 22U/10V_8
CPU_PWR=1.8V WHEN SB600 CPU_PWR=1.2V WHEN SB460
L33 SBK160808T-301Y-S
V5_VREF
C292
C291
1U/10V_4
.1U_4
+1.8VSUS
C314 .1U_4
C302 .1U_4
C320 .1U_4
C284
22U/10V_8
C295 .1U_4
C265 .1U_4
C324 .1U_4
2
C305 .1U_4
C257 .1U_4
C312 .1U_4
C264
C260
1U/10V_4
1U/10V_4
C272
C279
.1U_4
.1U_4
C323
C307
.1U_4
.1U_4
C335
C332
.1U_4
10U/10V/X5R_8
+1.8V
+1.2V
C220
2.2U/10V/X5R
1 2
11/28-Arec
L37
SBK160808T-301Y-S
2
VDDQ_3V
C318 .1U_4
C303 .1U_4
C241 .1U_4
VDD_1.8V
C294 1U/10V_4
C261 .1U_4
SB_S5_3V
C304 .1U_4
SB_S5_1.8V
C315 .1U_4
+1.8VUSB_PHY
C224 .1U_4
R166 *0_4
R169 0_4
AVDD_CK_1.8V
C228 1U/10V_4
+1.8VUSB_PHY
C251 .1U_4
C287 .1U_4
C247 .1U_4
C231 22U/10V_8
1
U23C
A25
SB4600 SB 27x27mm
C249 .1U_4
C242 .1U_4
C230 .1U_4
C293 1U/10V_4
C263 .1U_4
C321 .1U_4
C334 .1U_4
CPU_PWR_SB
V5_VREF
C245
.1U_4
C29 D24
W21
W29 AA12 AA16 AA19
AC4 AC23 AD27
AE1
AE9 AE23 AH29
AJ2
AJ6
AJ26
M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
V13
V17
A18
A19
B19
B20
B21
AA27
AE11
A24
A22
B22
V29
V28
V27
V26
V25
V24
V23
V22
U27
T29
T28
T27
T24
T21
A28
L9
L21
M5
P3 P9 T5
V9 W2 W6
A2
A7
F1
J5 J7
K1
G4 H1 H2 H3
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 VDDQ_24 VDDQ_25 VDDQ_26 VDDQ_27 VDDQ_28
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12
S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6
S5_1.2V_1 S5_1.2V_2 S5_1.2V_3 S5_1.2V_4
USB_PHY_1.2V_1 USB_PHY_1.2V_2 USB_PHY_1.2V_3 USB_PHY_1.2V_4 USB_PHY_1.2V_5
CPU_PWR
V5_VREF
AVDDCK_3.3V
AVDDCK_1.2V
AVSSCK
PCIE_VSS_42 PCIE_VSS_41 PCIE_VSS_40 PCIE_VSS_39 PCIE_VSS_38 PCIE_VSS_37 PCIE_VSS_36 PCIE_VSS_35 PCIE_VSS_34 PCIE_VSS_33 PCIE_VSS_32 PCIE_VSS_31 PCIE_VSS_30 PCIE_VSS_29
SB460
Part 3 of 4
POWER
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57
PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8
PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 PCIE_VSS_16 PCIE_VSS_17 PCIE_VSS_18 PCIE_VSS_19 PCIE_VSS_20 PCIE_VSS_21 PCIE_VSS_22 PCIE_VSS_23 PCIE_VSS_24 PCIE_VSS_25 PCIE_VSS_26 PCIE_VSS_27PCIE_VSS_28
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev Custom
SB450M HDD/POWER/DECOUPLING
Date: Sheet of
1
A1 A20 A21 A29 B1 B7 B25 C21 C22 C24 D6 E24 F2 F23 G1 J1 J8 L6 L8 M9 M12 M15 M18 N13 N17 P1 P6 P21 R12 R15 R18 T6 T9 U13 U17 V3 V8 V12 V15 V18 V21 W1 W9 Y29 AA11 AA14 AA18 AC6 AC24 AD9 AD23 AE3 AE27 AG6 AJ1 AJ25 AJ29
D27 D28 D29 F26 G23 G24 G25 H27 J23 J26 J28 K27 L22 L23 L24 L27 L28 M21 M24 M27 N27 N28 P22 P23 P24 P25 P26P27
16 34Monday, April 10, 2006
1A
Page 17
5
R273 *10K_4
R274 10K_4
+3V_S5+3V
Edison-11/01--Change to SB460
D D
AC_SDOUT(15)
RTC_CLK(14)
PCICLK4(14)
PCICLK6(14)
PCLK_MINI(14,18)
PCLK_591(14,28)
R225 10K_4
R220 *10K_4
4
R472 *10K_4
R471 10K_4
3
+3V +3V+3V+3V
R248 10K_4
R260 *10K_4
R440
R466
10K_4
*10K_4
AUTO_ON#(14)
SB_SPDIF_OUT(14)
PCLK_PCM(14,24)
PCLK_SIO(14)
PCLK_LAN(14)
LFRAME#/FWH4(14,28)
R453
R460
10K_4
*10K_4 R458
2
D3A:BOM change. R247: Stuff, R259: Un-stuff. Disable USB PHY POWERDOWN.
+3V_S5 +3V +3V +3V +3V +3V
R224
R257
R246
10K_4
R219 *10K_4
*10K_4
R459 10K_4
*10K_4
R258 10K_4
R247 10K_4
R259 *10K_4
R438 10K_4
*10K_4
1
R395 *10K_4
R400 10K_4
PCLK_591PCLK_MINI
AC_SDOUT
C C
REQUIRED
PULL HIGH
STRAPS
PULL LOW
B B
PDDACK#(16,21)
AD28(14,18,24)
AD27(14,18,24)
AD26(14,18,24)
AD25(14,18,24)
AD24(14,18,24)
AD23(14,18,24)
USE DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
RTC_CLK
INTERNAL RTC
DEFAULT
EXTERNAL RTC
+3V +3V +3V +3V +3V +3V +3V
R174 10K_4
R178 *10K_4
PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1
USE INT. PLL48
CPU IF=K8
ROM TYPE:
H, H = PCI ROM
H, L = LPC TYPE I ROM
L, H = LPC TYPE II ROM
R462 *10K_4
R447 *10K_4
USE EXT. 48MHZ
DEFAULT
R464 *10K_4
R449 10K_4
CPU IF=P4
DEFAULT
R461 *10K_4
R446 10K_4
L, L = FWH ROM
NOTE:FOR SB460,PCICLK[8:7] ARE CONNECTED TO SUBSTRATE BALLS PCICLK[1:0]
R463
R478
*10K_4
*10K_4
R477
R448
10K_4
10K_4
R465 *10K_4
R450 *10K_4
DEFAULT
PULL HIGH
PULL LOW
ACPWRON
MANUAL PWR ON
DEFAULT
AUTO PWR ON
SB_SPDIF_OUT PCLK_PCM PCLK_SIO PCLK_LANAUTO_ON# LFRAME#
SPDIF_OUT
SIO 24MHz
SIO 48MHz
DEFAULT
PCI_CLK2
NOT SUPPORTED
48MHZ OSC MODE
DEFAULT
PCI_CLK3
USB PHY POWERDOWN DISABLE
DEFAULT
USB PHY POWERDOWN ENABLE
PCI_CLK5
PCIE_CM_SETXTAL MODE LOW
DEFAULT
PCIE_CM_SET HIGH
BIOS ENABLE AFTER STARTUP
LFRAME#
ENABLE THERMTRIP#
DEFAULT
DISABLE THERMTRIP#
DEBUG STRAPS
PULL
A A
HIGH
PULL LOW
PDACK#
USE LONG RESET
DEFAULT
USE SHORT RESET
PCI_AD28
Reserved
PCI_AD27 PCI_AD26
BYPASS PCI PLL
USE PCI PLL
DEFAULT
BYPASS ACPI BCLK
USE ACPI BCLK
DEFAULT
PCI_AD25 PCI_AD24
BYPASS IDE PLL
USE IDE PLL
DEFAULT
USE EEPROM PCIE STRAPS
USE DEFAULT PCIE STRAPS
DEFAULT
SB-4
5
4
3
PCI_AD23
Reserved
Size Document Number Rev Custom
2
Date: Sheet of
PROJECT : ED5
Quanta Computer Inc.
SB460M STRAPS
17 34Monday, April 10, 2006
1
1A
Page 18
1
2
3
4
5
6
7
8
ID Select : AD20
Interrupt Pin : INTG# , INTF#
Request Indicate : REQ2#
Grant Indicate : GNT2#
A A
INTG#(14,24)
PCLK_MINI(14,17)
REQ2#(14)
AD31( 14,24) AD29( 14,24)
AD27( 14,17,24)
B B
C C
D D
AD25( 14,17,24)
CBE3#(14,24)
AD23( 14,17,24)
AD21( 14,24) AD19( 14,24)
AD17( 14,24) CBE2#(14,24) IRDY#( 14,24)
CLKRUN#(14,24,28)
SERR#(14,24)
PERR#(14,24)
CBE1#(14,24) AD14(14,24)
AD12( 14,24)
AD10( 14,24)
AD8(14,24)
AD7(14,24)
AD5(14,24)
AD3(14,24)
AD1(14,24)
PCLK_MINI
DEBUG PURPOSE ONLY
*MINIPCI
CN3
+5V
+5V
+3V
1
TIP
3
LAN1
5
LAN3
7 8
LAN5 LAN6
9 10
LAN7 LAN8
11 12
LED_GP LED_YP
13 14
LED_GN LED_YN
15
NC1
17 18
-INTB +5V
19 20
+3V -INTA
21 22
R(IRQ3) R(IRQ4)
23 24
GND +3VAUX
25 26
PCICLK -RST
27 28
GND +3 V
29 30
-REQ -GNT
31 32
+3V GND
33 34
AD31 -PME
35 36
AD29 (V)
37 38
GND AD30
39 40
AD27 +3V
43
(V)
45 46
-CBE3 AD24
47 48
AD23 IDSEL
49 50
GND GND
51 52
AD21 AD22
53 54
AD19 AD20
55 56
GND PAR
57 58
AD17 AD18
59 60
-CBE2 AD16
61 62
-IRDY GND
63 64
+3V -FRAME
65 66
-CLKRUN -TR DY
67 68
-SERR -STOP
69 70
GND +3 V
71 72
-PERR -DEVSEL
73 74
-CBE1 GND
75 76
AD14 AD15
77 78
GND AD13
79 80
AD12 AD11
81 82
AD10 GND
83 84
GND AD 9
85 86
AD8 - CBE0
87 88
AD7 +3V
89 90
+3V AD6
91 92
AD5 AD4
93 94
(V) AD2
95 96
AD3 AD0
97 98
+5V (V)
99 100
AD1 SERIRQ
101 102
GND GND
103 104
SYNC M66EN
105 106
SDIN0 SDOUT
107 108
BITCLK SDIN1
109 110
-AC_PRIMARY -RESET
111 112
BEEP -MPCICACK
113 114
AGND AGND
115 116
+MIC +SPK
117 118
-MIC -SPK
119 120
AGND AGND
121 122
-RI NC4
123 124
+5VA +3VAUX
GND
125
126
2
RING
4
LAN2
6
LAN4
16
NC2
4241
AD28AD25
44
AD26
GND
+3V
+5V
+3VSUS
R93 150/F_ 4
AD20
+3VSUS
PCIRST#
AD20
C142 .1U_4
INTF# (14)
PCIRST# (14,23,24,28)
GNT2# ( 14)
AD30 (14,24)
AD28 (14,17,24) AD26 (14,17,24) AD24 (14,17,24)
AD22 (14,24) AD20 (14,24) PAR (14,24) AD18 (14,24) AD16 (14,24)
FRAME# (14,24) TRDY# (14,24) STOP# (14,24)
DEVSEL# (14,24)
AD15 (14,24) AD13 (14,24) AD11 (14,24)
AD9 (14,24) CBE0# (14,24)
AD6 (14,24) AD4 (14,24) AD2 (14,24) AD0 (14,24)
SERIRQ (14,24,28)
+3V
C140 .1U_4
C129 .1U_4
C122 .1U_4
PROJECT : ED5
Quanta Computer Inc.
MPC
1
Size Document Num ber Rev
MINI PCI CONNECTOR (DEBUG ONLY)
2
3
4
5
6
Date: Sheet of
7
18 34Monday, April 10, 2006
8
1A
Page 19
5
4
3
2
1
TV MINI CARD
+3V_TV
+3VSUS
+1.5V
PRODUCT NAME: MINI DVBT MFR NAME: A300
D D
MINI_PCIE_TXP2(10) MINI_PCIE_TXN2(10)
MINI_PCIE_RXP2(10) MINI_PCIE_RXN2(10)
+3VSUS
PCIE_WAKE#(15,24)
PME#(15,23,24)
C C
R488 *0_4
R489 0_4
2
Q33 DTC144EUA
CLK_PCIE_MINI_B(13) CLK_PCIE_MINI_B#(13)
MINI_CLKREQ3#(13)
13
R287 0_4
ECN 2A REMOVE CAP.
TV_REQ_CLK
CN29 MINIPCI EXP_50P_H9
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
Reserved
41
Reserved
39
Reserved
37
Reserved
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
Reserved
17
Reserved
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
GND
53
+3.3V
GND
+1.5V LED_WPAN# LED_WLAN#
LED_WWAN #
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND
Reserved Reserved Reserved Reserved Reserved
+1.5V
GND
+3.3V
GND
54
52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18
16 14 12 10 8 6 4 2
GP5_IR
T81
TV_SENSE# (28)
ECN 2A FOR THREMAL ISSUE SWAP TV AND WLA N LOCATION
R470 0_4 R469 0_4
R475 0_4 R474 0_4
USBP5+ (15) USBP5- (15)
PDAT_SMB (13,15,24) PCLK_SMB (13,15,24)
ALINK_RST# (11,14,21,23,24)
+3V +3VSUS
C537
C536 10U/10V/X5R_8
.1U_4
C535 .1U_4
C545 .1U_4
+1.5V
C538 .1U_4
C543 .1U_4
C542 .1U_4
WLAN MINI CARD
+3VSUS
+3V
CN28 MINIPCI EXP_50P_H9
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
Reserved
41
Reserved
39
Reserved
37
B B
+3VSUS
PCIE_WAKE#
R289 *0_4
PME#
R288 *0_4
Q19 *DTC144EUA
MINI_PCIE_TXP3(10) MINI_PCIE_TXN3(10)
MINI_PCIE_RXP3(10) MINI_PCIE_RXN3(10)
2
13
CLK_PCIE_MINI_A(13) CLK_PCIE_MINI_A#(13)
ECN 2A REMOVE CAP.
35 33 31 29 27 25 23 21 19 17
15 13 11
9 7 5 3 1
Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved
GND REFCLK+ REFCLK­GND CLKREQ# Reserved Reserved WAKE#
GND
53
+3.3V
GND
+1.5V LED_WPAN# LED_WLAN#
LED_WWAN #
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND +3.3Vaux PERST# Reserved
GND
Reserved Reserved Reserved Reserved Reserved
+1.5V
GND
+3.3V
GND
54
+1.5V
52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18
16 14 12 10 8 6 4 2
WLAN_LED WIRELES S_LED
R476 0_4
NO SUPPORT USB
ALINK_RST#
R473 0_4
R468 0_4 R467 0_4
RF_EN
PDAT_SMB PCLK_SMB
WIRELESS_LED (29)
RF_EN (28)
+1.5V
+3VSUS+3V
C540
C544
C546 .1U_4
A A
TV_POWERON#(28)
+3V
+3V_TV_S
1
3
AO3403 Q30
2
L64 BK2125HS330_8
MINI CARD
5
4
3
+3V_TV
C547 10U/10V/X5R_8
C539 .1U_4
Size Document Number Rev
Quanta Computer Inc.
MINI CARD (WLAN AND TV)
2
Date: Sheet of
.1U_4
PROJECT : ED5
1
.1U_4
C541 .1U_4
19 34Monday, April 10, 2006
2A
Page 20
5
4
3
2
1
L51
1.8UH
R320
4.7K/F_4
C437
82P_4
MONITOR_PLUG#(28)
CRT PORT
1617
CN19 CRT_DFDS15FR459
6
7 2 8 3 9 4
10
5
R5
4.7K/F_4
R4 33_6
R319 33_6
TV_Y/G_SYSTV-LUMA
C433
82P_4
TV_COMP_SYS
R326
150/F_4
Change FootPrint 0104
111
CRTDDAT
12
CRTHSYNC
13
CRTVSYNC
14
CRTDCLK
15
C426
C8
10P_4
10P_4
R324
150/F_4
D2 MTW 355
21
C7
C11
10P_4
10P_4
TV_Y/G_SYS (11)
TV_COMP_SYS (11)
3
CN4
32 33 34
LCD_CON30
LCD CONNECTOR
+3V
LCD_POW ER_ON( 11)
EC_FPBACK#(28)
LID SWITCH CONN.
SW5
3 4
MPU-101-6
change to Lid switch
1 2
3031 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
C478 .1U_4
R79 10K_4
BLON(11)
LID#
DSC_5V
INVCC
TXLCLKOUT+ TXLCLKOUT-
TXLOUT2+ TXLOUT2-
TXLOUT1+ TXLOUT1-
TXLOUT0+ TXLOUT0-
DISPON VADJ PHL_CLK PHL_DATA
+3V
LCD3V
LCD3V
U18
6
IN
4
IN
3
ON/OFF
AAT4280_3
OUT
GND
GND
LCD POWER SUPPLY
D8 MTW355
21
D9 MTW355
D7 MTW355
R83 1K/ F_4
C120 .1U_4
2
21
21
+3VPCU
R77 10K_4
C86 10U/10V/X5R_8
R3340_8
TXLCLKOUT+ (11)
TXLCLKOUT- (11)
TXLOUT2+ (11)
TXLOUT2- (11)
TXLOUT1+ (11)
TXLOUT1- (11)
TXLOUT0+ (11)
TXLOUT0- (11)
PHL_CLK (11)
PHL_DATA (11)
+3V
R71 2.2K_4
R69 2.2K_4
W:80 mil
LCDVCC
1
2
5
+3V
R88 10K_4
DISPON
L15 BK2125HS330_8
C94 1U/10V_4
BUSBP6­BUSBP6+
VIN
C480
.1U_4
+5V
R600_4
L23
2
L24 BK1608LL121_6
C106 .1U_4
+3V
PHL_DATA
PHL_CLK
R344 0_8
C483 .1U_4
LID591# (28)
Size Document Number Rev
Date: Sheet of
C115 1U/10V_4
C482 .01U_4
VGA Ports, LID, S-VIDEO, DSC
1
1432
43
*DLW21 HN900SQ2L
R610_4
CONTRAST (28)
INVCC
C476 10U/25V_12
LCD3V
W:80 mil
C481 10U/10V/X5R_8
USBP6- (15) USBP6+ (15)
C474 1000p/50V_4
.1U_4
C99
PROJECT : ED5
Quanta Computer Inc.
1
20 34Monday, April 10, 2006
1A
CRT LVDS & DSC
D22 SSM14
2 1
+5V
R321 150/F_4
16
14
15
13
10
11
9
12
L4 0_6
L3 0_6
L2 0_6
C427 10P_4
D3AD3A
VSYNC1
HSYNC1
VSYNC
HSYNC
DDCCLK
DDCDAT
CRTDCLK_R
CRTDDAT_R
D D
VGA_RED(11)
VGA_GRN(11)
VGA_BLU(11)
C C
VGA_GRN
VGA_BLU
C13 .22U/25V
R323
C429
150/F_4
10P_4
U2
1
7
8
2
3
4
5
6
CM2009
+5V_CRT2
+3V
CRT_R1
CRT_G1
CRT_B1
R322 150/F_4
VCC_SYNC
VCC_DDC
BYP
VCC_VIDEO
VIDEO_1
VIDEO_2
VIDEO_3
GND
C428 10P_4
SYNC_OUT2
SYNC_OUT1
SYNC_IN2
SYNC_IN1
DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2
C435 .1U_4
C9
10P_4
R549 12_4
R550 12_4
VSYNC ( 11)
HSYNC (11)
R6
4.7K/F_4
+5V_CRT2
CRT_R1VGA_RED
CRT_G1
CRT_B1
C10
10P_4
R8
4.7K/F_4
25 MIL
C12
10P_4
L49 BLM18BA220S N1_6
L50 BLM18BA220S N1_6
+5V_CRT2
Change Value to 4.7K
DDCCLK (11)
DDCDAT (11)
+3V
TV
5
CN18
3
7
DFMD07FR206
7
TV-COMP
3
1
2
D20 DA204U
46
5
46
89
89
13
2
2
C431
82P_4
C432
82P_4
L53
1.8UH
R325
150/F_4
L52
1.8UH
C434
82P_4
3
1
2
TV_C/R_SYS(11)
B B
+3V
C436
.1U_4
A A
3
1
2
D19 DA204U
TV_Y/G_SYS
+3V +3V+3V
D21 DA204U
TV-CHROMATV_C/R_SYS
C430
82P_4
TV_COMP_SYSTV_C/R_SYS
CRT, LVDS, TV, DSC
5
4
Page 21
1
2
3
4
PATA HDD
H2 h-c209d146p2
1
1
HDD_CON@PATA
43
44
41
42
39
40
37
38
35
36
33
34
31
32
29
30
27
28
25
26
23
24
21
22
19
20
17
18
15
16
13
14
11
12
9
10
7
8
5
6
3
4
1
2
CN23
+3V
H15 h-c177d83p2
1
MINI CARD
H3 h-c209d98p2
1
P2 *EMI_PAD
1
P3 *EMI_PAD
1
2
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13
PDD15
PSEL
R375 470_4
-PDIAG
R374 *10K_4
HDD_VCC
C196 .1U_4
R157 0_8
CLOSE IDE SIDE
R373 *10K_4
PDD7
PDDREQ
R372 *10K_4
R376 *5.6K_4
H13 h-c177d83p2
1
H4 H-S315D98P2
1
hole for new card
P5
P4
*EMI_PAD
*EMI_PAD
1
1
PDA2 (16) PDCS3# (16)
+
C195 *100U/6.3V_3528
IRQ14
H6 h-c209d146p2
1
P6 *EMI_PAD
1
PDD[0..15](16)
A A
B B
H12 h-c177d83p2
C C
HS11 H-S315D110P2
1
HS10 H-C197D110P2
1
H9
D D
H-C197D43P2
H5 h-c209d146p2
1
1
1
HS8 H-S315D110P2LU39-V8
H7 H-C197D43P2
Hole for Bluetooth Hole for MDC
HS9 h-c315d110p2
1
HS7 H-S315D110P2
1
RST_HDD#(15)
ALINK_RST#(11,14,19,23,24)
H18 H-C177D83P2
1
1
1
1
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7
IDELED#(29)
RST_HDD#
ALINK_RST#
ALINK_RST#
H14 h-c177d83p2
1
HS13 H-S315D110P2
1
HS5 H-S315D110P2
1
H17 H-C287D110P2-V8
1
Q29
DTC144EUA
1 3
H11 h-c209d146p2
1
HS14 H-S315D110P2
1
HS4 H-S315D110P2
1
H16 H-TC236BC315D110P2-V8
1
PDDREQ(16)
PHDRDY(16)
PDDACK#(16,17)
C491 *100P_4
+3V
2
NB
HS15 H-S315D110P2
HS3 H-S315D110P2
PDIOW#(16)
PDIOR#(16)
IRQ14(16)
PDA1(16) PDA0(16)
PDCS1#(16)
HDD_VCC
R388 *2 2_4
R384 *2 2_4
+5V
H10 h-c209d146p2
1
1
1
-RST_HDD0 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD14 PDD0
PHDRDY
IRQ14
IDELED#
C211
C212
.1U_4
1000p/50V_4
-RST_HDD0
R386
*10K_4
H8 h-c209d146p2
1
HS12 H-S315D110P2
HS2 H-S315D110P2
HS6 H-S315D110P2
1
1
ECN 2A PER ME REQUEST, ADD FOUR PADS.
DISK AND HOLE
PATA ODD
+5V
+5V
+5V
When SATA,Un-stuff R293 and stuff R294
Reserve Slave for PATA Reserve Master for SATA
SATA HDD
CN24 *SATA_HDD@SATA
GND1
GND2
GND3
R293
RXP RXN
TXN TXP
3.3V
3.3V
3.3V GND GND GND
GND
RSVD
GND
12V 12V 12V
ODD_VCC
10K_4@PATA
1 2 3 4 5 6 7
8 9 10 11 12 13 14
5V
15
5V
16
5V
17 18 19 20 21 22
3
CN30
1
2
3
-RST_HDD0 PDD7
PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
PDIOW# PHDRDY IRQ14 PDA1 PDA0 PDCS1# IDELED#
R294
*470_4@SATA
SATA_RXN0_C SATA_RXP0_C
+3.3VSATA
HDD_VCC
RCSEL_R
C209 .01U_4 C210 .01U_4
R158 *0 _8@SATA
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
51
52
SPURCE AND CAP. COME FROM PATA HDD
For First build ,If next build no use remove from BOM.
+3.3VSATA
C192
4.7U/10V/X5R_8
Size Document Number Rev
Date: Sheet of
PDD8 PDD9 PDD10PDD6 PDD11 PDD12 PDD13 PDD14 PDD15 PDDREQ PDIOR#
PDDACK#
-PDIAG PDA2 PDCS3#
C397
1000p/50V_4
DFHD50MR0V9
SATA_TXP0 (16) SATA_TXN0 (16)
SATA_RXN0 (16) SATA_RXP0 (16)
+3V
C193
4.7U/10V/X5R_8
ODD_VCC
C396
C398
.1U_4
.1U_4
C395
.1U_4
43
C194 .1U_4
PROJECT : ED5
Quanta Computer Inc.
HDD & CDROM , HOLES
4
R291 0_8
C399
+
*100U/6.3V_3528
2
1
GND2RST
20
X
GND
44
21 34Monday, April 10, 2006
+5V
44143
2A
Page 22
1
2
3
4
5
6
7
8
USB POWER SUPPLY
C2B
Chage USB Power to S3 plane
+5VSUS
80 MILS
A A
C215 .1U_4
+5VSUS
USBON#(28)
R19 0_4
80 MILS
C23 .1U_4
B B
+5VSUS
R162 *0_4
+5VSUS
U3 G548A2P 8U
2
IN1
OUT3
3 7
IN2 OUT2
OUT1
4
EN#
1
GND
9
OC#
GND-C
U11 G548A2P 8U
2
IN1
OUT3
3 7
IN2 OUT2
OUT1
4
EN#
1
GND
9
OC#
GND-C
8
6
USB_OC_ MB
5
8
6
USB_OC_ DB
5
USBPW R_MB
R7 0_4
USBPW R_DB
R163 0_4
80 MILS
C19 10U/10V/X 5R_8
80 MILS
C226 10U/10V/X 5R_8
FOR M/B
C14 .1U_4
USB_OCP 3# (15)
FOR USB/B
C222 .1U_4
USB_OCP 4# (15)
BLUETOOTH
BT_POW ERON#(28)
USBP7+(15)
USBP7-(15)
BT_LED(29)
R155 0_4
L29
4
4
3
1 2
1 2
*DLW2 1HN900SQ2L
R152 0_4
+3V
2
Q16 AO3403
1
3
BUSBP7+ BUSBP7-
3
BT_PW R_R
L31 BK2125H S330_8
C188 10U/1 0V/X5R_8
BT_POW ER
BT_LED
C182 .01U_4
CN7
8 7 6 5 4 3 2 1
DFHS08F R774
USB I/O CONNECTORS
USBPW R_MB
C C
USBP0-(15) USBP0+(15)
USBP1-(15)
USBP1+(15)
D D
R17 0_4
4 3 1
R18 0_4
R15 0_4
4 3 1
R16 0_4
L6 BLM18 PG330SN1D
L8
4 3
2
1
2
*DLW2 1HN900SQ2L
L7
4 3
2
1
2
*DLW2 1HN900SQ2L
USBP_PW R_MB
C20 100U/6.3V _3528
BUSBP0­BUSBP0+
C17 *.1U_4
BUSBP1­BUSBP1+
C15 *.1U_4
+
C18
*.1U_4
USBP_PW R_MB
C16 *.1U_4
CN21
020122MR008SX90ZX
5 6 7 8
1 2 3 4
10 9
11 12
D3A: change P/N
USB, BT, USB/B COONECTOR
1
2
3
4
USB BAORD WIRE CONNECTOR
USBP2-(15)
USBP2+(15)
USBP3-(15)
USBP3+(15)
USBPW R_DB
Size Do cument Number Rev
5
6
Date: Sheet of
CN8
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
88266-10001
PROJECT : ED5
Quanta Computer Inc.
MINI PCI & USB PORT & BT
7
22 34Mond ay, April 10, 2006
8
1A
Page 23
5
RTL8111B-GR
Y2 25MHZ_LAN
21
C21
D D
22P_4
C22 22P_4
THERE IS ONE EGND PLANE UNDER IC
C C
R52 *0_4
PME#(15,19,24)
LAN_PME#(28)
ALINK_RST#(11,14,19,21,24) PCIRST#(14,18,24,28)
LAN_PCIE_TXP0(10) LAN_PCIE_TXN0(10) CLK_PCIE_LAN(13)
CLK_PCIE_LAN#(13) LAN_PCIE_RXP0(10) LAN_PCIE_RXN0(10)
R51 0_4 R50 0_4
+3V_S5
.1U_4C58 .1U_4C57
C25
C24 .1U_4
1U/10V_4
CTRL18 AVDD33 MDI0+ MDI0­AVDD18 MDI1+ MDI1­AVDD18 MDI2+ MDI2­AVDD18 MDI3+ MDI3­AVDD18 DVDD15 VDD33
R53 *10K_4
LAN_PME# LAN_PME_WAKE#
R44 0_4
LAN_PERST#
LAN_RXP0 LAN_RXN0
4
LAN_XTAL1 LAN_XTAL2
CTRL15
R20
2.49K_4
U6
646362616059585756555453525150
RSET
1
VCTRL18
2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
VCTRL15 AVDD33 MDIP0 MDIN0 AVDD18 MDIP1 MDIN1 AVDD18 MDIP2 MDIN2 AVDD18 MDIP3 MDIN3 AVDD18 VDD15 VDD33
NC
NC
181920212223242526272829303132
17
AVDD33
LED0_ACT#
GVDD
DVDD15
LED0
GVDD
VDD15
CKTAL2
CKTAL1
AVDD33
RTL8111B-GR
LANWAKEB
PERSTB
VDD15
EVDD18
HSIP
HSIN
EVDD18
DVDD15
3
D5 MTW355
D3 MTW355
D4 MTW355
VDD33
LED1_LINK#
LED2_ACT#
DVDD15
DVDD15
49
NC
NC
LED1
LED2
LED3
VDD33
VDD15
VDD15
48
EESK
47
EEDI
46
VDD33
45
EEDO
44
EECS
43
VDD15
42
NC
41
VDD1
40
NC
39
NC
38
VDD15
37
VDD33
36
ISOLATEB
35
NC
34
NC
33
VDD15
EGND
REFCLK_P
REFCLK_N
EVDD18
HSOP
HSON
EGND
VDD15
EESK EEDI VDD33 EEDO EECS DVDD15
DVDD15
DVDD15 VDD33 ISOLATEB
DVDD15
21
21
21
LED_ACT#
LED_LINK#
+3V off during S3 and S5
+3V
R39 1K/F_4
R32 15K_4
TRANSFORMER
C3 .1U_4
AVDD18
L5 *BK1608HS220
V_DAC_LAN
C2 .01U_4
2
RJ45 CONNECTOR
LED_ACT#
R2 100/F_4
VDD33
MDI0+
MDI0-
MDI1+
MDI1-
MDI2+
MDI2-
MDI3+
MDI3-
LED_LINK#
C5 .01U_4
C6 .01U_4
VDD33
C4 .01U_4
R3 100/F_4
13 14
11 12 10
4 6 5
3 1 2
8 7 9
15 17
16
18 19
1
CN20
RJ45 Connector
LED_Y_C LED_Y_A
TRD1+ TRCT1 TRD1-
TRD2+ TRCT2 TRD2-
TRD3+ TRCT3 TRD3-
TRD4+ TRCT4 TRD4-
LED_O_C LED_G_C
LED_O/G_A
SHIELD1 SHIELD2
DFHS17FR102
LAYOUT SUGGESTION
SYSTEM GND
EVDD18
EGND
EGND
DVDD15
E-PAD
EGND
BEADBEAD
POWER SUPPLY
B B
A A
LAN
+3V_S5
C33 22U/10V_8
CTRL18
TRACE <1" WIDTH > 25M ILS
CTRL15
TRACE <1" WIDTH > 25M ILS
5
POWER SUPPLY 1.2W
L10 BK1608HS220
VDD33
Q7 2SB1188
1
B
C E
2 3
C37 22U/10V_8
VDD33
Q4 2SB1182
1
B
C E
2 3
C64 22U/10V_8
C56 22U/10V_8
20MILS
20MILS
C47
.1U_4
R42 0_6
ISOLATE EGND AND GND
L16 BK1608HS220 L14 BK1608HS220
C463 .1U_4
C459 .1U_4
L9 BK 1608HS220
C452 .1U_4
C441 .1U_4
C442 .1U_4
4
30MILS
C465 .1U_4
C455 .1U_4
C69
4.7U/6.3V_6
C28 .1U_4
C454 .1U_4
C456 .1U_4
C457 .1U_4
C61 .1U_4
C30 .1U_4
C462 .1U_4
C453 .1U_4
C461 .1U_4
EVDD18
C59 .1U_4
EGND
VDD33
CLOSE RTL8111B VDD33 pins (16, 37, 46 and 53)
AVDD33
CLOSE RTL8111B AVDDH pins (2 and 59)
AVDD18
CLOSE RTL8111B AVDDL pins (5, 8, 11 and 14)
CLOSED for RTL8111B VDD18 pins (22 and 28)
C464
C468
.1U_4
.1U_4
3
EEPROM
RJ11
DVDD15
CLOSE RTL8111B VDD15 pins (15, 21, 32, 33, 38, 41, 43, 49, 52 and 58)
EECS EESK EEDI EEDO
1 2
CN16
ACS_88266-0200
2
8 7 6 5
C611 1000P/3KV_1808
VDD33
C451 .1U_4
34
1
2
G1G2
1
2
R329
U4
1
CS
2
SK
3
DI
4
DO
AT93C46
TIP RING
C610 1000P/3KV_1808
VCC
ORG
GND
3.6K_4
NC
PROJECT : ED5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
LAN RTL8111B-GR PCI-E & RJ11
1
CN33 RJ11-CON
23 34Monday, April 10, 2006
1A
Page 24
5
PCI8402 PCI I/F
ID Select : AD17
Interrupt Pin : INTE# , INTG#, INTH#
Request Indicate : REQ3#
Grant Indicate : GNT3#
D D
C C
B B
R405 150/F_4
AD[0..31](14,17,18)
CBE0#(14,18) CBE1#(14,18) CBE2#(14,18) CBE3#(14,18)
PAR(14,18)
DEVSEL#(14,18)
FRAME#(14,18)
GNT3#(14)
IRDY#(14,18)
PERR#(14,18)
REQ3#(14)
SERR#(14,18)
STOP#(14,18)
TRDY#(14,18)
PCM_IDSELAD17
AD[0..31]
AD0
R11
AD1
P11
AD2
U11
AD3
V11
AD4
W11
AD5
R10
AD6
U10
AD7
V10
AD8
R9
AD9
U9
AD10
V9
AD11
W9
AD12
V8
AD13
U8
AD14
R8
AD15
W7
AD16
W4
AD17
T2
AD18
T1
AD19
R3
AD20
P5
AD21
R2
AD22
R1
AD23
P3
AD24
N3
AD25
N2
AD26
N1
AD27
M5
AD28
M6
AD29
M3
AD30
M2
AD31
M1
W10
V7 U5 P2
PAR
U7
DEVSEL#
U6
FRAME#
R6
GNT3# PCM_IDSEL
N5
IRDY#
V5
PERR#
R7
REQ3# SERR#
W6
STOP#
V6
TRDY#
W5
PCLK_PCM PCLK_PCM _R
R397 *22_4
R399 *22_4
L2
L3
U24A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0 C/BE1 C/BE2 C/BE3
PAR DEVSEL FRAME GNT IDSEL IRDY PERR REQ SERR STOP TRDY
PCIXX12_0
CLK48
GRST
SUSPEND
MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6
PCLK
PRST
SPKROUT
RI_OUT/PME
SDA SCL
LATCH
DATA
CLOCK
USB_EN
PHY_TEST_MA
RSVD // VD0 // VCCD1#
TEST0
CLK48_PCM_RCLK48_PCM
NC
4
ECN 2A BOM CHANGE REMOVE Y7 AND C509 STUFF R407
R407 0_4
CLK48M
F1
GRST#_8412
K5
8402_SUS#
J5
INTE#
G1 H5
INTH#
H2
SERIRQ
H1
3VSP
J1
FM_LED
J2
CLKRUN#
J3
PCLK_PCM
L1
PCIRST#
K3
PCMSPK
H3
PCM_PME#
L5
SDA_CARD
G3
SCL_CARD
G2
C9 B9 A9
USB_EN#
E10
TEST_MA
P17
P12
PSMODE
C4 E5
*10p_4C499
*10p_4C501
Y7
3 4
OUT VDD
OEGND
*48MHz
R415 10K_4
R416 0_4
R406 4.7K/F_4
R189 *0_4
R188 0_4
R427 *10K_4
R216 4.7K/F_4
R417 10K_4
+3V
12
CLK48_PCM (13)
C509
*.1U_4
+3V
INTE# (14) INTG# (14,18) INTH# (14) SERIRQ (14,18,28) +3V FM_LED (25) CLKRUN# (14,18,28)
PCLK_PCM (14,17)
PCIRST# (14,18,23,28)
PCMSPK (26)
RI# (15)
Q17 DTC144EUA
1 3
+3V
1394_AVDD
+3V
3
NEW CARD
U24B
CAD31 // D10
CAD19 // A25
CAD17 // A24 CAD16 // A17
CAD15 // IOWR#
CAD13 // IORD#
CAD12 // A11
CAD11 // OE#
CAD10 // CE2#
CC/BE3# // REG#
PCMCIA PORT
CC/BE2# // A12
CC/BE1# // A8
CC/BE0# // CE1#
+3V
2
PME# (15,19,23)
CSTSCHG // BVD1(STSCHG#/RI#)
PCIXX12_0
CDEVSEL# // A21
CFRAME# // A23
CGNT# // WE#
CINT# // READY(IREQ#)
CIRDY# // A15
CPERR# // A14
CREQ# // INPACK#
CSERR# // WAIT#
CSTOP# // A20 CTRDY# // A22
CCLKRUN# // WP(IOIS16#)
CBLOCK# // A19
CRST# // RESET
CAUDIO // BVD2(SPKR#)
CCD1# // CD1# CCD2# // CD2#
CVS1 // VS1# CVS2 // VS2#
VCCB VCCB
CAD30 // D9 CAD29 // D1 CAD28 // D8 CAD27 // D0 CAD26 // A0 CAD25 // A1 CAD24 // A2 CAD23 // A3 CAD22 // A4 CAD21 // A5 CAD20 // A6
CAD18 // A7
CAD14 // A9
CAD9 // A10 CAD8 // D15
CAD7 // D7
CAD6 // D13
CAD5 // D6
CAD4 // D12
CAD3 // D5
CAD2 // D11
CAD1 // D4 CAD0 // D3
CPAR // A13
CCLK // A16
RSVD // A18
RSVD // D2
RSVD // D14
A15 J19
C10 A10 F11 E11 C11 B13 C13 A14 B14 B15 E14 A16 D19 E17 F15 H19 J17 J15 J18 K15 K17 K18 L15 L18 L19 M17 M18 N19 M15 N17 N18 P19
E13 E18 H18 L17
H14 F19 E19 G17 E12 F17 G19 C14 C12 G18 G15
NEW CARD'S POWER SWITCH
F18 A11 A12 H15 C15 B12
N15 B11 A13 B16
H17 B10 M19
PCIE_WAKE#(15,19)
2
NEW CARD HEADER: DFHD26MR074 (13081-1) NEW CARD EJECT ER: FBZF1026019 (130851-3)
PCIE_TXP1(10) PCIE_TXN1(10)
PCIE_RXP1(10) PCIE_RXN1(10)
CLK_PCIE_NEW(13)
CLK_PCIE_NEW#(13)
NEW_CLKREQ#(13)
PDAT_SMB(13,15,19) PCLK_SMB(13,15,19)
USBP4+(15)
USBP4-(15)
DTC144EUA
+3V
+3V_S5
+1.5V
ALINK_RST#(11,14,19,21,23)
.1U_4C126 .1U_4C125
CPPE#
+NEW_3V
NEW_PERST# +NEW_3VAUX NEWCARD_PCIE_W AKE# +NEW_1.5V
CPUSB#
R95 0_4 R94 0_4
+3V_S5
2
Q13
U8
TPS2231PWG4
4 5
16 15
1 2
19
10
PERP1 PERN1
BUSBP4+ BUSBP4-
NEWCARD_PCIE_W AKE#
13
3.3VIN
3.3VOUT
3.3VIN
3.3VOUT
AUXOUTAUXIN
1.5VOUT
1.5VIN
1.5VOUT
1.5VIN
SYSRST#
STBY#
SHDN#
CPPE#
CPUSB#
RCLKEN
PERST#NC
GND
OC#
6 7
1718
14 13
3 12 11
89 20
+NEW_3V
+NEW_3VAUX
+NEW_1.5V
CPPE# CPUSB#
NEW_PERST#
1
CN6
29
GND5
26
GND1
25
PETp0
24
PETn0
23
GND2
22
PERp0
21
PERn0
20
GND3
19
REFCLK+
18
REFCLK-
17
CPPE#
16
CLKREQ#
15
+3.3V1
14
+3.3V2
13
PERST#
12
+3.3VAUX
11
WAKE#
10
+1.5V1
9
+1.5V2
8
SMB_DATA
7
SMB_CLK
6
RESERVED1
5
RESERVED2
4
CPUSB#
3
USB_D+
2
USB_D-
1
GND4
30
GND6
FOXCONN_NEW_CARD
IEEE1394 EEPROM
+3V
R387
R389
2.2K_4
2.2K_4
A A
SDA_CARD SCL_CARD
5 6
7
4
U22
SDA SCL
WP
GND
24LC08
VCC
1
A0
2
A1
3
A2
8
+3V
C506
.1U_4
IEEE1394 & NEW CARD
5
+3V
R181
22K/F_4
GRST#_8412
C232
.22U/6V_4
4
VCC
GRST#
PRST#
PCLK
> 2 ms > 0 ns
C155
.1U_4
> 100 us
3
CPPE# : ( Internal Pull Up , active low when card support PCIE )
CPUSB# : ( Internal Pull Up , active low when card support USB )
SHDN# : ( Internal Pull Up )
+3V_S5+3V +1.5V
C141
.1U_4
+NEW_3VAUX +NEW_3V
C158
.1U_4
2
C152 .1U_4
C168 10U/10V/X5R_8
Size Document Number Rev
PCI8402-1 & NEW CARD
Date: Sheet of
+NEW_1.5V
C166
C160
.1U_4
.1U_4
PROJECT : ED5
Quanta Computer Inc.
1
C167 10U/10V/X5R_8
24 34Monday, April 10, 2006
C162 .1U_4
2A
Page 25
5
PCI8402 I/F OF 1394 & CARD READER
D D
M14
F12 F14
J14
L14
P10
W8
P13
P14 U15 U19
P15
K19
R17
R14 U13 U14
F10 F13 G14
K14
F6 F9
J6
L6
P6 P8
P1
K1
K2
F7
H6 K6
N6 P7 P9
U24C
VCC_00 VCC_01 VCC_02 VCC_03 VCC_04 VCC_05 VCC_06 VCC_07 VCC_08 VCC_09 VCC_10
VCCP VCCP
AVDD_33_00 AVDD_33_01 AVDD_33_02 VDDPLL_33
VDDPLL_15
1.5V_00
1.5V_01
VR_EN
VSSPLL
AGND_00 AGND_01 AGND_02
GND_00 GND_01 GND_02 GND_03 GND_04 GND_05 GND_06 GND_07 GND_08 GND_09 GND_10
PCIXX12_0
MC_PWR_CTRL_1 // SM_R/B#
MS_CLK // SD_CLK // SM_EL_WP#
MS_BS // SD_CMD // SM_WE# MS_DATA3 // SD_DAT3 // SM_D3 MS_DATA2 // SD_DAT2 // SM_D2 MS_DATA1 // SD_DAT1 // SM_D1
MS_SDIO(DATA0) // SD_DAT0 // SM_D0
SD_CLK // SM_RE# // SC_GPIO1
SD_CMD // SM_ALE // SC_GPIO2
SD_DAT3 // SM_D7 // SC_GPIO3 SD_DAT2 // SM_D6 // SC_GPIO4 SD_DAT1 // SM_D5 // SC_GPIO5 SD_DAT0 // SM_D4 // SC_GPIO6
XD_CD// SM_PHYS_WP#
SM_CLE // SC_GPIO0
+3V
+3V
C C
B B
C515
10U/10V/X5R_8
L45
BLM21P300S
C510
1U/10V_4
C344
1U/10V_4
C505
.1U_4
1394_AVDD
C336
.1U_4
C313
.01U_4
C317
.01U_4
C503
1U/10V_4
C306
1000p/50V_4
C319
1000p/50V_4
1U/10V_4C521
C520
1U/10V_4
MEMORY CARD READED POWER CONTROL (IC SOLUTION FOR C-TEST)
+3V
A A
MC_PWR_CTRL_0 #
U35 G545B2RD1U
2
IN1
OUT3
3 7
IN2 OUT2
OUT1
4
EN#
1
GND
9
GND-C
IEEE1394 & CARD REDER
5
4
MC_PWR_CTRL0
SD_CD MS_CD SM_CD
SD_WP // SM_CE#
SC_RFU SC_FCB
SC_CD
SC_CLK
SC_DATA
SC_OC
SC_PWR_CTRL
SC_RST
SC_VCC5
CPS
TPBIAS1
TPA1P
TPA1N
TPB1P
TPB1N
TPBIAS2
TPA2P
TPA2N
TPB2P
TPB2N
RSVD//PC0 RSVD//PC1 RSVD//PC2
R0
R1
XI
XO
8
6
5
OC#
R of discharge is 75ohm to 150ohm
4
MC_PWR_CTRL_0 #
C8
SM_R/B/SC_RFU
F8
SD_CDZ
E9
MS_CDZ
A8
SM_CDZ
B8 A3
R_MS_SD_CLK
A7
MS_BS/SD_CMD/SM_W EZ
E8
MS_DATA3/SD_DAT3/SM_D3
B6
MS_DATA2/SD_DAT2/SM_D2
A6
MS_DATA1/SD_DAT1/SM_D1
C7
MS_DATA0/SD_DAT0/SM_D0
B7
SM_CLE/SC_GPIO0
B4
SD_CLK/SM_RE/SCGPIO1
A4
SD_CMD/SM_ALE/SC_GPIO2
C5
SD_DAT3/SM_D7/SC_GPIO3
E6
SD_DAT2/SM_D6/SC_GPIO4
B5
SD_DAT1/SM_D5/SC_GPIO5
A5
SD_DAT0/SM_D4/SC_GPIO6
C6
SD_WP_SM_CEZ
E7
D1
SC_FCB
E3
F3 E2 E1 F2 G5 F5 G6
R12
R13
V14 W14
V13 W13
W17
V16 W16
V15 W15
U12 V12 W12
T18
T19
R19
R18
30 MIL
PLACE CLOSE TO C580 AND TRACE WIDTH IS 30MIL.
Reserve for xD identification
R410 0_4
SC_VCC
R412 *1K_4
CPS
R195 390K_4
TPBIAS0
TPA0P TPA0N
TPB0P TPB0N
PCI8412 ARE NC PIN
PCI8412 ARE NC PIN PCI8412 ARE NC PIN
PCI8412 ARE NC PIN PCI8412 ARE NC PIN
8402_R0
8402_R1
R451 6.34K/F
8402_XI
8402_XO
VCC_XD
ECN D3A DECREASE "VCC_XD" PW R FALLING TIME.
1 2
R425 10K_4
R419 33/F_4 R423 100K/F_4
R418 100K/F_4
R421 100K/F_4
T122
+3V
+5V
C533
22p_4
Y8
24.576MHz C534
22p_4
3
VCC_XD
MS_CLK/SD_CLK/M_ELW PZ_R
VCC_XD
VCC_XD
VCC_XD
3
2
5 IN 1 MEMORY CARD READER
CN13
SD_CDZ MS_DATA2/SD_DAT2/SM_D2 MS_DATA3/SD_DAT3/SM_D3 MS_BS/SD_CMD/SM_W EZ
MS_CLK/SD_CLK/M_ELW PZ_R
MS_DATA0/SD_DAT0/SM_D0 MS_DATA1/SD_DAT1/SM_D1 SD_WP_SM_CEZ
MS_CLK/SD_CLK/M_ELW PZ_R MS_DATA3/SD_DAT3/SM_D3 MS_CDZ MS_DATA2/SD_DAT2/SM_D2 MS_DATA0/SD_DAT0/SM_D0 MS_DATA1/SD_DAT1/SM_D1 MS_BS/SD_CMD/SM_W EZ
MSX039-X0-0X00
1
CD_SD
2
DAT2_SD
3
CD/DAT3_SD
4
CMD_SD
5
VSS_SD
6
VDD_SD
7
CLK_SD
8
VSS_SD
9
DAT0_SD
10
DAT1_SD
11
WP_SD
12
VSS_MS
13
VCC_MS
14
SCLK_MS
15
RESERVE_MS
16
INS_MS
17
RESERVE_MS
18
SDIO_MS
19
RESERVE_MS
20
BS_MS
21
VSS_MS
22
GND
MEMORY CARD READED POWER CONTROL
MC_PWR_CTRL_0 #
R510 *100K/F_4
MEMORY CARD READED LED INDICATE
IEEE1394 CONNECTOR
TPBIAS0
TPA0P TPA0N
TPB0P TPB0N
R222
R223
56.2/F_4
56.2/F_4
R239
R236
56.2/F_4
56.2/F_4
1394_COM
C337
R241
270p_4
5.1K/F
CLOSE TO CHIP
C331
1U/10V_4
C333
270p_4
2
R9 0_4 R10 0_4
R11 0_4 R12 0_4
R515 10K_4
FM_LED(24)
VCC_XD
D7_XD D6_XD D5_XD D4_XD D3_XD D2_XD D1_XD D0_XD
GND_XD
-WP_XD
-WE_XD ALE_XD CLE_XD
-CE_XD
-RE_XD R/-B_XD
GND_XD
GND GND
2
1
Support :
MMC
VCC_XDVCC_XD
SD Memory Stick Memory Stick Pro xD
41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 42
+3V
1
3
C580 10U/10V/X5R_8
L1394_TPA0+ L1394_TPA0-
L1394_TPB0+ L1394_TPB0-
SD_DAT3/SM_D7/SC_GPIO3 SD_DAT2/SM_D6/SC_GPIO4 SD_DAT1/SM_D5/SC_GPIO5 SD_DAT0/SM_D4/SC_GPIO6 MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1 MS_DATA0/SD_DAT0/SM_D0
MS_CLK/SD_CLK/M_ELW PZ_R MS_BS/SD_CMD/SM_W EZ SD_CMD/SM_ALE/SC_GPIO2 SM_CLE/SC_GPIO0 SD_WP_SM_CEZ SD_CLK/SM_RE/SCGPIO1 SM_R/B/SC_RFU SM_CDZ
Q37
*AO3403
20 MIL
R533 10K_4
2
Size Document Number Rev
Date: Sheet of
Q26
1 3
PCI8402-2 (1394 & 5 IN 1)
VCC_XD
VCC_XD
FM_LED_EC (28)
PDTC144EU
ECN 2A MEMORY CARD'S LED FALSH TOO FAST, EE CHANGE CIRCUIT AND EC ADD DE-BOUNC E
L1394_TPB0­L1394_TPA0­L1394_TPA0+ L1394_TPB0+
ECN 2A Per ME's request, Update its footprint.
CN2
1 3 4 2
1394_CON
1394-020115FB004SX04ZX-4P-R-H
PROJECT : ED5
Quanta Computer Inc.
1
5
6
2A
25 34Monday, April 10, 2006
Page 26
A
B
C
D
E
AUDIO CODEC ALC262
D3A In order to Vista's request, EAPD force MUTE,Remove Q34,R490
ALC262 GPIO TABLE
LO: SRS OFF (EC)
4 4
GPIO 0
GPIO 1
74LVC1G86GW
PCMSPK(24)
PCSPK(15)
3 3
SYSSPKOFF#(28)
SRS
HI: SRS ON (EC)
LO: NO PLUG-IN
H.P.
HI: PLUG-IN
C576 .1U_4
4
3 5
RESERVE BYPASS PATH
BEEP-1
+3V
53
1
2
R506*0_4
C570 .1U_4
4
U27 NC7SZ08P5X_NL
BEEP
+3V
U28
1
2
CODAC_MUTE#(27)
R494 *10K_4
SPDIF(27)
C553 .47u/X7R/10V_6
1 2
R503 1K/F_4
ECN C2B ADD CODEC_JD
AGND
MIC_SYS_INT
HP_JD(27)
MIC_JD(27)
+3V
CODEC_BIT_CK
CODEC_SD_IN
C563 .1U_4
R493 *1K_4
C554
C559
.1U_4
.1U_4
*10p_4C556
AZ_SDOUTA(15) AZ_BITCLKA(15)
AZ_SDIN1(15)
AZ_SYNCA(15) AZ_RESET#(15)
AZ_BITCLKA
AZ_SDIN1
R498 22_4
CODEC_BIT_CK
*22_4
C555 *10p_4
ECN C2B PER VISTA REQUEST, MODIFY MIC PATH
R496 10_4
R502 10K_4
MIC_SYS_INT(27)
PCBEEP-1
AGND
+5VA
AGND
SRS_EN(28) HPS
R538 0_4
R539 *0_4
PCBEEP-2
R543 39.2K/F_4
R544 20K/F_4
C571 .1U_4
C564 .1U_4
C572 .1U_4
C565 .1U_4
C403 .1U_4
60 mils
U26
ALC262
1 2 3 4 5 6 7 8
9 10 11 12
CODEC_JD
C406 10U/10V/X5R_8
DVDD1 GPIO2 GPIO3 DVSS1 SDATA_OUT BIT_CLK DVSS2 SDATA_IN DVDD2 SYNC RESET# PC-BEEP
LINE2-L
LINE2-R
MIC2-L
MIC2-R
JDREF
48
NC
NC
GPIO0
GPIO1
JDREF
AVSS2
SPDIFO
HP_OUT_R
SPDIFI/EAPD
ALC262
SENSEA
LINE2-L
LINE2-R
MIC2-L
MIC2-R
CD-L
CD_GND
CD_R
MIC1-L
1314151617181920212223
HPR_CODEC HPL_CODEC
R492 20K/F_6
3738394041424344454647
AVDD2
HP_OUT_L
MONO_OUT
LINE_OUT_R
MIC1-VREFO-R
LINE2-VREFO
MIC2-VREFO
LINE1-VREFO
MIC1-VREFO-L
MIC1-R
LINE1-L
LINE1-R
24
LINEINR_CODEC
LINEINL_CODEC
MICIN1-R
MICIN1-L
CD_RC
CD_GNDC
CD_LC
LINE-OUT-L
SENSEB
DCVOL
VREF
AVSS1
AVDD1
C6152.2U/10V/X5R
12 12
C6162.2U/10V/X5R
C596 *47P/50V/0402
+5VA
36 35 34 33 32 31 30 29 28 27 26
AGND
25
AGND
C569 .1U_4 C575 .1U_4
C568 .1U_4
C567 .1U_4
12
12
C599 *47P/50V/0402
R497 10K_4
VREF_MICL AUDIOVREF
C408
10U/10V/X5R_8
C574 .1U_4
C566 .1U_4
C573 .1U_4
MUTE#(27)
C602 1U/10V_4
+5VA
C409 .1U_4R495
AGND
MIC_SYS
C560 .1U_4
AGND
MIC_SYS (27)
13 15
14 18
1 3
5 7
C603 1U/10V_4
AGND
U31
INL INR
SHDNR SHDNL
C1P C1N
PVSS SVSS
MAX4411ETP+
C562 10U/10V/X5R_8
9
OUTL
11
OUTR
4
NC1
6
NC2
8
NC3
12
NC4
16
NC5
20
NC6
10
SVDD
19
PVDD
2
PGND
17
SGND
R542 2.2K_4
R499 2.2K_4
C561
12P
1 2
Layout note:
CD_GND
CD_L
CD_GND
CD_R
CD_GND
1 2
C601 1U/10V_4
MIC_SYS_INTVREF_MIC_INT
MIC_SYS
L68 BLM11A601S
5mil
5mil
5mil
5mil
HPL (27) HPR (27)
+3V
CODEC_HP_R (27) CODEC_HP_L (27)
ECN C2B PER VISTA REQUEST, ADD PWR FOR MIC.
5mil
10mil
5mil
10mil
5mil
2 2
AUDIO POWER AND GND
+5VA
20 mil
C404 .01U_4
AGND
1 1
.1U_4
R518 0_6
R523 0_6
R512 0_6
C407 10U/10V/X5R_8
12
C405
R297
28.7K/F
AGND
L47 *TI321611U330_1206
U13 G913C
4
OUT
5
SETINSHDN
R295 10K/F_6
Vout=Vset{1+R(4,5)/R(5,gnd)} Vset=1.25V
AGND
Vout=1.25(1+29.4K/10K)=4.925V
Vout=1.25(1+28.7K/10K)=4.8375V
Vout=1.25(1+27K/10K)=4.625V
R298 0_6
R511 0_6
R292 0_6
AGND
3
2
GND
1
SPRAY THE BRIDGE ON THE GAP OF A/DGND UNIFORMLY.
20 mil
.01U_4C579
.01U_4C412
C400 .1U_4
MAINON
AGND
12
+5V
C401 10U/10V/X5R_8
MAINON (28,31,32,33)
AUDIO CODEC & MDC
A
B
C
AZALIA MDC INTERFACE
CN14 MDC_DFHS12FS688
1 2
CD_SDOUTA_MDC(15)
CD_SYNC_MDC(15)
CD_SDIN0(15)
CD_RESET#_MDC(15)
R302 22_4
C414 *10p_4
D
3 4 5 6 7 8 9 10
11 12
MDC
GND1 Reserved1 IAC_SDATO Reserved2 GND2 3.3V IAC_SYNC GND3 IAC_SDATAIN GND4 IAC_RESET# IAC_BITC LK
Size Document Number Rev
Date: Sheet of
+3VSUS
R525 0_6
R300 0_4
C413 *10p_4
PROJECT : ED5
Quanta Computer Inc.
AUDIO CODEC AL C262 AND MDC
E
12
C605
C604
10U/10V/X5R_8
1U/10V_4
CD_BITCLKA_MDC (15)
26 34Monday, April 10, 2006
2A
Page 27
5
4
3
2
1
AUDIO AMP. (MAX9755)
E E
AVDD AVDD AVDD
C583
AGND
R508
CODEC_HP_L(26)
CODEC_HP_R(26)
D D
C600 .1U_4
AMP_MUTE#(28)
CODAC_MUTE#(26)
C C
R524 10K_4
+5V
1
2
MUTE#(26)
AVDD
*100K_4
AVDD
GAIN1
R516 *10K_4
R547 10K_4
R548
20K/F_4
1
C5822.2U/10V/X5R
AGND
R509
*100K_4
AGND
53
4
U30 NC7SZ08P5X_NL
D3A Add one 10K and 20K in front of U31/ MAX4411 and dehind U30/ NC75Z08 P.27 add R547,R548
R514 1K/F_4
GAIN1
R513 *1K_4
C5812.2U/10V/X5R
12
12
GAIN1
C594 1U/10V_4
MODE
10.5
9
AGND
C585 .1U_4
U29
2
28
1
27
24
23
22
21
HPSPKR
MODE
30
0
INL
INR
NC
NC
GAIN_SEL
GND
/SHDN
VBIAS
C588
1U/10V_4
25158107
C1P
VDD
HPVDD
GND
GND
CPGND
CPVSS
26911
29
AGND
AGND
12
HPS
C1N
HPL
CPVDD
HPR
OUTL+
OUTL­OUTR-
OUTR+
PVDDL PGNDL
PVDDR
PGNDR
VSS
MAX9755AETI
C589 1U/10V_4
AGND
20
14
13
4 5 17 18
6 3 16 19
C593 .1U_4
R517 0_4
INSPKL+ INSPKL­INSPKR­INSPKR+
AGND
C577
.1U_4
10U/10V/X5R_8
AGND
AGND
SUPPORT MULTI-STREAMIN, SO, H.P. FROM CODEC
AVDD
C578
C592
C595
.1U_4
AGND
10U/10V/X5R_8
C584 .1U_4
10U/10V/X5R_8
AUDIO JACK
ECN C2B CHANGE PWR TO +5V
+5V
HP_JD(26)
HPL(26) HPR(26)
ECN B2A REMOVE Q35
SPDIF(26)
R504 68_6 R505 68_6
SPDIF_OUT
R537
0_4
L69 BK1608LL121_6
INSPKR+ INSPKR+N
L70 BK1608LL121_6
INSPKR-
INSPKL+
L60 BK1608LL121_6
INSPKL-
L59 BK1608LL121_6
ECN C2B DUE TO HAS HP_JD, REMOVE MOS THEN DELECT Q36
L65 BK1608LL121_6
HPL_R
L66 BK1608LL121_6
HPL_L
L67 BK1608LL121_6
R500
R501
*1K_6
*1K_6
ECN C2B REMOVE HPS CIRCUITS DELECT R483, R487 AND Q32 DELECT NET OF HPS
C558 470P_50V_4
C612 47P_4
INSPKR-N
INSPKL+N INSPKL-N
C485 47P_4
AGND AGND
NORMAL OPEN (HI)
HP_JD HPL_SYS HPR_SYS
C557 470P_50V_4
AGND
C613 47P_4
C486 47P_4
AGND
QCI P/N
IT IS NOT GREEN PART
AGND
ECN C2B SWAP PIN7&8
CN15
1 2
DFHD02MS784
CN5
1 2
DFHD02MS784
AGND
ECN C2B FOLLOW DEMO CKT, SWAP PIN4 & 5
C552 .1U_4
CN31
5 4 2 3 1
HP_JD
8 7 6
Drive
IC
GP1F562T
DFTJ10FR089
D28 *DA204U
3
LED
1
2
For ESD close to audio out connecter
INT. SPEAKER
R296 0_6
R507 0_6
C402 .1U_4
C590 1000p/50V_4
HEADPHONE OUT S/PDIF
9 10
AGND
+5V
AGND
B B
MIC_SYS_CNMIC_SYS
C410 470P_50V_4
Size Document Number Rev
Date: Sheet of
R299 0_6
C411 22P_4
AGNDAGND
L48 BK1608LL121_6
ECN C2B PER VISTA REQUEST, ADD MIC_JD
ECN C2B PER VISTA REQUEST, ISOLATE INT. MIC.
MIC_SYS(26)
MIC_JD(26)
AVDD
R520 0_8
R519 0_8
C586
C587
.1U_4
10U/10V/X5R_8
A A
AGND AGND
AMP. POWER SUPPLY
+5V
R522 0_6
R521 0_6
R484 0_6
R491 0_6
MIC_SYS_INT(26)
*.01U_4C591
CN12
1 2
DFHD02MS784
DFHD02MS784
MIC_SYS_INT
INT_MIC
AUDIO AMP. & JACK
5
4
3
2
1 2 6 3 4 5
AGND
AMP. & JACK
CN32
JA6333L-3S0-TR
DFPJ06MS310
MICROPHONE IN
7
8
PROJECT : ED5
Quanta Computer Inc.
1
27 34Monday, April 10, 2006
1A
Page 28
5
+3VPCU
C417
C423
.1U_4
10U/10V/X5R_8
R313
470K_4
2 1
23
HWPG_SYS(33)
CPU_COREPG(30)
D14 MTW355
HWPG_1.8V(32)
HWPG_1.2V(31)
C607
10P_4
R312 *22_4
SERIRQ(14,18,24)
LFRAME#/FWH4(14,17)
LAD0/FWH0(14) LAD1/FWH1(14) LAD2/FWH2(14) LAD3/FWH3(14)
PCLK_591(14,17)
KBSMI#(15) SWI#(15)
SCI#(15)
GATEA20(15)
RCIN#(15)
MX0(29) MX1(29) MX2(29) MX3(29) MX4(29) MX5(29) MX6(29) MX7(29)
MY0(29) MY1(29) MY2(29) MY3(29) MY4(29) MY5(29) MY6(29) MY7(29) MY8(29)
MY9(29) MY10(29) MY11(29) MY12(29) MY13(29) MY14(29) MY15(29)
FM_LED_EC(25)
CARD_LED(29)
TBCLK(29)
TBDATA(29) CAPSLED#(29) NUMLED#(29)
R528 121K/F_6
Edison--11/11- Modify
PWRLED#(29)
SCROLED#(29)
USBON#(22)
SUSLED#(29) BATLED0#(29) BATLED1#(29)
RF_EN(19)
BT_POWERON#(22)
RSMRST#(15)
TV_POWERON#(19)
VRON(30) MAINON(26,31,32,33) SUSON(32,33) S5_ON(32,33)
D29 MTW355
D30 MTW355
D32 MTW355
D31 MTW355
5
PCLK_591
21
21
21
21
SERIRQ
LFRAME#/FWH4 LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 PCLK_591
GATEA20
RCIN#
MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15
TBCLK TBDATA CAPSLED# NUMLED#
D D
C C
B B
A A
C421 *10P_4
+3VPCU
R529 20M_6
Y9
4 1
32.768KHZ
C608
10P_4
EC & FALSH ROM
C419
C415
.1U_4 R318
.1U_4
+3V
MTW355
2 1
D15
2 1
D16 *MTW355
D17
MTW355
2 1
D12 MTW355
2 1
2 1
D13 MTW355
T88 T87 T90 T140 T139
591_32KX1
591_32KX2
+3VPCU
R532 10K_4
BT_POWERON#
VRON MAINON SUSON S5_ON
CS#
+3V
R530
10K/F_6
HWPG_591
4
C424
.1U_4
C420 .1U_4
U14
7
SERIRQ
8
LDRQ
9
LFRAME
15
LAD0
14
LAD1
13
LAD2
10
LAD3
18
LCLK
19
LREST
22
SMI
23
PWUREQ
31
IOPD3/ECSCI
5
GA20/IOPB5
6
KBRST/IOPB6
71
KBSIN0
72
KBSIN1
73
KBSIN2
74
KBSIN3
77
KBSIN4
78
KBSIN5
79
KBSIN6
80
KBSIN7
49
KBSOUT0
50
KBSOUT1
51
KBSOUT2
52
KBSOUT3
53
KBSOUT4
56
KBSOUT5
57
KBSOUT6
58
KBSOUT7
59
KBSOUT8
60
KBSOUT9
61
KBSOUT10
64
KBSOUT11
65
KBSOUT12
66
KBSOUT13
67
KBSOUT14
68
KBSOUT15
105
TINT
106
TCK
107
TDO
108
TDI
109
TMS
110
PSCLK1/IOPF0
111
PSDAT1/IOPF1
114
PSCLK2/IOPF2
115
PSDAT2/IOPF3
116
PSCLK3/IOPF4
117
PSDAT3/IOPF5
118
PSCLK4/IOPF6
119
PSDAT4/IOPF7
158
32KX1/32KCLKOUT
160
32KX2
62
IOPJ2/BST0
63
IOPJ3/BST1
69
IOPJ4/BST2
70
IOPJ5/PFS
75
IOPJ6/PLI
76 143
IOPJ7/BRKL_RSTO IOPK0/A8
148
IOPM0/D8
149
IOPM1/D9
155
IOPM2/D10
156
IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13
27
IOPM6/D14
28
IOPM7/D15
173
SEL0
174
SEL1
47
CLK
PC97551
C416 .1U_4
163445
VDD
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTM
GND1
173546
+3VPCU
VCC1
PORTJ-2
GND2
GND3
122
0_6
123
136
157
166
VCC2
VCC3
VCC4
VCC5
VCC6
AD Input
DA output
PWM
or PORTA
PORTD-1
PORTE
GND6
GND7
GND4
GND5
159
167
137
VCCRTC
C425
.1U_4
95
AVCC
PORTB
IOPB7/RING/PFAIL
PORTC
IOPC4/TB1/EXWINT22
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPD2/EXWINT24
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
PORTH
IOPH5/A5/SHBM
PORTI
PORTJ-1
PORTD-2
PORTK
IOPK5/A13/BE0 IOPK6/A14/BE1
IOPK7/A15/CBRD
PORTL
AGND
NC2
NC3
NC4
NC1
96
122021858691929798
11
C422
1U/10V_4
161
VBAT
IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DP/AD8 DN/AD9
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1 IOPB4/SDA1
IOPC0 IOPC1/SCL2 IOPC2/SDA2
IOPC3/TA1
IOPC5/TA2
IOPE4/SWIN
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
SELIO
IOPD4
IOPD5
IOPD6
IOPD7
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1
NC5
NC6
NC7
NC8
NC9
C418
.1U_4
AD0 AD1 AD2 AD3
DA0 DA1 DA2 DA3
DIRECTLY 50 mS
HWPG_591 ===> NB_PWRGD ===> EC_PWRGD
4
NORTH BRIDGE SOUTH BRIDGE
3
ENV1
BADDR0
BADDR1
BT_POWERON#
SHBM
TEMP_MBAT
81
T86
82
T89
83
T85
84
RF_SW#
87 88
SUSC#
89
HWPG_591
90 93 94
CC-SET
99
CV-SET
100
CONTRAST
101
VFAN
102
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168 169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132 133
138 139 140 141 144 145 146 147
150 151
152
41 42 54 55
142 135 134 130 129 121 120
113 112 104 103 48
NC10
TV_SENSE#_D MBDATA
TX_551
MBCLK MBDATA PCIRST#
591_PME# MBCLK_CPU MBDATA_CPU
FANSIG EC_FPBACK# LID591#
PWROK_1
ACIN
NBSWON# SUSB#
ENV0 ENV1 BADDR0 BADDR1 TRIS SHBM A6 A7
D0 D1 D2 D3 D4 D5 D6 D7
RD# WR#
CELL-SET
D/C# BL/C#
A8 A9 A10 A11 A12 A13 A14 A15
A16 A17 A18 A19
T83
R311 0_6
R314 0_4
T84
D/C# (34) BL/C# (34)
R306 10K_4
R307 *10K_4
R308 *10K_4
R310 *10K_4
R309 10K_4
SHBM=1: Enable shared memory with host BIOS
TEMP_MBAT (34)
RF_SW# (29)
SUSC# (15)
CC-SET (34) CV-SET (34) CONTRAST (20) VFAN (29)
8724CELLS (34) NB_PWRGD (5,11)
SYSSPKOFF# (26)
AMP_MUTE# (27)
BT1# (29) BT2# (29) MONITOR_PLUG# (20)
SRS_EN (26)
CPU_EC_PROCHOT# (5) MBCLK (34) MBDATA (34) PCIRST# (14,18,23,24)
MBCLK_CPU (5) MBDATA_CPU (5)
FANSIG (29) EC_FPBACK# (20) LID591# (20) EC_PWRGD (5,14,15)
VLDT_RUN_ON (31,33) ACIN (34)
NBSWON# (29) SUSB# (15)
CLKRUN# (14,18,24)
+3VPCU
D18
2 1
MTW355
D11
MTW355
MBCLK_CPU MBDATA_CPU
R303
*4.7K_4
591_PME#
21
+3VPCU
+3VPCU
2
I/O Address
Reserved
LAN_PME# (23)
U34 *PLCC32
A0 A1 A2
9
A3
8
A4
7
A5
6
A6
5
A7 A8 A9 A10 A11
4
A12 A13 A14
3
A15
2
A16 A17
CE# OE# WE#
Data
2F
4F
(HCFGBAH, HCFGBAL)+1
U33
ST Micro M29W008AB/AMD-29LV081B/SST39VF080
ENV0
21
VPP
VCC
GND
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
RESET#/NC
36
A10
RY/BY#/NC
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
D0
13
D0 D1 D2 D3 D4 D5 D6 D7
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
A18
1
+3VPCU
32
C606
.1U_4
16
ENV1 BADDR0 BADDR1 TRIS SHBM A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
CS# RD# WR#
0 0
0 1
1 0
Index
2E
4E
(HCFGBAH, HCFGBAL)
BADDR1-0
1 1
TV_SENSE# (19)
DNBSWON# (15)
R305
R304
10K_4
10K_4
+3V_S5
2
R301 10K_4
13
Q20
PDTC143TT
12 11 10
27 26 23 25
28 29
30
CS#
22
RD#
24
WR#
31
BIU configuration should match flash speed used
RF_SW#
TV_SENSE#_D
MONITOR_PLUG#
+3VPCU
R527
4.7K/F_4
MBCLK
25
D0
26
D1
27
D2
28
D3
32
D4
33
D5
34
D6
35
D7
10 12 29
NC1
38
NC2
11
NC3
31
VCC
30
VCC
23
GND
39
GND
1
R526
4.7K/F_4
U32
6 5
7
24LC08
D0 D1 D2 D3 D4 D5 D6 D7
VCC1_PWROK
T138
+3VPCU
R317 4.7K/F_4
R315 10K_4
R316 10K_4
A0
SCL
A1
SDA
A2
VCC
WP
GND
+3VPCU
R531 10K_4
12
C609 .1U_4
+3V
+3VPCU
1 2 3
8 4
FWH
Size Document Number Rev
3
2
Date: Sheet of
PROJECT : ED5
Quanta Computer Inc.
PC97551 & FLASH
1
28 34Monday, April 10, 2006
2A
Page 29
5
INT K/B
CN10
25
MY15(28) MY14(28) MY13(28)
D D
KBC
C C
B B
MY12(28) MY11(28) MY10(28) MY9(2 8) MY8(2 8) MY7(2 8) MY6(2 8) MY5(2 8) MX7(2 8) MX6(2 8) MX5(2 8) MX4(2 8) MY4(2 8) MY3(2 8) MX3(2 8) MX2(2 8) MX1(2 8) MX0(2 8) MY2(2 8) MY1(2 8) MY0(2 8)
SCROLED #(2 8)
CAPSLED #(2 8)
NUMLED#(28)
SATA_LED#(1 6)
IDELED#(21)
+5V
R27 10K_4
MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MX7 MX6 MX5 MX4 MY4 MY3 MX3 MX2 MX1 MX0 MY2 MY1 MY0
SCROLED #
CAPSLED #
NUMLED#
*.1U_4@SA TA C29
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
6906-25
QCI P/N
IT IS NOT GREEN PART
1 3
2
+3V
1 3
2
+3V
1 3
2
+3V
+5V
U5 *NC7SZ08 P5X_NL@SATA
53
1
2
0_4@PATA
R28
SCRLED
DTC144E UA Q8
CAPSLED
DTC144E UA Q6
DTC144E UA Q9
DISK_LED#
4
LED5 BLUE_LE D
LED4 BLUE_LE D
NUMLED
LED6 BLUE_LE D
LED3 BLUE_LE D
HDD & ODD IN THE SAME LED
BYPASS FOR P ATA-HDD AND PATA-ODD. (NO SATA)
A A
LED
CARD_LE D(28)
R534
10K/F_6
1
Q38
2
2N7002E -LF
LED8 BLUE_LED
3
ECN 2A MEMORY CARD 'S LED FALSH TOO FAST, EE CHANG E CIRCUIT AND EC ADD D E-BOUNCE
MSIC.
5
4
+3VSUS
RP2 10KX8
10
MX0
9
MY2
8
MY1
7 4
MY0
RP4 10KX8
10
MY15
9
MY14
8
MY13
7 4
MY12
RP3 10KX8
10
MX6
9
MX5
8
MX4
7 4
MY4
ECN 2A BOM CHAN GE CHANGE T O 560OHM
R57 560/F_4
R48 560/F_4
R65 560/F_4
R33 560/F_4
R369 560/F _4
4
CA3 *220PX4
MX1
1
MX2
2
MX3
3
MY3
56
MY8
1
MY9
2
MY10
3
MY11
56
MX7
1
MY5
2
MY6
3
MY7
56
+5V
MY3
7
MX3
5
MX2
3
MX1
1
CA7 *220PX4
MY15
7
MY14
5
MY13
3
MY12
1
CA6 *220PX4
MY11
7 5
MY9
3
MY8
1
BATLED0#(28)
+3VPCU
BATLED1#(28)
PWRL ED#(28 )
D3A:Change from SUS to PCU
+3VPCU
SUSLED#(28)
WIRELE SS_LED(19)
BT_LED(22)
8 6 4 2
8 6 4 2
8 6 4 2
1 3
2
2
1 3
1 3
2
2
1 3
R370 10K/F_6
1
R371 10K/F_6
1
3
CA5 *220PX4
7 5 3 1
CA4 *22 0PX4
7 5 3 1
CA2 *22 0PX4
7 5 3 1
DTC144E UA Q25
Q24 DTC144E UA
DTC144E UA Q3
Q2 DTC144E UA
Q27
2
2N7002E -LF
Q28
2
2N7002E -LF
3
PWR_ LED_BL
SUS_LED _AM
3
3
MX7
8
MY5
6
MY6
4
MY7
2
MY4
8
MX4
6
MX5
4
MX6
2
MY0
8
MY1MY10
6
MY2
4
MX0
2
BAT_LED_BL
BAT_LED_AM
WLA N_LED_BL
BT_LED_AM
+5V
VFAN(28)
TPM
+5V
R187 10K_4
TBDATA(28)
TBCLK(28)
C248 *.1U_4
TPD
3 1
3 1
3 1
Orange Forward Voltage 2.0~2.4
Blue Forward Voltage 3.4~3.8
DC Forward Current 20mA
R368 56 0/F_4
R367 56 0/F_4
24
LED7 LED_BLU E/YELLOW
R14 560/F_4
R13 560/F_4
24
LED2 LED_BLU E/YELLOW
R377 56 0/F_4
R378 56 0/F_4
24
LED9 LED_BLU E/YELLOW
D3A:Change from SUS to PCU
2
R328 0_4
U15 G995
2 3
VIN VO
1
FON
4
VSET
D3A:Correct P/N to 995
L41 BK2125H S330_8
R177 10K_4
L39 LZA 10-2ACB104MT_6
L38 LZA 10-2ACB104MT_6
C229 *.1U_4
+5VPCU
SWITCH
+5VPCU
+5V
2
+5V_TP
C227 *.1U_4
GND GND GND GND
1
+3V
MAX6648_OV# (5)
FANSIG(28)
5 6 7 8
TOUCH_L EFT
TOUCH_R IGHT
TH_FAN_ POWER
30 MIL
C439
2.2U/10V/X 5R
1 2
C258 .1U_4
TP_DATA
TP_CLK
C223 *.1U_4
SW2
3 4 5
DHP0000 6102
SW3
3 4 5
DHP0000 6102
SnapShot BT
SW4
3 4 5
DHP0000 6102
SRS ON/Off
3 1
Size Do cument Number Rev
Date: Sheet of
C438 .01U_4
TOUCH_R IGHT
1 2 3 4 5 6 7
TOUCH_L EFT
8 9 10 11 12
CN9 TOUCH_P AD
D3A: change CN9 P/N, and changed FootPrint
1 2
1 2
1 2
SW8IT-1188E
4 2
5
6
Quanta Computer Inc.
T/P,FAN,SWITCH,LED,K/B
R327 10K/F_6
1 2
1 2
PROJECT : ED5
1
CN22
1 2 3
85204-0300L
SW7
DHP0000 6102
SW6
DHP0000 6102
NBSW ON# (28 )
BT1# (28)
BT2# (28)
RF_SW # (28 )
29 34Mond ay, April 10, 2006
3 4 5
3 4 5
2A
Page 30
5
4
3
2
1
21
12
PC107 *2200P
PR17 *1.5K/F
PR20 2.49K/F_6
+5VPCU
21
PC108 *2200P
+5VPCU
PC106
4.7U/10V/X5R_8
1 2
PC114
5
4
4
4
4
12
PQ34
213
NTMFS4707NT1G
5
PQ31
213
NTMFS4108NT1G
Change PQ33 from P/N: BAM41190005 to P/N: BAM41080005.
PC17 *1000P
12
PC21 1000p/50V_4
1 2
PR23 10/F_6
5
213
PQ32
NTMFS4707NT1G
5
PQ33
213
NTMFS4108NT1G
Change PQ33 from P/N: BAM41190005 to P/N: BAM41080005.
3
2200P/50V_4
PC115
.1U/50V_6
PC101
PR8 10/F_6
PC113
2200P/50V_4
PC111
PR117
1.62K/F_4
VCC_CORE
.1U/50V_6
VIN_8774
10U/25V_12
PC109
1 2
PC112
10U/25V_12
PR114
1.62K/F_4
10U/25V_12
PL20
0.36uH
1 2
3
PR116
3.01K/F_4
PC27 .22U/25V
COREFB+V (5) COREFB- (5)
VIN_8774
PC110
10U/25V_12
1 2
PR113
3.01K/F_4
1 2
PC25 .22U/25V
PL11
HI0805R800R_8_5A
PL10
HI0805R800R_8_5A
4
PR118
NTC 10K_6-B4.25K
PC103
470U/25V
+
PL21
0.36uH
3
4
PR115
NTC 10K_6-B4.25K
VIN
PC104
10U/25V_12
Change PL20 and PL21 from DC+45Q0M000 to CV+18V0MZ04 Change PR117 & PR114 from CS22102FB12 to CS21622FB17 Change PR116 & PR113 from CS24022FB13 to CS23012FB16 01/10
PC37
12
+
PC117
470u/2.5V_7343
Change PL20 and PL21 from DC+45Q0M000 to CV+18V0MZ04 Change PR117 & PR114 from CS22102FB12 to CS21622FB17 Change PR116 & PR113 from CS24022FB13 to CS23012FB16 01/10
2
PC116
470u/2.5V_7343
12
12
12
+
+
PC36
470u/2.5V_7343
470u/2.5V_7343
Size Document Number Rev
Date: Sheet of
12
+
+
PC35
*470u/2.5V_7343
PC34
PROJECT : ED5
Quanta Computer Inc.
CPU CORE MAX8760
VCC_CORE
.1U/50V_6
30 34Monday, April 10, 2006
1
2A
PR147 10K/F_6
PWR_PSI#(5)
VRON(28)
VCC_CORE
+5VPCU
PR109
100K/F_4
PR33 0_6
PR32 0_6
PR31 0_6
PR30 0_6
PR28 0_6
PR26 0_6
PR9 20K/F_6
Change Value to
31.6K C3A
3
2
1
+5VPCU
12
PC15 470P_50V_4
8774VCC
PR29 0_6
PR21 0_6
PR27 0_4
PR24 0_4
PC19 470P_50V_4
PR12 71.5K/F_6
PC18 470P_50V_4
1 2
PC102
.22U/25V
PR19 169K/F
PQ3 2N7002E-LF
PR18 100K/F_4
PR16 10K/F_6
PR11 10K/F_6
8774VCC
PC105
2.2U/10V/X5R
1 2
8774SKIP#
12
8774TIME
8774CCV
8774REF
PR10
31.6K/F_4
8774OFS
8774OFS
12
PC20 470P_50V_4
VRHOT#
THRM
19
VCC
37
TWO-PH
17
PHASEG
1
PWRGD
31
D0
32
D1
33
D2
34
D3
35
D4
36
D5
40
IC
38
SHDN
39
SKIP
9
CCI
6
TIME
8
CCV
10
REF
2
OFS
4
VRHOT
3
POUT
5
THRM
MAX8774
PU4
PR105 *NTC 10K_6-B4.25K
4
PR110
10/F_6
25
VDD
7
TON
29
DH1
30
BST1
28
LX1
26
DL1
27
PGND1
18
GND
16
CSP1
15
CSP2
11
FB
12
GNDS
21
DH2
20
BST2
22
LX2
24
DL2
13
CSP2
14
CSN2
23
PGND2
41
GND
<Pin Numbers Visible>
PD7
RB500V
PR106 200K/F_4
8774DH1
PR39
8774BST1
8774LX1
8774DL1
8774CSP1 8774CSP2
Change PR20 from P/N: CS21503D900 to P/N: CS22493F945.
8774GNDS
12
8774DH2
8774BST2
8774LX2
8774CSN1 8774CSN2
PC24 1000p/50V_4
PR34 0_6
0_6
PR22
10/F_6
RB500V
.22U/25V
PC29 .22U/25V
PD8
PC28
+3V
D D
CPU_COREPG(28)
VID0(5)
VID1(5)
VID2(5)
VID3(5)
VID4(5)
VID5(5)
C C
B B
A A
D0
D1
D2
D3
D4
D5
PWR_PSI#
POUT
5
Page 31
5
4
3
2
1
VIN-1.2V
PR4
D D
MAINON(26,28,32,33)
VLDT_RUN_ON(28,33)
HWPG_1.2V(28)
C C
PR5 *0_4
REMOVE PR5 AND PC14
PR148 0_4
PR2
0_6
+3V
PR3 10K/F_6
PC10
.1U/50V_6
PC13
1000p/50V_4
PR6
1M_6
12
10/F_6
PU2 SC1470
1
EN/PSV
2
VIN
3
VOUT
4
VCCA
5
FBK
6
PGOOD
7 8
GND PGND
BST
VDDP
PC7
*.1u/25V_6
DH
LX
ILIM
DL
14
13
12
11
10
9
+5VPCU
21
PD2
12
BAS316
PC11 .1U/50V_6
DH-1.2V
PR101 15K/F_6
DL-1.2V
PC8
4.7U/6.3V_6
578
3 6
578
3 6
PQ26 FDS6612A
241
PQ23 FDS6690AS
241
PC98
PC99
.1U/50V_6
10U/25V_12
Change PL8 from P/N: DC-15A00036 to P/N: DC-15A00010.
PL8
1.5uH-MSCDR1-104R
12
+
PC9
470u/2.5V_7343
470u/2.5V_7343
PC100 10U/25V_12
PC6
PL9
HI0805R800R_8_5A
12
+
PC12 10U/6.3V_6
VOUT=(1+R2/R3)*0.5
VIN
PR100
14K/F_6
PR98 10K/F_6
PC96 1000p/50V_4
1.2V_FB
D3A:Remove Jump
+1.2V
PR47
1 2
0_6
PR48
1 2
0_6
MAINON
+3VPCU
B B
Change PU6 from P/N: AL004215003 to P/N: AL004215011 . BOM typo. Lead -> EP
PU5
1
2
3
G923-330T1U
PC31 10U/10V/X5R_8
SHDN
GND
VINVOSET
4
5
PR49 20K/F_6
PC43 10U/10V/X5R_8
PR50 20K/F_6
+2.5V
D3A:Remove Jump
MAINON
PR51 0_6
+1.8V
PC39
.1U/50V_6
PC47 10U/10V/X5R_8
A A
5
1
NC0
2 6
EN VO
3
VIN
4
NC1
PC53
.1U/50V_6
PR53
7.5K/F_6
4
ADJ
7
1.5V-ADJ
R2
NC2
GND0
GND1
PU6 SC4215
5
8
9
R1
PR52
6.8K/F_6
PC51
10U/10V/X5R_8
Vo=0.8(R1+R2)/R2
12
+
PC46 *150U/4V_3528
<Type> CC3528
PC57
3
.1U/50V_6
+1.5V
Vout =1.25(1+R1/R2) = 1.25 (1+20K/20K) = 2.5V
2
Size Document Number Rev Custom
Date: Sheet of
Monday, April 10, 2006
PROJECT : ED5
Quanta Computer Inc.
+1.2V & NBRUN
1
31 34
2A
Page 32
5
4
3
2
1
VIN
D D
PL19
HI0805R80 0R_8_5A
PC150
10U/25V_ 12
D3A:Remove Jump
+1.8VSUS
12
12
+
+
PC87
C C
PC134
560U/4V_8X6
470u/2.5V _7343
+5VSUS
PC88
PC90
10U/6.3V_ 6
PR139 *0_6
PR142
2.26K/F_6
PR144
10K/F_6
*CAP
480_VIN
10U/25V_ 12
PL18 1R5UH-LF
PD19 EC10QS04
2 1
PR140 0_6
PC149
.1U/50V_6
PQ17
FDS6690 AS
PC153
1U/16V_6
1 2
PC148
PQ38
FDS6612 A
578
3 6
241
578
3 6
241
578
3 6
241
RDS(ON)=6m ohm
480_VIN
PQ39 FDS6690 AS
PR145 1M_6
1.8V_BST
PR141 14K /F_6
VOUT=(1+PR82/PR81)*1.5
PD18 RB500V
PR91 0_ 6
PC145 .1U/25_8
1.8_DL
1.8V_FB
486TON
+5VSUS
1.8V_DH
12
PC147
4.7U/10V/X 5R_8
22
BST
21
DH
20
LX
16
ILIM
19
DL
18
PGND1
17
PGND1
8
VDDQS
9
FB
4
TON
PC154
1000P-6
1 2
PR85
480VCCA
10/F_6
15
14
VDDP
VDDP
PGD
EN/PSV
VTTEN
VTTIN
PGND2
VTT
VTTS
REF
VSSA
G
5
3
29
PR146
10/F_6
PC155
1U/16V_6
1 2
6
PU10 SC488MLTRT
VCCA
NC
NC
G G G
G
28
13 12
11
10
23
7
1
24
2
25 26 27
PC91 1U/16V_6
1.8VSUS
0.9V_P
Change PU10 from P/N: AL004800003 to P/N: AL000488013.
+3VSUS
PR84 10K/F_6
HWPG _1.8V (2 8)
SUSON (28,33)
MAINON (26,28,31,33)
+1.8VSUS
PC93 10U/10V-0 805
PC143 10U/10V-1 206
ECN 2A CHANGE P C92 AND PC93 FRO M CC1206 TO C08 05 QCI P/N: CH610 2M9A01
D3A:Remove Jump
PC151
.1U/50V_6
+0.9V_RE F
PR1490_6
PR1360_6
PR137*0_6
PC92 10U/10V-0 805
PC152 .1U/50V_6
PR143 0_6
PC142 10U/10V-1 206
+0.9V_VTER
B B
+1.8VSUS
PR70
1 2
0_6
PR74
+3VPCU
A A
5
1 2
0_6
Vout =1.25(1+R1/R2) = 1.25 (1+44K/100K) = 1.8V
PU8
1
SHDN
2
GND
3
VINVOSET
G923-330T1U
PC75 10U/10V/X 5R_8
4
4
5
PR72
PC74
47K/F_6
10U/10V/X 5R_8
ECN 2A
CHANGE P R72 FROM 21K/F TO 47K/F 0603
PR71 100K/F_6
+1.8V_S5
MAIND(3 3)S5_ON(28,33 )
3
65241
3
PQ7 AO6402
PC30 .1U/50V_6
+1.8V
PROJECT : ED5
Quanta Computer Inc.
Size Do cument Number Rev
2
Date: Sheet of
1.8V&DDR
32 34Mond ay, April 10, 2006
1
2ACustom
Page 33
5
4
3
2
1
PR127
PC125
*6.81K/F
*100P
PR128
PR123 0_ 6
1999VCC
2
3
PQ41 2N7002E -LF
1
PR126 0_ 6
10V-1
PC124 1U/16V_6
PR125 0_ 6
PR120 0_ 6
PC122 1U/16V_6
+3VPCU
PR132
3
1
0_6
THERM_SYS_P WR(5)
PR121 100K/F_6
D3A
0_6
SKIP_SEL
PQ40 2N7002E -LF
10V-1
+12VOUT
VL
REF2V
+5VPCU
VL
PR130 47/F_6
PC129 1U/ 16V_6
PR124 0_ 6
PR122 0_ 6
PR131 1 00K/F_6
PC127 1U/ 16V_6
D3A
+12VOUT
PR79
0_6
PC130
1U/16V_6
1999VCC
17
VCC
8
ILIM3
ILIM5
REF
5
ILIM3
11
ILIM5
7
FB3
9
FB5
3VON
3
ON3
5VON
4
ON5
23
GND
SKIP_SEL
12
SKIP
2
PGOOD
1
N.C.
25
LDO3
13
TON
PU9 MAX8734A-LF
PR129 *0_6
Change PU9 from P/N: AL001999W16 to P/N: AL008734W18.
VLDT_RUN_ON(28,31)
S5_ON(28,32)
4
D D
FDS6900AS Rds on = 15mOhm
FDS6690AS Rds on = 28mOhm
ILOAD * Rds on * 10 = ILIM
ILIM3 = 0.9V Current limit 6A ILIM5 = 1.97V Current limit 7A
Change PR76 from P/N: CS31003F949 to P/N: CS41273F915
PR76 51K/F_6
1999DL3
1999DL3
PR77 100K/F_6
PC120
.1U/50V_ 6
PC121
.1U/50V_ 6
ILIM3
C C
B B
A A
Change PR82 from P/N: CS31003F949 to P/N: CS21213F914
REF2V REF2V
PR82
200K/F_4
ILIM5
PR83 100K/F_6
HWPG_S YS(28)
PR150 1 00K/F_6
+5VPCU
MAIND(3 2)
PD16 CHN217
2
3
1
PD17 CHN217
2
3
1
5
2
PD15
2 1
ZD5.6V
PR81 12K-LF
PQ11 PDTC143TT
VIN1999
12
PC82 .1U/50V_ 6
12
PC80 . 22U/25V
PR78
100K/F_6
22
OUT3
26
DH3
27
LX3
28
BST3
24
DL3
6
SHDN
20
V+
18
LDO5
10
PRO
19
DL5
14
BST5
15
LX5
16
DH5
21
OUT5
2
PQ42
DTC144EUA
+3VPCU
2
1 3
VIN1999
1 3
+12VOUT
PR61 1M_6
VIN
PR80
1 2
4.7-LF
1999LX3
1999DH3
1999DL3
VL
PR151
1M_6
VLDT_RUN_G
PR152
1M_6
12
1999BST3
3
12
PC128
4.7U/10V /X5R_8
1999BST5
1999LX5
1999DH5
1999DL5
+1.2V
2
3
PC81 .1U/50V_ 6
PR97 22_8
3
1
65241
PC62 .1U/50V_ 6
FDS6900A S
PC123 .1U/50V_ 6
2
PD14 DAP202U
1
D3A
PQ22 2N7002E -LF
PQ10 AO6402
+3V_S5
PQ12
PC131 .1U/50V_ 6
+3VPCU
4
G2
S2
5
PQ15
FDS6690A S
123
D1
D1 S1/D2
PC76
*10U/25V _1206
876
578
3
G1
3 6
578
241
3 6
PL5 3R3UH
12
PR60 *2.7
PC60 *.01U
PC84 .1U/50V_ 6
PQ16
FDS6612A
Change PL8 from P/N: DC-15A00010 to P/N: CV-2575MZ02.
2.5uH-MSCDR 1-104R
12
PR133 *2.7
PC133
241
*.01U
MAINON(26 ,28,31,32)
SUSON(28,3 2)
PC73
10U/25V-X 7R_T2
PC83 10U/25V-X 7R_T2
PL17
2
PQ30
DTC144EUA
VIN1999-3
VIN1999-5
2
PQ24
DTC144EUA
1 3
PC70 .1U/50V_ 6
+
PC40
330U/6.3 V_7343
PC132 10U/25V-X 7R_T2
390U/6.3 V_8X6
1 3
VIN
PR112 1M_6
SUS_ON_G
PR111 1M_6
330U/6.3 V_7343
12
+
PC138
VIN
PR102 1M_6
RUN_ON_G
PR99 1M_6
+1.8VSUS
3
2
1
Remove Short 0119
PC41
PR108 22_8
PL6 HI0805R800R_8 _5A
+
10U/10V/ X5R_8
330U/6.3 V_7343
2
2
PQ29 2N7002E -LF
PC52 .1U/50V_ 6
PC61
PL7 HI 0805R800R_ 8_5A
Change PC85 from P/N: CH7331M8834 to P/N: CH73301M8L9.
+
PC86
PC85
10U/10V/ X5R_8
+1.8V +2.5 V +3V
PR96 22_8
3
2
PQ21 2N7002E -LF
1
+3VSUS
PR107 22_8
3
2
PQ28 2N7002E -LF
1
2
+3VPCU
3
1
+5VSUS
3
1
PR45 22_8
PQ8 2N7002E -LF
PR104 22_8
PQ27 2N7002E -LF
VIN
VIN
PC135 .1U/50V_ 6
2
2
+5VPCU
+12VOUT
3
1
PR95 22_8
3
PQ20 2N7002E -LF
1
PR103 1M_6
SUSD
PQ25 2N7002E -LF
+5V +1 2VOUT
PR94 22_8
3
2
PQ19 2N7002E -LF
1
PC97 *2200P
2
+5VPCU
5
PQ37 AO4812
4
5
PQ9 AO4812
4
MAIND (32)
PC136
.1U/50V_ 6
PC137
PC63
.1U/50V_ 6
PC45
.1U/50V_ 6
.1U/50V_ 6
+5VSUS
+5V
PC139 .1U/50V_ 6
+3VSUS
+3V
PC42 .1U/50V_ 6
3
1
PR93 1M_6
PQ18 2N7002E -LF
MAIND
SUSD
MAIND
SUSD
+3VPCU
876
123
PC95 *2200P
876
123
PROJECT : ED5
Size Docu ment Number Rev
Custom
Date: Sheet of
Quanta Computer Inc.
SYSTEM POWER MAX1999
1
33 34Monday, April 10 , 2006
2A
Page 34
5
D3A:Modify citcuit and Layout, update BOM, too
CN17
D D
C C
REFP
PR25
22K_6
PC16
B B
A A
220p_4
VIN
PR37
+3VPCU
PR38
1 2 4 3 5
POWER_JACK
DCJK-2DC-S006-B14-3P-H
PD6 RB500V
PR13 47K/F_6
220K_6
PU3B
5
+
6
-
LM393
180K/F_6
PC26
.1U/25_8
OSC 200KHz
3
1
1
7
2
PQ4 2N7002E-LF
PC2
.1U/25_8
VAD
84
+
-
VL
PD5
RB500V
PU3A LM393
3
2
PR35
22K_6
1 3
PR36
220K_6
PC3 .1U/25_8
PR7 10K/F_6
5
VAD
2
4
321 6
PR14
47K/F_6
PR15
10K/F_6
PQ5
DTC144EUA
HI0805R800R_8_5A
PL3
PL2
HI0805R800R_8_5A
PC23
.01U/50V_6
PQ2 IMZ2
IMD
VAON
D/C#
BL/C#
3
CV-SET(28)
CC-SET(28)
PD4 DA204U
2
1
D/C# (28)
BL/C# (28)
4
VA
21
PD3 SW1010C
VH
PC22
.1U/25_8
USE DEFAULT 4.2V/CELL
8724LDO
PC4
.1U/25_8
+3VPCU
PR64 0_6
PR65 *0_6
PC5
.1U/25_8
PC54 1U/16V_6
1 2
PC69
1000p/50V_4
8724LDO
PR57
1K/F_6
PC50
.1U/50V_6
PC32
2200P/50V_4
PC65
.1U/50V_6
PC66
1000p/50V_4
3
+3VPCU
1
3
2
PD10 SPL1040PT
PC33
.1U/25_8
12
1P
PR46
0.01_3720_1W
10
15
13
12
11
PR59
0_6
PR56
0_6
PC49
.01U/50V_6
28
PR55
0_6
PC48
.01U/50V_6 PC71
PU7 MAX8724
1
DCIN
ACIN
VCTL
ICTL
REFIN
ACOK
9
ICHG
IINP
8
SHDN
7
CCV
6
CCI
5
CCS
2P
CSSP CSSN
27
26
CELLS
CSSP
CSSN
LDO
DLOV
BST
DHI
DLO
PGND
CSIP CSIN
BATT
REF
CLS
GND
GND
14
29
LX
FOR 4S
CELLR-SET
17
8724LDO
2
22
8724BST
24
25
23
21
20
19 18
16
4
3
PC59 *.1u/50V_6
PC58 *.1u/50V_6
PR62 33_6
PC55
1 2
1U/16V_6
PD13
PC64
SW1010C
.1U/25_8
8724DL
CSIP CSIN
BAT-V
8724REF
PR58 12.4K/F_6
PR54 10K/F_6
8724DH
21
8724LX
1 2
PC56
1U/16V_6
CELLR-SET
PC38 10U/25V_12
PC44 .1U/25_8
PC67
1 2
1U/16V_6
G1
8
7
6
5
PQ35 FDS6900AS
12
+
D1
D1S1/D2
G2
S2
CURRNT LIMIT POINT = 3.4A
ACIN(28)
PR41
6.8K/F_6
PR42
10K/F_6
PD9
ZD12V
21
PR40 10K/F_6
VAD
PR67
100K/F_6
PR66 0_6
PR68
100K/F_6
1
2
3
4
2
PL4
HI0805R800R_8_5A
PL14 3R3UH
CN25
56 4 3 2 1
7
SPE-C14455
10mil
VAON
TEMP_MBAT
PR63 330_4
8724CELLS (28)
PR43 4.7K/F_6
PR119
0.015_3720
1 2
1P
2P
PC68
47P_4
PR69 330_4
MBDATA
PD12 ZD5.6V
2 1
100U/25V
2 1
VH
PC126
+
PD11 ZD5.6V
PR44 47K/F_6
BAT-V MBAT
12
12
PC79
10U/25V_12
12
PC77
.1U/50V_6
47P_4
MBCLK (28)
MBDATA (28)
+
578
3 6
241
321
5 4
12
PC78 10U/25V_12
+
PQ6 AO4414L
PQ36 FDS4435
876
MBAT
PC118 .01U/50V_6
TEMP_MBAT (28)
HI0805R800R_8_5A
HI0805R800R_8_5A
PR73 10K/F_6
TEMP_MBAT
12
PC72 .01U/50V_6
1
VIN
PC119
.1U/25_8
PL15
PL16
MBATMBAT+
+3VPCU
Size Document Number Rev
C
5
4
3
2
Date: Sheet of
PROJECT : ED5
Quanta Computer Inc.
BATTERY CHARGER
1
34 34Monday, April 10, 2006
2A
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