1
2
3
4
5
6
7
8
X'TAL
BQ1 SYSTEM BLOCK DIAGRAM
14.318M
CLOCK GEN
ICS
A A
ICS954206
Page : 2
CPU
Thermal Sensor
Page : 3
DOTHAN PROCESSOR
478 uFCPGA
Page : 3 , 4
100/133Mhz
FSB 400(3.2GB/s)/533(4.3GB/s) MHz
PCI-EXPRESS
DDRII-SODIMM 1
Page:9~10
DDRII-SODIMM 2
Page:9~10
B B
Primary Master
IDE - HDD
Page:16
533MHZ DDRII
ATA 66/100
Primary Slave
IDE-ODD
Page:16
C C
Primary
HD-Audio
ALVISO-PM/GM
GMCH
NQ82915PM/GM
1257 BGA
Page : 5 ~ 8
DMI I/F
X'TAL
32.768K
( X2 or X4 )
266/533 Mhz
ICH6-M
FW82801FBM
609 BGA
Page : 17 ~ 19
X16
PCI BUS
USB 2.0
LPC I/F
AUDIO CODEC
REALTEK
ALC260
AUDIO/B
AMP
MAX975X
AUDIO/B AUDIO/B
D D
MIC IN
AUDIO/B AUDIO/B AUDIO/B
LINE IN
AUDIO/B
SPEKER
HP OUT
SPDIF
Audio Board
1
2
Secondary
HD-MODEM
MDC1.5
RJ11
USB/B
Touchpad
Page:25
PCI ROUTING TABLE
REQ0# / GNT0#
REQ2# / GNT2#
REQ1# / GNT1#
3
X'TAL
32.768K
NS
KBC(97551)
Page : 24
Keyboard
Page:25
Flash ROM
Page:24
IDSEL
AD24
AD19
AD17
4
INTERUPT
INTA#
INTB# , INTD#
INTC#,INTD#,INTA#
VRAM
(64M)
Page : 14
VGA
708 BGA
ATI (M24-P)
Page : 11 ~ 13
LVDS
RGB
TVOUT
33Mhz ( 133 MB )
DEVICE
REALTEK LAN
MINI-PCI
TI 7411
5
Fan Control
EXT_LVDS
EXT_CRT
EXT_TV-OUT
INT_LVDS
INT_CRT
INT_TV-OUT
SYSTEM 4
USB PORT
Page : 20
USB 2,3,4,5
Page : 25
SWITCH
CIRCUIT
TI
PCMCIA+1394
+4 IN 1
PCI7411
Page: 21,22
MINI-PCI
Wireless LAN
Modem/LAN
Page : 20
REALTEK
10/100 LAN
RTL8100C
Page:23
6
CRT
Page:16
LVDS
Page:15
TV-OUT
Page:15
10/100 Mbps
Bluetooth
Page:25
USB 0
Size Document Number Rev
BLOCK DIAGRAM
Date: Sheet
7
BOM MARK
E@ EXT VGA
I@ INTVGA
SD/MMC/MS
要打
要打
4 IN 1
Page: 22
PCMCIA
Page: 22
1394
Page: 21
RJ45(with LED)
Page:23
PROJECT : BQ1
Quanta Computer Inc.
132Thursday, August 18, 2005
8
1
1A
of
1
2
3
4
5
6
7
8
Place these termination
to close CK410M.
IREF
R124
2.2
U8
50
XTAL_IN
49
XTAL_OUT
10
VTT_PWRGD#/PD
55
PCI/SRC_STOP#
54
CPU_STOP#
46
SCLK
47
SDATA
12
FSA/USB_48
16
FSB/TEST_MODE
53
FSC/TEST_SEL
48
VDD_REF
1
VDD_PCI_1
7
VDD_PCI_2
42
VDD_CPU
21
VDD_SRC0
28
VDD_SRC1
34
VDD_SRC2
11
VDD_48
39
IREF
*Internal Pull-UP Resistor
14
DOT96
15
DOT96#
CK-410M
GND_REF
GND_PCI_1
GND_48
51
13
VDDA_CKG
37
VDDA
CPU2#_ITP/SRC5#
96MHZ_SST/SRC0
96MHZ_SSC/SRC0#
SEL100_96M/PCIF1
GND_PCI_2
GND_SRC
GND_CPU
6294592
12
C264
.047U_4
38
VSSA
CPU0#
CPU1#
CPU2_ITP/SRC5
*PERREQ1#
*PERREQ2#
SRC4#
SATACLK
SATACLK#
SRC3#
SRC2#
SRC1#
PCIF0/ITP_EN
ICS954206
250mA ( MAX. )
REF
CPU0
CPU1
SRC4
SRC3
SRC2
SRC1
PCI5
PCI4
PCI3
PCI2
12
C262
52
44
43
41
40
36
35
33
32
31
30
26
27
24
25
22
23
19
20
R_DREFSSCLK
17
R_DREFSSCLK#
18
5
4
3
56
8
10U/10V_8
14M_REF
R_HCLK_CPU#
R_HCLK_MCH
R_HCLK_MCH#
R_MCH_3GPLL
R_MCH_3GPLL#
R_PCIE_ICH
R_PCIE_ICH#
R_PCIE_VGA
R_PCIE_VGA#
R_PCLK_591
R_PCLK_PCM
R_PCLK_LAN
R_PCLK_MINI
R_PCLK_ICH
R146 49.9/F_4
1 2
R144 49.9/F_4
1 2
R139 49.9/F_4
1 2
R137 49.9/F_4
1 2
4
2
4
2
2
4
RP2 4P2R-S-33_4
2
4
RP3 4P2R-S-33_4
2
4
RP4 E@4P2R-S-33_4
2
4
RP22 I@4P2R-S-33_4
RP8
3
1
4P2R-S-33_4
RP5
3
1
4P2R-S-33_4
1
3
1
3
1
3
1
3
R155 33_4
R157 33_4
R159 33_4
R150 33_4
R153 33_4
R152 10K_4
1 2
R480 *10K_4
1 2
1 2
1 2
1 2
1 2
1 2
R158 33_4
1 2
HCLK_CPU (3)
HCLK_CPU# (3)
HCLK_MCH (5)
HCLK_MCH# (5)
CLK_MCH_3GPLL (6)
CLK_MCH_3GPLL# (6)
CLK_PCIE_ICH (18)
CLK_PCIE_ICH# (18)
CLK_PCIE_VGA (11)
CLK_PCIE_VGA# (11)
DREFSSCLK (6)
DREFSSCLK# (6)
PCLK_591 (24)
PCLK_PCM (21)
PCLK_LAN (23)
PCLK_MINI (20)
PCLK_ICH (17)
14M_ICH (18)
For 915PM
For 915GM
PULL HIGH TO SET PIN35,36 TO HOST CLK
DOT96
DOT96#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DREFSSCLK
DREFSSCLK#
CLK_PCIE_ICH
CLK_PCIE_ICH#
R529 I@49.9/F_4
1 2
R530 I@49.9/F_4
1 2
R138 E@49.9/F_4
1 2
R135 E@49.9/F_4
1 2
R360 49.9/F_4
1 2
R359 49.9/F_4
1 2
R143 I@49.9/F_4
1 2
R141 I@49.9/F_4
1 2
R367 49.9/F_4
1 2
R364 49.9/F_4
1 2
L27
+3V
A A
+3V
B B
C C
1 2
MLB_160808-0300P-N2
+VCCP +3V+VCCP
R161
*1K_4
1 2
SELPSB2_CLK SELPSB0_CLKSELPSB1_CLK
R160
*0_4
1 2
L53
1 2
MLB_160808-0300P-N2
12
C254
10U/10V_8
1 2
1 2
R151
1
R381
2.2
VDD_CKG_CPU
R372
*1K_4
R140
*0_4
12
C541
12
C533
12
C269
.047U_4
10U/10V_8
10U/10V_8
12
C258
.047U_4
R378
10K_4
1 2
R147
*10K_4
1 2
VDD_CKGREF
CLKVDD
12
C536
.047U_4
12
C528
.047U_4
For 915GM
SELPSB1_CLK(4,6)
SELPSB2_CLK(4,6)
12
CLK48_USB(18)
C521
.047U_4
PCLK_SMB(9,18)
PDAT_SMB(9,18)
CLK48M(21)
12
C537
.047U_4
12
C523
.047U_4
SELPSB2_CLK
C271
.047U_4
DOT96(6)
DOT96#(6)
crystal, placed within
C276
500 mils of CK410M
33P_4
12
12
C275
33P_4
12
CLK_EN#(31)
STP_PCI#(18)
STP_CPU#(18,31)
SMbus address D2
R477 10_4
1 2
R148 10_4
1 2
R478 4.7K_4
12
VDD_CKG_CPU
Iref=5mA,
Ioh=4*Iref
R136
I@4P2R-S-33_4
4
2
RP7
CG_XIN
Y2
14.318MHZ/20PF
CG_XOUT R_HCLK_CPU
SELPSB0_CLK
SELPSB1_CLK
1 2
VDD_CKG_48
1 2
475/F_4
R_DOT96
3
R_DOT96#
1
2
FSC FSB FSA CPU SRC PCI
DOTHAN-A 400
DOTHAN-A 533
1 0 1 100 100 33
0 0 1 133 100 33
Place these termination
to close CK410M.
0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 RSVD 100 33
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
COMPUTER
CLOCK GENERATOR
BQ1 1A
7
232Thursday, August 18, 2005
of
8
1
2
3
4
5
6
7
8
+3V
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HD#[0..63]
HDSTBN0# (5)
HDSTBP0# (5)
HDSTBN1# (5)
HDSTBP1# (5)
HDSTBN2# (5)
HDSTBP2# (5)
HDSTBN3# (5)
HDSTBP3# (5)
HDBI0# (5)
HDBI1# (5)
HDBI2# (5)
HDBI3# (5)
DBSY# (5)
DRDY# (5)
HCLK_CPU# (2)
HCLK_CPU (2)
AA3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
A13
A12
C12
C11
B13
A16
A15
B10
A10
B18
A18
C17
B17
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
Y3
U3
R2
P3
T2
P1
T1
N2
A4
N4
J3
L1
J2
K3
K4
L4
C8
B8
A9
C9
M3
H1
K1
L2
C2
D3
A3
E4
B4
A7
D1
D4
C6
A6
B7
G1
U17A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB0#
ADSTB1#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADS#
IERR#
BREQ0#
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#
LINT0
LINT1
STPCLK#
SLP#
DPSLP#
DPRSTP#
THERMDA
THERMDC
THERMTRIP#
PROCHOT#
Dothan Processor
Dothan
REQUEST
PHASE
SIGNALS
ERROR
SIGNALS
ARBITRATION
PHASE
SIGNALS
SNOOP PHASE
SIGNALS
RESPONSE
PHASE
SIGNALS
PC
COMPATIBILITY
SIGNALS
DIAGNOSTIC
& TEST
SIGNALS
EXECUTION
CONTROL
SIGNALS
THERMAL DIODE
1 OF 3
3
DATA
PHASE
SIGNALS
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
A19
D0#
A25
D1#
A22
D2#
B21
D3#
A24
D4#
B26
D5#
A21
D6#
B20
D7#
C20
D8#
B24
D9#
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
B5
B11
C19
4
HA#[3..31](5)
A A
B B
+VCCP
+VCCP
C C
CPUPWRGD(17)
+3V_S5
DBR#(18)
G1: Dothan is NC
pin and Yonah is
DPRSTP# pin
D D
THERMTRIP#(6,17)
R267
200/F_4
R270 150_4
THERMTRIP#
+VCCP
R19 56_4
1
HA#[3..31]
HADSTB0#(5)
HADSTB1#(5)
HREQ#0(5)
HREQ#1(5)
HREQ#2(5)
HREQ#3(5)
HREQ#4(5)
ADS#(5)
R269 56_4
HBREQ0#(5)
BPRI#(5)
BNR#(5)
HLOCK#(5)
HIT#(5)
HITM#(5)
DEFER#(5)
T130
T123
T118
T129
HTRDY#(5)
RS#0(5)
RS#1(5)
RS#2(5)
A20M#(17)
FERR#(17)
IGNNE#(17)
SMI#(17)
T115
T114
T117
T112
INTR(17)
NMI(17)
STPCLK#(17)
CPUSLP#(5,17)
DPSLP#(17)
DPRSLP#(17)
0_4
R280
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
IERR#
BPM0#
BPM1#
BPM2#
BPM3#
TCK
TDO
TDI
TMS
TRST#
PREQ#
PRDY#
THERMDA
THERMDC
THERMTRIP#_CPU
CPU_PROCHOT#
2
+3V
THERMDC
THERMDA
CPUINIT# (17)
DPWR# (5)
HD#[0..63] (5)
R23 47
10 mil trace /
10 mil space
THERMTRIP#
C871
1000P_4
close to ITP conn
R272 54.9/F_4
5
R24
10K_4
15 MIL
3V_THM
C449
.1U_4
C60
2200P
+VCCP
R482
*56
PLTRST#(6,11,17,24)
TDI KBSMCLK
TMS
TDO
TCK
TRST#
Address :98H
U4
1
VCC
3
DXN
2
DXP
4 5
-OVT GND
MAX6657
Signal Resistor Value Connect To Resistor Placement
TDI
150 ohm +/- 5%
TMS
39 ohm +/- 5%
TRST#
680 ohm +/- 5%
TCK
27 ohm +/- 5%
TDO
Open
+3V
R484
2
Q30
470
R274 150_4
R273 39.2/F_4
R275 *54.9/F_4
R278 27.4/F_4
R277 680_4
PMBT3904
CPURST# (5)
+VCCP
6
1 3
SMDATA
R481
1K
SMCLK
-ALT
2
1
7
8
6
+3VSUS
+VCCP
+3V
KBSMDAT
KBSMCLK
+3V
R20
10K_4
VTT
VTT
GND
GND
VTT
U26
TC7SH08FU
R483 200K
4
3 5
Title
Size Document Number Rev
Date: Sheet
+3V
Q5
2
2N7002E
+3V
2
R25
10K_4
R21 0_4
12
LSDATA_1(25)
LSCLK_1(25)
3
Q3
2N7002E
3
2
C634
0.1U_0402
MBCLK (11,24,32)
MAX6648_AL# (18,24)
MAX6648_OV# (24,25)
31
Q29
2N7002EPT
R548
R549
MBDATA (11,24,32)
1632RESET# (24,28)
*0_4
KBSMDAT
12
*0_4
12
1
R22
10K_4
1
+3V
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
Light Sensor
QUANTA
COMPUTER
Dothan Processor (HOST)
BQ1 1A
7
332Thursday, August 18, 2005
of
8
3
1
2
3
4
5
6
7
8
8
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24W22
C803
0.1U_4
C812
0.1U_4
of
4
C813
0.1U_4
C795
0.1U_4
C804
0.1U_4
R2790_4
R180_4
+VCCP
Z0501
Z0502
BSEL0
BSEL1
C796
0.1U_4
C805
0.1U_4
U17C
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
VCCP5
E15
VCCP6
F10
VCCP7
F12
VCCP8
F14
VCCP9
F16
VCCP10
K6
VCCP11
L5
VCCP12
L21
VCCP13
M6
VCCP14
M22
VCCP15
N5
VCCP16
N21
VCCP17
P6
VCCP18
P22
VCCP19
R5
VCCP20
R21
VCCP21
T6
VCCP22
T22
VCCP23
U21
VCCP24
P23
VCCQ0
W4
VCCQ1
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AE7
VCCSENSE
AF6
VSSSENSE
C16
BSEL0
C14
BSEL1
E1
PSI
R6
VSS100
R22
VSS101
R25
VSS102
T3
VSS103
T5
VSS104
T21
VSS105
T23
VSS106
T26
VSS107
U2
VSS108
U6
VSS109
U22
VSS110
U24
VSS111
V1
VSS112
V4
VSS113
V5
VSS114
V21
VSS115
V25
VSS116
W3
VSS117
W6
VSS118
Dothan Processor
C797
0.1U_4
C806
0.1U_4
Dothan
3 OF 3
POWER, GROUND AND NC
VID
C799
C798
0.1U_4
0.1U_4
C807
C808
0.1U_4
0.1U_4
C800
0.1U_4
C809
0.1U_4
C801
0.1U_4
C810
0.1U_4
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191VSS119
C802
0.1U_4
C811
0.1U_4
QUANTA
Title
Size Document Number Rev
Date: Sheet
COMPUTER
Dothan Processor (POWER)
BQ1 1A
7
432Thursday, August 18, 2005
C30
12
C36
.1U_4
R12
1K/F
R11
2K/F_4
12
C43
10U_6.3V_8
12
C13
10U_4V_8
C38
10U_6.3V_8
1 2
+VCCP
Place voltage
divider within
0.5" of GTLREF
pin
R268
*1K_4
C57
0.01U/16V_4
VCC_CORE
12
C18
10U_4V_8
VCC_CORE
12
C40
10U_6.3V_8
VCC_CORE
C22
10U_6.3V_8
1 2
+VCCP
C37
C46
.1U_4
.1U_4
3
1 2
12
C17
10U_4V_8
12
C50
10U_6.3V_8
C23
10U_6.3V_8
1 2
C35
.1U_4
R15
*1K_4
40mil
12
C56
10U_4V_8
12
C14
10U_4V_8
12
C48
10U_6.3V_8
C24
10U_6.3V_8
1 2
C44
C59
.1U_4
CPU_VCCA
.1U_4
T122
T126
T111
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
VCC_CORE
4
P25
P26
AB2
AB1
AD26
AF7
AC1
E26
AC26
D18
D20
D22
E17
E19
E21
G21
H22
K22
V22
W21
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
C5
F23
B2
C3
N1
B1
F26
D6
D8
E5
E7
E9
F6
F8
F18
F20
F22
G5
H6
J5
J21
U5
V6
W5
Y6
U17B
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
NC1
RSVD2
RSVD3
RSVD4
RSVD5
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Dothan Processor
Dothan
2 OF 3
POWER,
GROUND,
RESERVED
SIGNALS
A2
VSS00
A5
VSS01
A8
VSS02
A11
VSS03
A14
VSS04
A17
VSS05
A20
VSS06
A23
VSS07
A26
VSS08
B3
VSS09
B6
VSS10
B9
VSS11
B12
VSS12
B16
VSS13
B19
VSS14
B22
VSS15
B25
VSS16
C1
VSS17
C4
VSS18
C7
VSS19
C10
VSS20
C13
VSS21
C15
VSS22
C18
VSS23
C21
VSS24
C24
VSS25
D2
VSS26
D5
VSS27
D7
VSS28
D9
VSS29
D11
VSS30
D13
VSS31
D15
VSS32
D17
VSS33
D19
VSS34
D21
VSS35
D23
VSS36
D26
VSS37
E3
VSS38
E6
VSS39
E8
VSS40
E10
VSS41
E12
VSS42
E14
VSS43
E16
VSS44
E18
VSS45
E20
VSS46
E22
VSS47
E25
VSS48
F1
VSS49
F4
VSS50
F5
VSS51
F7
VSS52
F9
VSS53
F11
VSS54
F13
VSS55
F15
VSS56
F17
VSS57
F19
VSS58
F21
VSS59
F24
VSS60
G2
VSS61
G6
VSS62
G22
VSS63
G23
VSS64
G26
VSS65
H3
VSS66
H5
VSS67
H21
VSS68
H25
VSS69
J1
VSS70
J4
VSS71
J6
VSS72
J22
VSS73
J24
VSS74
K2
VSS75
K5
VSS76
K21
VSS77
K23
VSS78
K26
VSS79
L3
VSS80
L6
VSS81
L22
VSS82
L25
VSS83
M1
VSS84
M4
VSS85
M5
VSS86
M21
VSS87
M24
VSS88
N3
VSS89
N6
VSS90
N22
VSS91
N23
VSS92
N26
VSS93
P2
VSS94
P5
VSS95
P21
VSS96
P24
VSS97
R1
VSS98
R4
VSS99
5
CPU_VID0(31)
CPU_VID1(31)
CPU_VID2(31)
CPU_VID3(31)
CPU_VID4(31)
CPU_VID5(31)
T109
T108
SELPSB2_CLK(2,6)
SELPSB1_CLK(2,6)
SELPSB2_CLK
SELPSB1_CLK
1 2
1 2
DOTHAN-A NC
DOTHAN-B POP
06/21:Auto select
PSI#(31)
VCC_CORE
C794
0.1U_4
6
COMP0, COMP2 Trace should be 27.4 ± 15%
COMP1, COMP3 Trace should be 55 ± 15%
COMP0
COMP1
COMP2
COMP3
A A
B B
C C
VCC_CORE
D D
+VCCP
12
C31
10U_6.3V_8
12
C33
10U_4V_8
12
C47
10U_6.3V_8
C25
10U_6.3V_8
1 2
*470U/2.5V/9m
+
C814
*470U/2.5V/9m
12
C61
+
150U/4V-3528
<Type>
CC3528
1
R14
27.4/F_4
R13
R10
27.4/F_4
ERROR
SENSE
12
C52
10U_6.3V_8
12
C45
10U_4V_8
12
C15
10U_4V_8
C28
10U_6.3V_8
1 2
12
C53
.1U_4
R9
54.9/F_4
8
SD
7
6
12
C21
10U_6.3V_8
12
C41
10U_6.3V_8
12
C51
10U_6.3V_8
C29
10U_6.3V_8
1 2
2
12
C34
.1U_4
C636
0.1U_0402
54.9/F_4
Place pulldown resistors within
0.5" of COMP pins
U27
1
CNOISE
2
DELAY
3
GND
4 5
VIN VOUT
SI9181-15
C635
0.1U_0402
VCC_CORE
12
12
C39
C42
10U_6.3V_8
10U_6.3V_8
VCC_CORE
12
12
C20
C32
10U_4V_8
10U_4V_8
VCC_CORE
12
12
C49
C16
10U_4V_8
10U_4V_8
VCC_CORE
C27
C26
10U_6.3V_8
10U_6.3V_8
1 2
1 2
C815
+
12
C55
.1U_4
C816
470U/2.5V/9m
12
C54
.1U_4
+
CPU_VCCA+3V
12
C19
10U_4V_8
12
C12
10U_4V_8
10U_6.3V_8
1 2
1
U22E
AF23
VSS136
H23
VSS137
AL22
VSS138
AH22
VSS139
J22
VSS140
E22
VSS141
D22
VSS142
A22
VSS143
AN21
VSS144
AF21
VSS145
F21
VSS146
C21
VSS147
A A
B B
C C
D D
1
AK20
AN19
AG19
AL18
AN17
AJ17
AF17
AL16
AN14
AL14
AJ14
AG14
AN11
AL11
AJ11
AG11
AF11
AA11
AA10
AN24
AL24
VSS148
V20
VSS149
G20
VSS150
F20
VSS151
E20
VSS152
D20
VSS153
A20
VSS154
VSS155
VSS156
W19
VSS157
T19
VSS158
J19
VSS159
H19
VSS160
C19
VSS161
VSS162
U18
VSS163
B18
VSS164
A18
VSS165
VSS166
VSS167
VSS168
G17
VSS169
C17
VSS170
VSS171
K16
VSS172
H16
VSS173
D16
VSS174
A16
VSS175
K15
VSS176
C15
VSS177
VSS178
VSS179
VSS180
VSS181
K14
VSS182
J14
VSS183
F14
VSS184
B14
VSS185
A14
VSS186
J12
VSS187
D12
VSS188
B12
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
Y11
VSS196
H11
VSS197
F11
VSS198
VSS199
Y10
VSS200
L10
VSS201
D10
VSS202
AN9
VSS203
AH9
VSS204
AE9
VSS205
AC9
VSS206
AA9
VSS207
V9
VSS208
T9
VSS209
K9
VSS210
H9
VSS211
A9
VSS212
AL8
VSS213
Y8
VSS214
P8
VSS215
L8
VSS216
E8
VSS217
C8
VSS218
AN7
VSS219
AK7
VSS220
AG7
VSS221
AA7
VSS222
V7
VSS223
G7
VSS224
AJ6
VSS225
AE6
VSS226
AC6
VSS227
AA6
VSS228
T6
VSS229
P6
VSS230
L6
VSS231
J6
VSS232
B6
VSS233
AP5
VSS234
AL5
VSS235
W5
VSS236
E5
VSS237
AN4
VSS238
AF4
VSS239
Y4
VSS240
U4
VSS241
P4
VSS242
L4
VSS243
H4
VSS244
C4
VSS245
AJ3
VSS246
AC3
VSS247
AB3
VSS248
AA3
VSS249
C3
VSS250
A3
VSS251
AN2
VSS252
AL2
VSS253
AH2
VSS254
AE2
VSS255
AD2
VSS256
V2
VSS257
T2
VSS258
P2
VSS259
L2
VSS260
B27
VSS261
J26
VSS262
G26
VSS263
E26
VSS264
A26
VSS265
VSS266
VSS267
J2
VSS268
G2
VSS269
D2
VSS270
Y1
VSS271
B36
VSSALVDS
VSS
2
2
AG37
VSS0
Y37
VSS1
V37
VSS2
T37
VSS3
P37
VSS4
M37
VSS5
K37
VSS6
H37
VSS7
E37
VSS8
AN36
VSS9
AL36
VSS10
AJ36
VSS11
AF36
VSS12
AE36
VSS13
AD36
VSS14
AC36
VSS15
AB36
VSS16
AA36
VSS17
C36
VSS18
AE35
VSS19
Y35
VSS20
W35
VSS21
V35
VSS22
U35
VSS23
T35
VSS24
R35
VSS25
P35
VSS26
N35
VSS27
M35
VSS28
L35
VSS29
K35
VSS30
J35
VSS31
H35
VSS32
G35
VSS33
F35
VSS34
E35
VSS35
D35
VSS36
B35
VSS37
AN34
VSS38
AH34
VSS39
AD34
VSS40
AC34
VSS41
AB34
VSS42
AA34
VSS43
C34
VSS44
AL33
VSS45
AF33
VSS46
AD33
VSS47
W33
VSS48
V33
VSS49
U33
VSS50
T33
VSS51
R33
VSS52
P33
VSS53
N33
VSS54
M33
VSS55
L33
VSS56
K33
VSS57
J33
VSS58
H33
VSS59
G33
VSS60
F33
VSS61
E33
VSS62
D33
VSS63
AN32
VSS64
AJ32
VSS65
AD32
VSS66
AC32
VSS67
AB32
VSS68
AA32
VSS69
Y32
VSS70
C32
VSS71
A32
VSS72
AL31
VSS73
AG31
VSS74
AD31
VSS75
W31
VSS76
V31
VSS77
U31
VSS78
T31
VSS79
R31
VSS80
P31
VSS81
N31
VSS82
M31
VSS83
L31
VSS84
K31
VSS85
J31
VSS86
H31
VSS87
G31
VSS88
F31
VSS89
E31
VSS90
D31
VSS91
AP30
VSS92
AE30
VSS93
AC30
VSS94
AB30
VSS95
AA30
VSS96
Y30
VSS97
C30
VSS98
AM29
VSS99
AJ29
VSS100
AG29
VSS101
AD29
VSS102
AA29
VSS103
W29
VSS104
V29
VSS105
U29
VSS106
P29
VSS107
L29
VSS108
H29
VSS109
G29
VSS110
F29
VSS111
E29
VSS112
D29
VSS113
A29
VSS114
AC28
VSS115
AB28
VSS116
AA28
VSS117
W28
VSS118
E28
VSS119
AN27
VSS120
AL27
VSS121
AJ27
VSS122
AG27
VSS123
AF27
VSS124
AB27
VSS125
AA27
VSS126
W27
VSS127
G27
VSS128
E27
VSS129
AJ24
VSS130
AG24
VSS131
J24
VSS132
F24
VSS133
D24
VSS134
B24
VSS135
ALVISO_GM/GML
3
4
5
6
7
8
5
HXRCOMP
R59
24.9/F_4
+VCCP
R53
54.9/F_4
HXSCOMP
+VCCP
R52
221/F_4
100/F_4
24.9/F_4
R96
221/F_4
R73
100/F_4
3
R47
R100
+VCCP
+VCCP
HYRCOMP
R70
54.9/F_4
HYSCOMP
HXSWING
C72
.1U_4
1 2
HYSWING
C100
.1U_4
1 2
4
HD#[0..63](3)
HD#[0..63]
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
5
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2
C1
C2
D1
T1
L1
P1
U22A
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
ALVISO_GM/GML
HOST
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HADS#
HADSTB0#
HADSTB1#
HVREF
HBNR#
HBPRI#
BREQ0#
HCPURST#
HCLKINN
HCLKINP
HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
F8
B9
E13
J11
A5
D5
E7
H10
AB1
AB2
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HCPUSLP#_GMCH
HA#[3..31]
HA#[3..31] (3)
ADS# (3)
HADSTB0# (3)
HADSTB1# (3)
BNR# (3)
BPRI# (3)
HBREQ0# (3)
CPURST# (3)
HCLK_MCH# (2)
HCLK_MCH (2)
DBSY# (3)
DEFER# (3)
HDBI0# (3)
HDBI1# (3)
HDBI2# (3)
HDBI3# (3)
DPWR# (3)
DRDY# (3)
HDSTBN0# (3)
HDSTBN1# (3)
HDSTBN2# (3)
HDSTBN3# (3)
HDSTBP0# (3)
HDSTBP1# (3)
HDSTBP2# (3)
HDSTBP3# (3)
HIT# (3)
HITM# (3)
HLOCK# (3)
HREQ#0 (3)
HREQ#1 (3)
HREQ#2 (3)
HREQ#3 (3)
HREQ#4 (3)
RS#0 (3)
RS#1 (3)
RS#2 (3)
HTRDY# (3)
+VCCP
R69
100/F_4
HVREF
R60
200/F_4
C83 should be placed 100 mils
or less from GMCH pin
T16
T131
R48
1 2
0_4
CPUSLP# (3,17)
C83
.1U_4
1 2
DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B
QUANTA
Title
Size Document Number Rev
6
Date: Sheet
7
COMPUTER
Alviso (Host)
BQ1 1A
C
532Thursday, August 18, 2005
8
of
1
I@ is only for Internal VGA;
E@ is only for External VGA;
DMI_TXN0(18)
DMI_TXN1(18)
DMI_TXN2(18)
DMI_TXN3(18)
A A
B B
Route as short
as possible.
+1.8VSUS
12
C C
12
R110
R115 40.2/F_4
R366
80.6/F_4
M_RCOMPN
M_RCOMPP
R365
80.6/F_4
DMI_TXP0(18)
DMI_TXP1(18)
DMI_TXP2(18)
DMI_TXP3(18)
DMI_RXN0(18)
DMI_RXN1(18)
DMI_RXN2(18)
DMI_RXN3(18)
DMI_RXP0(18)
DMI_RXP1(18)
DMI_RXP2(18)
DMI_RXP3(18)
M_CLKOUT0(9)
M_CLKOUT1(9)
T49
M_CLKOUT3(9)
M_CLKOUT4(9)
T45
M_CLKOUT0#(9)
M_CLKOUT1#(9)
T48
M_CLKOUT3#(9)
M_CLKOUT4#(9)
T272
M_CKE0(9,10)
M_CKE1(9,10)
M_CKE2(9,10)
M_CKE3(9,10)
M_CS#0(9,10)
M_CS#1(9,10)
M_CS#2(9,10)
M_CS#3(9,10)
40.2/F_4
M_ODT0(9,10)
M_ODT1(9,10)
M_ODT2(9,10)
M_ODT3(9,10)
SMVREF_NB
It's point to point,
55ohm trace, keep as
short as possible.
+2.5V
12
M_OCDCOMP0
M_OCDCOMP1
C789
.1U_4
CLK_SDRAM2
CLK_SDRAM5
CLK_SDRAM2#
CLK_SDRAM5#
M_RCOMPN
M_RCOMPP
SMXSLEW
SMYSLEW
R92 10K_4
1 2
R91 10K_4
1 2
SMVREF_NB
12
C790
4.7U/10V_8
Close to AF37 and AD1 pin
D D
1
2
CFG3
R54
CFG[0:2]=100 FOR FSB 533
CFG[0:2]=101 FOR FSB 400
U22C
AA31
DMIRXN0
AB35
DMIRXN1
AC31
DMIRXN2
AD35
DMIRXN3
Y31
DMIRXP0
AA35
DMIRXP1
AB31
DMIRXP2
AC35
DMIRXP3
AA33
DMITXN0
AB37
DMITXN1
AC33
DMITXN2
AD37
AA37
AB33
AC37
AM33
AE11
AJ34
AC10
AN33
AE10
AJ33
AD10
AP21
AM21
AH21
AK21
AN16
AM14
AH15
AG16
AF22
AF16
AP14
AL15
AM11
AN10
AK10
AK11
AF37
AE27
AE28
AF10
Y33
AL1
AF6
AK1
AF5
AD1
AF9
DMITXN3
DMITXP0
DMITXP1
DMITXP2
DMITXP3
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
ALVISO_GM/GML
PM_EXTTS#0
PM_EXTTS#1
+1.8VSUS
DMIDDR MUXING
R586
1K_1%
R587
1K_1%
2
*1K_4
CFG/RSVDPMLCKNC
THRMTRIP#
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
3
FOR DDR533
CFG0
G16
CFG0
R55 1K_4
H13
CFG1
R56 1K_4
G14
CFG2
CFG3
F16
CFG3
CFG4
F15
CFG4
CFG5
G15
CFG5
CFG6
E16
CFG6
CFG7
D17
CFG7
CFG8
J16
CFG8
CFG9
D15
CFG9
CFG10
E15
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
BM_BUSY#
EXT_TS0#
EXT_TS1#
PWROK
RSTIN#
CFG11
D14
CFG12
E14
CFG13
H12
CFG14
C14
CFG15
H15
CFG16
J15
CFG17
H14
CFG18
G22
CFG19
G23
CFG20
D23
G25
G24
J17
A31
A30
D26
D25
CFG19 Low=CPU VTT 1.05V
High=CPU VTT 1.2V
CFG[17:3] have internal pullup resistors.
CFG[19:18] have internal pulldown resistors
J23
PM_EXTTS#0
J21
PM_EXTTS#1
H22
F5
AD30
AE29
1 2
DOT96#
A24
DOT96
A23
DREFSSCLK#
C37
DREFSSCLK
D37
TP_NC1
AP37
NC1
TP_NC2
AN37
NC2
TP_NC3
AP36
NC3
TP_NC4
AP2
NC4
TP_NC5
AP1
NC5
TP_NC6
AN1
NC6
TP_NC7
B1
NC7
TP_NC8
A2
NC8
TP_NC9
B37
NC9
TP_NC10
A36
NC10
TP_NC11
A37
NC11
Signal
TV_RSET
TV_COMP
TV_Y/G
TV_C/R
VSYNC
HSYNC
L_BKLT_CRTL
L_BKLT_EN
INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU
CRT_COM#
REFSET
DDCLK/DAT
LVDS
DOT96#
DOT96
DREFSSCLK#
DREFSSCLK
3
CFG5 Low=DMIx2
*High=DMIx4
CFG6 *Low= DDR2
High=DDR
CFG7 Low=Mobile Prescott
*High=Dothan
R42 4.7K_4
1 2
T19
R40 *1K_4
R41 1K_4
R45 *1K_4
T36
R43
T9
R57
T13
T30
T5
T25
R58 *1K_4
T33
R90 *1K_4
R89 *1K_4
T14
T17
T18
T34
T135
T133
T7
T12
PM_BMBUSY# (18)
R44 0_4
R112 100
T173
T172
T174
T175
T176
T177
T136
T132
T139
T134
T138
R94
R26
R27
R28
R312
R313
R314
R32
R578
R33
R579
R317
R315
R83LVDD_EN 0_0402 NI
R72
R289
R311
R580
R290
R310
R581
R291
R309
R582
R584
R583
R95
R585
RN109
RN5
RN9
RN3
RN10
RN4
RN6
RN7
RN8
R574
R575
R576
R577
IMVP_PWRGD (18,31)
PLTRST# (3,11,17,24)
DOT96# (2)
DOT96 (2)
DREFSSCLK# (2)
DREFSSCLK (2)
915GM
4.99K/F
0_0402
0_0402
0_0402
150/F
150/F
150/F
39
NI
39
NI
0_0402
1.5KLIBG
0_0402
150/F
NI
0_0402
150/F
NI
0_0402
150/F
NI
0_0402
NI
255/F_0402
NI
0_0402 NI
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
NI 0_0402
NI
NI
NI
+VCCP
SELPSB1_CLK (2,4)
SELPSB2_CLK (2,4)
*1K_4
1K_4
THERMTRIP# (3,17)
Place 150 Ohm termination resistors close to GMCH
915PM
0_0603
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
0_0402
4
CFG9 Low=REVERSE LANE
*High=NORMAL
CFG11 FOR CPU533
CFG16 Low=FSB Dynamic ODT Disable
*High=FSB Dynamic ODT Enable
CFG18 *Low=CPU Core VCC 1.05V
High=CPU Core VCC 1.5V
CLK_MCH_3GPLL#(2)
CLK_MCH_3GPLL(2)
PULL LOW FOR DVO NOT PRESENT(INTERNAL PULLLOW IN 915GM)
+2.5V
+2.5V
VSYNC(11,16)
HSYNC(11,16)
Connect to I2C backlight inverter module
I_EDIDCLK(15)
I_EDIDDATA(15)
R72 I@1.5K/F
GMCH_PWM
INT_BLON
INT_TV_C/R
INT_TV_COMP
INT_TV_Y/G
INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU
1 2
1 2
1 2
R311 I@150/F_4
1 2
R310 I@150/F_4
1 2
R309 I@150/F_4
1 2
NI
NI
NI
R317 I@100K_4
R316 100K_4
R312 I@150/E@0/F_4
R314 I@150/E@0/F_4
R313 I@150/E@0/F_4
NI
NI
NI100K
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
4
5
T20
T26
R94 I@4.99K/E@0/F
R32 I@39_4
1 2
R33 I@39_4
1 2
R95 I@255/F_4
TXLCLKOUT+(11,15)
TXLCLKOUT-(11,15)
TXUCLKOUT-(11,15)
TXUCLKOUT+(11,15)
TXLOUT0+(11,15)
TXLOUT0-(11,15)
TXLOUT1+(11,15)
TXLOUT1-(11,15)
TXLOUT2+(11,15)
TXLOUT2-(11,15)
TXUOUT0-(11,15)
TXUOUT0+(11,15)
TXUOUT1-(11,15)
TXUOUT1+(11,15)
TXUOUT2-(11,15)
TXUOUT2+(11,15)
DISP_ON(11,15)
BLON(11,15)
TV_Y/G_SYS(11,15)
TV_C/R_SYS(11,15)
TV_COMP_SYS(11,15)
VGA_RED_SYS(11,16)
VGA_GRN_SYS(11,16)
VGA_BLU_SYS(11,16)
CRTDCLK(11,16)
CRTDDAT(11,16)
5
SDVO_CTRLDATA
SDVO_CTRLCLK
INT_DDCCLK
INT_DDCDAT
INT_VGA_BLU
CRT_COM#
INT_VGA_GRN
CRT_COM#
INT_VGA_RED
CRT_COM#
INT_VSYNC
INT_HSYNC
GMCH_PWM
INT_BLON
INT_DISP_ON
T8
T15
T11
INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXUCLKOUTINT_TXUCLKOUT+
INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_TXUOUT0INT_TXUOUT1INT_TXUOUT2-
INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+
INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
TV_REFSET
REFSET
T6
T10
H24
H25
AB29
AC29
A15
C16
A17
J18
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
I@4P2R-S-0_4
GMCHEXP_TXP[0..15](11)
GMCHEXP_TXN[0..15](11)
GMCHEXP_RXP[0..15](11)
GMCHEXP_RXN[0..15](11)
U22F
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LBCLKN
LBCLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
ALVISO_GM/GML
241
241
241
241
241
241
241
241
R83I@0_4
R315I@0_4
R26I@0_4
R28I@0_4
R27I@0_4
R289I@0_4
R290I@0_4
R291I@0_4
3
6
6
GMCHEXP_TXP[0..15]
GMCHEXP_TXN[0..15]
GMCHEXP_RXP[0..15]
GMCHEXP_RXN[0..15]
MISC
TV VGA LVDS
INT_TXLCLKOUT+
RN5I@4P2R-S-0_4
INT_TXLCLKOUT-
3
RN9I@4P2R-S-0_4
INT_TXUCLKOUTINT_TXUCLKOUT+
3
RN3I@4P2R-S-0_4
INT_TXLOUT0+
INT_TXLOUT0-
3
RN10I@4P2R-S-0_4
INT_TXLOUT1+
INT_TXLOUT1-
3
INT_TXLOUT2+
RN4I@4P2R-S-0_4
INT_TXLOUT2-
3
RN6I@4P2R-S-0_4
INT_TXUOUT0-
3
INT_TXUOUT0+
RN7I@4P2R-S-0_4
INT_TXUOUT1-
3
INT_TXUOUT1+
RN8I@4P2R-S-0_4
INT_TXUOUT2-
3
INT_TXUOUT2+
INT_DISP_ON
INT_BLON
INT_TV_Y/G
INT_TV_C/R
INT_TV_COMP
INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU
RN109
INT_DDCCLK
INT_DDCDAT
241
EXP_COMPI
EXP_ICOMPO
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
PCI-EXPRESS GRAPHICS
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
7
8
6
VCC3G_PCIE
GMCHEXP_TXN0
C95E@.1U_4
GMCHEXP_TXN1
C487E@.1U_4
GMCHEXP_TXN2
C107E@.1U_4
GMCHEXP_TXN3
C490E@.1U_4
GMCHEXP_TXN4
C122E@.1U_4
GMCHEXP_TXN5
C494E@.1U_4
GMCHEXP_TXN6
C151E@.1U_4
GMCHEXP_TXN7
C498E@.1U_4
GMCHEXP_TXN8
C167E@.1U_4
GMCHEXP_TXN9
C503E@.1U_4
GMCHEXP_TXN10
C188E@.1U_4
GMCHEXP_TXN11
C508E@.1U_4
GMCHEXP_TXN12
C201E@.1U_4
GMCHEXP_TXN13
C513E@.1U_4
GMCHEXP_TXN14
C229E@.1U_4
GMCHEXP_TXN15
C517E@.1U_4
GMCHEXP_TXP0
C93E@.1U_4
GMCHEXP_TXP1
C484E@.1U_4
GMCHEXP_TXP2
C105E@.1U_4
GMCHEXP_TXP3
C488E@.1U_4
GMCHEXP_TXP4
C115E@.1U_4
GMCHEXP_TXP5
C492E@.1U_4
GMCHEXP_TXP6
C132E@.1U_4
GMCHEXP_TXP7
C496E@.1U_4
GMCHEXP_TXP8
C158E@.1U_4
GMCHEXP_TXP9
C500E@.1U_4
GMCHEXP_TXP10
C176E@.1U_4
GMCHEXP_TXP11
C506E@.1U_4
GMCHEXP_TXP12
C195E@.1U_4
GMCHEXP_TXP13
C510E@.1U_4
GMCHEXP_TXP14
C217E@.1U_4
GMCHEXP_TXP15
C515E@.1U_4
(1.5V)
R585E@0_4
R580E@0_4
R581E@0_4
R582E@0_4
R583E@0_4
R584I@0_4
R578E@0_4
R579E@0_4
+1.5V
632Thursday, August 18, 2005
8
+1.5V
of
D36
D34
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
R71 24.9/F_4
GMCHEXP_RXN0
GMCHEXP_RXN1
GMCHEXP_RXN2
GMCHEXP_RXN3
GMCHEXP_RXN4
GMCHEXP_RXN5
GMCHEXP_RXN6
GMCHEXP_RXN7
GMCHEXP_RXN8
GMCHEXP_RXN9
GMCHEXP_RXN10
GMCHEXP_RXN11
GMCHEXP_RXN12
GMCHEXP_RXN13
GMCHEXP_RXN14
GMCHEXP_RXN15
GMCHEXP_RXP0
GMCHEXP_RXP1
GMCHEXP_RXP2
GMCHEXP_RXP3
GMCHEXP_RXP4
GMCHEXP_RXP5
GMCHEXP_RXP6
GMCHEXP_RXP7
GMCHEXP_RXP8
GMCHEXP_RXP9
GMCHEXP_RXP10
GMCHEXP_RXP11
GMCHEXP_RXP12
GMCHEXP_RXP13
GMCHEXP_RXP14
GMCHEXP_RXP15
CGMCHEXP_TXN0
CGMCHEXP_TXN1
CGMCHEXP_TXN2
CGMCHEXP_TXN3
CGMCHEXP_TXN4
CGMCHEXP_TXN5
CGMCHEXP_TXN6
CGMCHEXP_TXN7
CGMCHEXP_TXN8
CGMCHEXP_TXN9
CGMCHEXP_TXN10
CGMCHEXP_TXN11
CGMCHEXP_TXN12
CGMCHEXP_TXN13
CGMCHEXP_TXN14
CGMCHEXP_TXN15
CGMCHEXP_TXP0
CGMCHEXP_TXP1
CGMCHEXP_TXP2
CGMCHEXP_TXP3
CGMCHEXP_TXP4
CGMCHEXP_TXP5
CGMCHEXP_TXP6
CGMCHEXP_TXP7
CGMCHEXP_TXP8
CGMCHEXP_TXP9
CGMCHEXP_TXP10
CGMCHEXP_TXP11
CGMCHEXP_TXP12
CGMCHEXP_TXP13
CGMCHEXP_TXP14
CGMCHEXP_TXP15
DOT96#
DOT96
DREFSSCLK#
DREFSSCLK
REFSET
INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU
CRT_COM#
INT_VSYNC
INT_HSYNC
1 2
R574 E@0_4
R575 E@0_4
R576 E@0_4
R577 E@0_4
QUANTA
Title
Size Document Number Rev
Date: Sheet
COMPUTER
Alviso (VGA,DMI)
Custom
BQ1 1A
7
1
2
3
4
5
6
7
8
7
A A
B B
C C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ[0..63] (9)
U22B
AG35
SADQ0
AH35
SADQ1
AL35
SADQ2
AL37
SADQ3
AH36
SADQ4
AJ35
SADQ5
AK37
SADQ6
AL34
SADQ7
AM36
SADQ8
AN35
SADQ9
AP32
SADQ10
AM31
SADQ11
AM34
SADQ12
AM35
SADQ13
AL32
SADQ14
AM32
SADQ15
AN31
SADQ16
AP31
SADQ17
AN28
SADQ18
AP28
SADQ19
AL30
SADQ20
AM30
SADQ21
AM28
SADQ22
AL28
SADQ23
AP27
SADQ24
AM27
SADQ25
AM23
SADQ26
AM22
SADQ27
AL23
SADQ28
AM24
SADQ29
AN22
SADQ30
AP22
SADQ31
AM9
SADQ32
AL9
SADQ33
AL6
SADQ34
AP7
SADQ35
AP11
SADQ36
AP10
SADQ37
AL7
SADQ38
AM7
SADQ39
AN5
SADQ40
AN6
SADQ41
AN3
SADQ42
AP3
SADQ43
AP6
SADQ44
AM6
SADQ45
AL4
SADQ46
AM3
SADQ47
AK2
SADQ48
AK3
SADQ49
AG2
SADQ50
AG1
SADQ51
AL3
SADQ52
AM2
SADQ53
AH3
SADQ54
AG3
SADQ55
AF3
SADQ56
AE3
SADQ57
AD6
SADQ58
AC4
SADQ59
AF2
SADQ60
AF1
SADQ61
AD4
SADQ62
AD5
SADQ63
AK15
SA_BS0#
AK16
SA_BS1#
AL21
SA_BS2#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR SYSTEM MEMORY A
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
ALVISO_GM/GML
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
AN15
AP16
AF29
AF28
AP15
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_BS#0 (9,10)
M_A_BS#1 (9,10)
M_A_BS#2 (9,10)
M_A_DM[0..7] (9)
M_A_DQS[0..7] (9)
M_A_DQS#[0..7] (9)
M_A_A[0..13] (9,10)
M_A_CAS# (9,10)
M_A_RAS# (9,10)
M_A_WE# (9,10)
T52
T53
M_B_DQ[0..63] (9)
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
U22G
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
SB_BS0#
SB_BS1#
SB_BS2#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR SYSTEM MEMORY B
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
ALVISO_GM/GML
AJ15
AG17
AG21
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
AH14
AK14
AF15
AF14
AH16
M_B_DM0
M_B_DM1
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6M_A_A5
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6 M_B_DM2
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16M_A_DQS2
M_B_DQ17
M_B_DQ18M_A_DQ17
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS#0 (9,10)
M_B_BS#1 (9,10)
M_B_BS#2 (9,10)
M_B_DM[0..7] (9)
M_B_DQS[0..7] (9)
M_B_DQS#[0..7] (9)
M_B_A[0..13] (9,10)
M_B_CAS# (9,10)
M_B_RAS# (9,10)
T50
T47
M_B_WE# (9,10)
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
COMPUTER
Alviso (DDRII)
BQ1 1A
7
732Thursday, August 18, 2005
of
8
5
I@ is only for Internal VGA;
+VCCP
3900mA
12
12
C135
0.1U_4
D D
DEPOP C65, C70, C71, C76 WHEN NO EXT.VGA
+1.5V
+3V +2.5V_CRT
C842
I@1U/6.3V/X5R
1 2
L43
I@10UH
60mA
I@MLB_160808-0300P-N2
1 2
R646 *0
C784
I@330U/6.3V
L44
I@10UH
L23
1UH_1206
L22
1UH_1206
R297
I@10
L40
VCCA_CRTDAC
+1.5V
C C
+1.5V
60mA
+1.5V
60mA
VCCA_CRTDAC Route caps within 250mil
of GMCH. Route FB within 3" of GMCH.
B B
68mA
+2.5V_CRT
+2.5V
Close to F19,E19 PIN
VCC_SYNC
A A
I@0.1U/E@0_4
12
12
C77
C98
I@10U_4V_8
E@ is only for External VGA;
12
C165
C112
0.1U_4
0.1U_4
U39
3 4
VIN VOUT
1
SHDN
2
GND
I@G923
VCCA_DPLLA
12
12
C70
I@0.1U_4
VCCA_DPLLB
12
12
C71
I@0.1U_4
12
12
C200
0.1U_4
12
12
C199
0.1U_4
VCCGFOLLOW
R571 E@0
C102
I@0.022U_4
C785
I@330U/6.3V
12
12
C190
10U_4V_8
SET
+
+
+
+
D22
I@CH501H-40
VCCA_CRTDAC
C96
I@0.1U_4
C467 0.47U/25V_8
C468 0.47U/25V_8
C154 0.22U
C74 0.22U
12
R644
I@100K/F_4
1 2
5
R645
I@100K/F_4
1 2
C65
I@220U/2.5V-3528
C76
I@220U/2.5V-3528
C216
220U/2.5V-3528
+2.5V
C231
220U/2.5V-3528
21
12
1 2
1 2
C150
10U_4V_8
12
+VCCP
+VCCP
810mA
VCCP_GMCH_CAP1
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
+VCCP
12
C141
2.2U/6.3V
12
C870
I@0.1U_4
C140
10U_4V_8
+1.5V
R570
I@0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC
VCC_SYNC
12
C94
4.7U/10V_8
12
C862
0.1U_4
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
AC2
AC1
B23
C35
AA1
AA2
F19
E19
G19
H20
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
U22H
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC0
VCCA_CRTDAC1
VVSSA_CRTDAC
VCC_SYNC
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
ALVISO_GM/GML
12
C863
0.1U_4
12
Close to F19,E19 PIN
5
VCCA_CRTDAC
C864
0.1U_4
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_TVDAC
VCCDQ_TVDAC
POWER
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
4
VCCA_TVBG
VSSA_TVBG
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCA_LVDS
VCCHV0
VCCHV1
VCCHV2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GBG
VSSA_3GBG
4
NO FILTER WHEN EXT. VGA
F17
E17
D18
C18
F18
E18
H18
G18
D19
H17
B26
B25
A25
A35
B22
B21
A21
AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1
B28
A28
A27
AF20
AP19
AF19
AF18
AE37
W37
U37
R37
N37
L37
J37
Y29
Y28
Y27
F37
G37
VCC_TVBG
+1.5V_VCCD
VCC_QTVDAC
V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4
VCC_TVDACC
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
60mA
VCC_DDRDLL
VCC3G_PCIE
150mA
12
C82
.1U_4
12
C110
0.1U_4
C471
I@.022U_4
+2.5V
+2.5V
close to PIN B28,A28,A27
1 2
12
C99
I@0.1U/E@0_4
12
C92
0.1U_4
Note: All VCCSM
pins shorted
internally.
+1.8VSUS
12
12
C203
10U_4V_8
Note: All VCCSM
pins shorted
internally.
C526 0.1U_4
1 2
C253 0.1U_4
1 2
C228 0.1U_4
1 2
+
C247
220U/2.5V
12
C175
0.1U_4
12
C90
4.7U/10V_8
L41
+3V_TV
I@MLB_160808-0300P-N2
+2.5V
12
2mA
C97
10U_4V_8
C255 0.1U_4
1 2
C250 0.1U_4
1 2
C525 0.1U_4
1 2
12
+
C252
C204
330U/6.3V-7343
10U_4V_8
C267
100U/10V
12
12
C126
10U_4V_8
R108
1 2
12
0.5/F
C178
10U_4V_8
+2.5V
12
C78
0.1U_4
+
VCC3G_PCIE
C237
10U_4V_8
C79
I@.022U_4
C68
I@.022U_4
C472
I@0.022U_4
C206
I@.022U_4
VCC_QTVDAC
C64
I@.022U_4
MLB_160808-0300P-N2
12
1 2
12
MLB_160808-0300P-N2
C139
.1U_4
VCCA_3GPLL_1VCCA_3GPLL
3
VCC_TVDACA
12
C69
I@0.1U/E@0_4
VCC_TVDACB
12
C86
I@0.1U/E@0_4
10mA
+2.5V
12
C87
.01U/16V_4
VCC_TVBG
12
C111
I@0.1U/E@0_4
+1.5V_VCCD
12
C241
I@0.1U/E@0_4
1 2
I@MLB_160808-0300P-N2
12
C63
I@0.1U/E@0_4
L24
1 2
C232
0.1U_4
L25
L20
1 2
MLB_160808-0300P-N2
3
L8
1 2
I@MLB_160808-0300P-N2
120mA
L6
1 2
I@MLB_160808-0300P-N2
12
C91
0.1U_4
L42
1 2
I@MLB_160808-0300P-N2
L64
1 2
I@MLB_160808-0300P-N2
close to PIN D19
L7
30mA
+1.5V
+1.5V
1A
+1.5V
+3V_TV
12
+1.5V
60mA
C89
10U_4V_8
24mA
R643 *0_4
R39 I@10
+3V_TV
+3V_TV
+1.5V
+1.5V
+3V
V1_5VFOLLOW
C841
I@1U/6.3V/X5R
To add LDO for clear power
to slove TV ripple issue
Signal
VCCA_CRTDAC
VCC_SYNC
VDD_DPLLB
VDD_DPLLA
VCC_TVDACA
VCC_TVDACB 160808-0300P
VCC_TVDACC 160808-0300P
VCCD_TVDAC
VCCQ_TVDAC
VCC_TVBG L42
D23
21
+1.5V
I@CH501H-40
+5V
U38
3 4
VIN VOUT
1
SHDN
1 2
2
GND
I@G923-330
915GM
160808-0300P
L40
NI
R571
R297
10
0_0402
R570
C98
0.1U_0402
L44
10UH
470U
C76
0.1U_0402
C71
10UH
L43
470U
C65
C70
0.1U_0402
D23
CH501H-40
R39
10
L8
160808-0300P
C79
0.022U_0402
C69
0.1U_0402
L6
0.1U_0402
C86
C68
0.022U_0402
L41
C471
0.022U_0402
0.1U_0402
C99
160808-0300P
L64
C206
0.022U_0402
0.1U_0402
C241
160808-0300P
L7
C64
0.022U_0402
0.1U_0402
C63
160808-0300P
C472
0.022U_0402
C111 0.1U_0402
2
1
8
U22D
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
NCTF
QUANTA
COMPUTER
Alviso (Power)
BQ1 1A
AB26
AA26
AB25
AA25
AB24
AA24
AB23
AA23
AB22
AA22
AB21
AA21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17
AB16
AA16
AB15
AA15
AB14
AA14
AA13
AA12
W13
VTT_NCTF0
V13
VTT_NCTF1
U13
VTT_NCTF2
T13
VTT_NCTF3
R13
VTT_NCTF4
P13
VTT_NCTF5
N13
VTT_NCTF6
M13
VTT_NCTF7
L13
VTT_NCTF8
W12
VTT_NCTF9
V12
VTT_NCTF10
U12
VTT_NCTF11
T12
VTT_NCTF12
R12
VTT_NCTF13
P12
VTT_NCTF14
N12
VTT_NCTF15
M12
VTT_NCTF16
L12
VTT_NCTF17
VSS_NCTF0
VSS_NCTF1
Y26
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
Y25
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
Y24
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
Y23
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
Y22
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
Y21
VSS_NCTF17
R21
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
Y17
VSS_NCTF27
R17
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
Y16
VSS_NCTF31
W16
VSS_NCTF32
V16
VSS_NCTF33
U16
VSS_NCTF34
T16
VSS_NCTF35
R16
VSS_NCTF36
P16
VSS_NCTF37
N16
VSS_NCTF38
M16
VSS_NCTF39
L16
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
Y15
VSS_NCTF43
W15
VSS_NCTF44
V15
VSS_NCTF45
U15
VSS_NCTF46
T15
VSS_NCTF47
R15
VSS_NCTF48
P15
VSS_NCTF49
N15
VSS_NCTF50
M15
VSS_NCTF51
L15
VSS_NCTF52
VSS_NCTF53
VSS_NCTF54
Y14
VSS_NCTF55
W14
VSS_NCTF56
V14
VSS_NCTF57
U14
VSS_NCTF58
T14
VSS_NCTF59
R14
VSS_NCTF60
P14
VSS_NCTF61
N14
VSS_NCTF62
M14
VSS_NCTF63
L14
VSS_NCTF64
VSS_NCTF65
Y13
VSS_NCTF66
VSS_NCTF67
Y12
VSS_NCTF68
Title
Size Document Number Rev
Custom
Date: Sheet
+VCCP
+3V_TV
C840
I@10U/10V_8
5
SET
915PM
NI
0
NI
NI
0_0402
NI
NI
NI
NI
NI
NI
NI
NI
NI
NI
0_0402
NI
0_0402
NI
NI
NI
0_0402
NI
NI
0_0402
NI
NI
0_0402
NI
NI
0_0402
2
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
ALVISO_GM/GML
1
AD26
AC26
AD25
AC25
AD24
AC24
AD23
AC23
AD22
AC22
AD21
AC21
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AC17
AD16
AC16
AD15
AC15
AD14
AC14
AD13
AC13
AB13
AD12
AC12
AB12
W26
V26
U26
T26
R26
P26
N26
M26
L26
W25
V25
U25
T25
R25
P25
N25
M25
L25
W24
V24
U24
T24
R24
P24
N24
M24
L24
W23
V23
U23
T23
R23
P23
N23
M23
L23
W22
V22
U22
T22
R22
P22
N22
M22
L22
W21
V21
U21
T21
P21
N21
M21
L21
Y20
R20
P20
N20
M20
L20
Y19
R19
P19
N19
M19
L19
Y18
R18
P18
N18
M18
L18
W17
V17
U17
T17
P17
N17
M17
L17
+1.8VSUS
+VCCP
832Thursday, August 18, 2005
of
1
M_A_A[0..13](7,10)
A A
M_A_BS#0(7,10)
M_A_BS#1(7,10)
M_A_BS#2(7,10)
M_A_DM[0..7](7)
B B
C C
D D
+1.8VSUS
M_CLKOUT0(6)
M_CLKOUT0#(6)
M_CLKOUT1(6)
M_CLKOUT1#(6)
M_CLKOUT0
C826
*10P_4
M_CLKOUT0#
M_CLKOUT1
C828
*10P_4
M_CLKOUT1#
+3V
M_A_DQS[0..7](7)
M_A_DQS#[0..7](7)
PDAT_SMB(2,18)
PCLK_SMB(2,18)
C836 0.1U_4
2.2U/10V/X5R
1 2
C833
1
M_CLKOUT0
M_CLKOUT0#
M_CLKOUT1
M_CLKOUT1#
M_CKE0(6,10)
M_CKE1(6,10)
M_A_RAS#(7,10)
M_A_CAS#(7,10)
M_A_WE#(7,10)
M_CS#0(6,10)
M_CS#1(6,10)
M_ODT0(6,10)
M_ODT1(6,10)
PDAT_SMB
PCLK_SMB
C829 0.1U_4
MVREF_DIM
C834
0.1U_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM7
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS7
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#7
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
2
+1.8VSUS
818287889596103
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
CN17
REVERSE
111
104
VDD6
VDD8
VDD7
SO-DIMM
(H=4.0)
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
1217877727166656059
2
112
117
118
VDD9
VDD10
VDD11
VSS32
VSS31
VSS30
128
127
122
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
NC/TEST
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
VSS33
132
DDRII_SODIMM_R
M_A_DQ4
M_A_DQ0
M_A_DQ7
M_A_DQ1
M_A_DQ3
M_A_DQ6
M_A_DQ2
M_A_DQ5
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ13
M_A_DQ12
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ20
M_A_DQ23
M_A_DQ18
M_A_DQ21
M_A_DQ17
M_A_DQ19
M_A_DQ22
M_A_DQ29
M_A_DQ28
M_A_DQ30
M_A_DQ27
M_A_DQ24
M_A_DQ25
M_A_DQ31
M_A_DQ26
M_A_DQ58
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ59
M_A_DQ56
M_A_DQ57
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ37
M_A_DQ36
M_A_DQ39
M_A_DQ38
M_A_DQ44
M_A_DQ45
M_A_DQ42
M_A_DQ43
M_A_DQ40
M_A_DQ41
M_A_DQ46
M_A_DQ47
M_A_DQ53
M_A_DQ49
M_A_DQ55
M_A_DQ54
M_A_DQ52
M_A_DQ48
M_A_DQ51
M_A_DQ50
3
M_A_DQ[0..63] (7)
M_CLKOUT3
C825
*10P_4
M_CLKOUT3#
M_CLKOUT4
C827
*10P_4
M_CLKOUT4#
+1.8VSUS
3
M_B_A[0..13](7,10)
M_B_BS#0(7,10)
M_B_BS#1(7,10)
M_B_BS#2(7,10)
M_B_DM[0..7](7)
M_B_DQS[0..7](7)
M_B_DQS#[0..7](7)
M_CLKOUT3(6)
M_CLKOUT3#(6)
M_CLKOUT4(6)
M_CLKOUT4#(6)
+3V
+3V
C830 0.1U_4
M_CKE2(6,10)
M_CKE3(6,10)
M_B_RAS#(7,10)
M_B_CAS#(7,10)
M_B_WE#(7,10)
M_CS#2(6,10)
M_CS#3(6,10)
M_ODT2(6,10)
M_ODT3(6,10)
R635 10K_4
C835 0.1U_4
C831
2.2U/10V/X5R
1 2
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_CLKOUT3
M_CLKOUT3#
M_CLKOUT4
M_CLKOUT4#
PDAT_SMB
PCLK_SMB
MVREF_DIM
C832
0.1U_4
4
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
1
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
4
818287889596103
A0
A1
VDD0
VDD1
A2
A3
A4
A5
A6
A7
A8
REVERSE
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
(H=9.2)
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS22
VSS21
+1.8VSUS
111
104
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
CN19
SO-DIMM
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
1217877727166656059
112
117
118
VDD8
VDD9
VDD10
VDD11
NC/TEST
VSS32
VSS31
VSS30
VSS29
132
128
127
122
DDRII_SODIMM_R
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
M_B_DQ5
5
DQ0
M_B_DQ4
7
DQ1
M_B_DQ2
17
DQ2
M_B_DQ7
19
DQ3
M_B_DQ1
4
DQ4
M_B_DQ0
6
DQ5
M_B_DQ3
14
DQ6
M_B_DQ6
16
DQ7
M_B_DQ13
23
DQ8
M_B_DQ8
25
DQ9
M_B_DQ10
35
M_B_DQ11
37
M_B_DQ12
20
M_B_DQ9
22
M_B_DQ15
36
M_B_DQ14
38
M_B_DQ16
43
M_B_DQ21
45
M_B_DQ22
55
M_B_DQ23
57
M_B_DQ20
44
M_B_DQ17
46
M_B_DQ19
56
M_B_DQ18
58
M_B_DQ24
61
M_B_DQ25
63
M_B_DQ27
73
M_B_DQ31
75
M_B_DQ30
62
M_B_DQ28
64
M_B_DQ26
74
M_B_DQ29
76
M_B_DQ32
123
M_B_DQ33
125
M_B_DQ34
135
M_B_DQ35
137
M_B_DQ36
124
M_B_DQ37
126
M_B_DQ38
134
M_B_DQ39
136
M_B_DQ40
141
M_B_DQ41
143
M_B_DQ46
151
M_B_DQ43
153
M_B_DQ45
140
M_B_DQ44
142
M_B_DQ42
152
M_B_DQ47
154
M_B_DQ52
157
M_B_DQ49
159
M_B_DQ55
173
M_B_DQ54
175
M_B_DQ48
158
M_B_DQ53
160
M_B_DQ50
174
M_B_DQ51
176
M_B_DQ60
179
M_B_DQ61
181
M_B_DQ57
189
M_B_DQ59
191
M_B_DQ56
180
M_B_DQ58
182
M_B_DQ63
192
M_B_DQ62
194
50
NC1
69
NC2
83
NC3
120
NC4
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
M_B_DQ[0..63] (7)
6
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
C387
.1U_4
C310
.1U_4
C361
.1U_4
C303
.1U_4
C298
.1U_4
C395
.1U_4
C325
.1U_4
C345
.1U_4
C328
.1U_4
C299
.1U_4
C356
.1U_4
C295
.1U_4
C306
.1U_4
C358
.1U_4
C302
.1U_4
7
+1.8VSUS
MVREF_DIM
C744
.1U_4
C297
.1U_4
C340
.1U_4
C332
.1U_4
C272
150U/6.3V-7343
C745
.1U_4
C331
.1U_4
C326
.1U_4
C383
.1U_4
C273
150U/6.3V-7343
C746
1U/6.3V/X5R
C389
.1U_4
C322
.1U_4
C390
.1U_4
+1.8VSUS
R544
1K_1%
R545
1K_1%
C386
.1U_4
C309
.1U_4
C397
.1U_4
8
C334
.1U_4
C398
.1U_4
C301
.1U_4
C384
.1U_4
C360
.1U_4
C294
.1U_4
9
QUANTA
Title
Size Document Number Rev
5
6
Date: Sheet
7
COMPUTER
DDR SO-DIMM ( 200P )
BQ1 1A
of
932Thursday, August 18, 2005
8
1
2
3
4
5
6
7
8
VTT_MEM
C376
0.1U_4
A A
B B
C C
VTT_MEM
C373
0.1U_4
VTT_MEM
C341
0.1U_4
VTT_MEM
C817
10U/6.3V
C370
0.1U_4
C282
0.1U_4
C316
0.1U_4
C818
10U/6.3V
C388
0.1U_4
C377
0.1U_4
C336
0.1U_4
C819
10U/6.3V
C342
0.1U_4
C337
0.1U_4
C378
0.1U_4
For terminal R-pack.
C283
C365
0.1U_4
0.1U_4
C281
0.1U_4
C335
0.1U_4
C320
0.1U_4
C286
0.1U_4
C317
0.1U_4
C285
0.1U_4
C375
0.1U_4
C329
0.1U_4
M_CKE0(6,9)
M_CKE1(6,9)
M_CKE2(6,9)
M_CKE3(6,9)
M_ODT0(6,9)
M_ODT1(6,9)
M_ODT2(6,9)
M_ODT3(6,9)
M_A_BS#0(7,9)
M_A_BS#1(7,9)
M_A_BS#2(7,9)
M_A_WE#(7,9)
M_A_CAS#(7,9)
M_A_RAS#(7,9)
M_B_BS#0(7,9)
M_B_BS#1(7,9)
M_B_BS#2(7,9)
M_B_WE#(7,9)
M_B_CAS#(7,9)
M_B_RAS#(7,9)
M_CS#0(6,9)
M_CS#1(6,9)
M_CS#2(6,9)
M_CS#3(6,9)
M_A_A13(7,9)
M_A_A10(7,9)
M_A_A2(7,9)
M_A_A0(7,9)
M_A_A6(7,9)
M_A_A4(7,9)
M_A_A11(7,9)
M_A_A7(7,9)
M_A_A9(7,9)
M_A_A12(7,9)
M_A_A3(7,9)
M_A_A1(7,9)
M_A_A8(7,9)
M_A_A5(7,9)
M_B_A2(7,9)
M_B_A0(7,9)
M_B_A6(7,9)
M_B_A4(7,9)
M_B_A7(7,9)
M_B_A11(7,9)
M_B_A3(7,9)
M_B_A1(7,9)
M_B_A5(7,9)
M_B_A8(7,9)
M_B_A9(7,9)
M_B_A12(7,9)
M_B_A10(7,9)
M_B_A13(7,9)
C290
0.1U_4
C287
C313
0.1U_4
0.1U_4
R607 56_4
R608 56_4
R609 56_4
R610 56_4
R611 56_4
R612 56_4
R613 56_4
R614 56_4
R615 56_4
R616 56_4
R617 56_4
R618 56_4
R619 56_4
R620 56_4
R621 56_4
R622 56_4
R623 56_4
R624 56_4
R625 56_4
R626 56_4
R627 56_4
R628 56_4
R629 56_4
R630 56_4
R631 56_4
R632 56_4
RP24 0404-56X2
1 2
3 4
RP25 0404-56X2
1 2
3 4
RP26 0404-56X2
1 2
3 4
RP27 0404-56X2
1 2
3 4
RP28 0404-56X2
1 2
3 4
RP29 0404-56X2
1 2
3 4
RP30 0404-56X2
1 2
3 4
RP31 0404-56X2
1 2
3 4
RP32 0404-56X2
1 2
3 4
RP33 0404-56X2
1 2
3 4
RP34 0404-56X2
1 2
3 4
RP35 0404-56X2
1 2
3 4
R633 56_4
R634 56_4
C366
0.1U_4
VTT_MEM
C379
0.1U_4
C394
0.1U_4
10
19 PCS
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
COMPUTER
DDRII TERMINATION
BQ1 1A
7
10 32Thursday, August 18, 2005
of
8